* hiphi:/ $ cat /proc/cpuinfo | grep -m 1 Features
Features: fp asimd evtstrm aes pmull sha1 sha2 crc32
atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc
dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat
ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bti
* From this, it's evident that our CPU (Snapdragon 8 Gen 1)
supports all the features of ARMv8.2-DotProd [1].
Moreover AOSP sets this arch variant in their generic
cortex-a55 ART target as well [2]. This should unlock
some optimizations in different code paths.
[1]: https://en.wikichip.org/wiki/arm/armv8#ARMv8_Extensions_and_Processor_Features
[2]: https://android.googlesource.com/device/generic/art/+/refs/heads/master/armv8_cortex_a55/BoardConfig.mk#23
Change-Id: I484bb2bcc181c62e29c04bc6e467e5edea8ac0d8
Signed-off-by: 7Soldier <reg.fm4@gmail.com>
Saving your time for recursive search of sysfs :)
Signed-off-by: Albert I <kras@raphielgang.org>
Signed-off-by: 7Soldier <reg.fm4@gmail.com>
Change-Id: I6eab8dca82f36cfea6af6f40073c6f4981b78cbf
* Should fix a13 decryption (still works on a12)
* Thanks to peoples on TWRP zulip for the values
Signed-off-by: Woomymy <github@woomy.ovh>
Signed-off-by: 7Soldier <reg.fm4@gmail.com>
This property is now used during boot to provide the TEE-backed
keymaster with the correct boot SPL. Set it to the platform SPL until
it diverges as part of an update.
Bug: 119549677
Test: verified boot.img has property using avbtool
Change-Id: Ice8e7747059492fc8729128e99119d8678fe5562
Signed-off-by: 7Soldier <reg.fm4@gmail.com>
Set the VENDOR_SECURITY_PATCH level to match the platform
security patch level. These are functionally the same.
Bug: 125914443
Change-Id: Ib77ab115d6faabd21958c34e2dae49ec96421fdd
Signed-off-by: 7Soldier <reg.fm4@gmail.com>
Toolbox has long been the default in TWRP, this flag is no longer needed
or used. In fact, it is automatically assumed true, unless you
specifically specify TW_FORCE_USE_BUSYBOX.
Change-Id: If19d67f9377481e522a488364bd881c5fb389611
Signed-off-by: 7Soldier <reg.fm4@gmail.com>
