rhodep: Initial import of device specific blobs

* From rhodep_g-user 13 T1SUS33.1-124-6-14 a15be release-keys.

Change-Id: Ifc556fab4a2d0afba881d7edcfb7137113d62622
This commit is contained in:
Anand S 2025-04-05 15:30:48 +05:30
commit f31fa38f1d
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371 changed files with 24202 additions and 0 deletions

1
.gitattributes vendored Normal file
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proprietary/product/priv-app/MotCamera4/MotCamera4.apk filter=lfs diff=lfs merge=lfs -text

5820
Android.bp Normal file

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Android.mk Normal file
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#
# Automatically generated file. DO NOT MODIFY
#
LOCAL_PATH := $(call my-dir)

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BoardConfigVendor.mk Normal file
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#
# Automatically generated file. DO NOT MODIFY
#

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<?xml version="1.0" encoding="utf-8" ?>
<!--
~ Copyright (C) 2013-2020 Motorola Mobility LLC,
~ All Rights Reserved.
~ Motorola Mobility Confidential Restricted.
-->
<permissions>
<feature name="com.motorola.camera3" />
</permissions>

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<?xml version="1.0" encoding="utf-8" ?>
<permissions>
<feature name="com.motorola.moto" />
<feature name="com.motorola.moto.uirefresh" />
<disallowed-managed-profile package="com.motorola.moto"/>
</permissions>

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<?xml version="1.0" encoding="utf-8" ?>
<config>
<required-managed-device package="com.motorola.camera3"/>
<required-managed-user package="com.motorola.camera3"/>
</config>

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<?xml version="1.0" encoding="utf-8" ?>
<permissions>
<privapp-permissions package="com.motorola.camera3">
<!-- System defined permissions -->
<permission name="android.permission.STOP_APP_SWITCHES"/>
<permission name="android.permission.WRITE_SECURE_SETTINGS"/>
<permission name="android.permission.START_ACTIVITIES_FROM_BACKGROUND"/>
</privapp-permissions>
</permissions>

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<?xml version="1.0" encoding="utf-8"?>
<config>
<hidden-api-whitelisted-app package="com.motorola.camera3" />
</config>

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version https://git-lfs.github.com/spec/v1
oid sha256:ed02c74106375054f7a6bf11aa5bf4a36e0cf0230006c09fcff04d696dd7f47c
size 174933576

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<?xml version="1.0" encoding="utf-8"?>
<permissions>
<library name="com.motorola.motosignature"
file="/system/framework/com.motorola.motosignature.jar"/>
</permissions>

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<?xml version="1.0" encoding="utf-8"?>
<!-- Copyright (C) 2018 The Android Open Source Project
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-->
<permissions>
<library
name="moto-core_services"
file="/system/framework/moto-core_services.jar"
/>
</permissions>

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<?xml version="1.0" encoding="utf-8"?>
<!-- Copyright (C) 2018 The Android Open Source Project
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-->
<permissions>
<library
name="moto-settings"
file="/system/framework/moto-settings.jar"
/>
</permissions>

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#!/system/bin/sh
cmd motsettings "$@"

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<?xml version="1.0" encoding="utf-8"?>
<!-- Copyright (C) 2018 The Android Open Source Project
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-->
<permissions>
<library
name="com.android.hotwordenrollment.common.util"
file="/system_ext/framework/com.android.hotwordenrollment.common.util.jar"
/>
</permissions>

BIN
proprietary/vendor/bin/capsense_reset vendored Executable file

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Version: 2
Date: 2022-01-26
Device: Rhode 5G+
Description: EIS Calibration
>Icccca34!/(&-%2ayc>Icccccccca5$16(2-aycqoIcccccccca' 7$aycaqsqqlsplquaoIcccccccca'$5(&$ayca+2'$ct
naoIcccccccca'$6&1(37(2-aycac /(!1 7(2-aIcccc<oIcccca,$7 2-5$17$121, 7ayca6$-621aoIcccca& ,$1 ayc>Iccccccccasayc>Icccccccccccca34!/(&$6&1(37(2-ayca &.c, (-c& ,$1 aoIcccccccccccca/'& 1 ,$7$16ayc>Icccccccccccccccca,2'$/ayca63/(-$aoIcccccccccccccccca%21: 1'2(-76aycsocsmssswtpptvqxoczmqqsv{{{t$lsuoclsmssqpx{wsp{woclsmsswzvq{uvtpoclsmssvxutwvuxtoIcccccccccccccccca%21: 1'7$3(9$aycsmptpwsx{stoIcccccccccccccccca%(6+$8$ &721aycsoIcccccccccccccccca1$ 33/8ayc714$Icccccccccccc<oIcccccccccccca6$-621 2'$ayc>Iccccccccccccccccapayc>Icccccccccccccccccccca34!/(&$6&1(37(2-aycaps{scvscaoIcccccccccccccccccccca%2& /$-*7+ 21, /(9$'aycsm{qttzwoIcccccccccccccccccccca12//(-*+477$1(,$aycvpmxus{oIcccccccccccccccccccca*812(,$67 ,3%%6$7aycvmtuxzoIcccccccccccccccccccca/$-626(7(2-221'(- 7$867$,ayc>Icccccccccccccccccccccccca71 -6/ 7(2-aycsmstxwwuvtvtocsmpwzt{ww{voIcccccccccccccccccccccccca6& /(-*ayclsmsv{zvwusvzoclsmsv{zvqtpspoIcccccccccccccccccccccccca127 7(2-ayclsmsuwzsutzpwoIcccccccccccccccccccccccca' 7 83$ayca+ //aIcccccccccccccccccccc<oIcccccccccccccccccccca/$-626(7(2-(,$67 ,3%%6$7aycsm{utzIcccccccccccccccc<Icccccccccccc<Icccccccc<oIccccccccapayc>Icccccccccccca34!/(&$6&1(37(2-ayca12-7c& ,$1 aoIcccccccccccca/'& 1 ,$7$16ayc>Icccccccccccccccca,2'$/ayca63/(-$aoIcccccccccccccccca%21: 1'2(-76aycsocsmssquzsqzqwxocsmsspptuzt{tqoclsmssszpxvz{{pxocsmssqutpt{uqocsmssz{tzpuwvzoIcccccccccccccccca%21: 1'7$3(9$aycsmpzwwuv{sxoIcccccccccccccccca%(6+$8$ &721aycsoIcccccccccccccccca1$ 33/8ayc714$Icccccccccccc<oIcccccccccccca6$-621 2'$ayc>Iccccccccccccccccapayc>Icccccccccccccccccccca34!/(&$6&1(37(2-aycaps{scvscaoIcccccccccccccccccccca%2& /$-*7+ 21, /(9$'aycsmzpuw{poIcccccccccccccccccccca12//(-*+477$1(,$aycpwmzqtxoIcccccccccccccccccccca*812(,$67 ,3%%6$7aycqmxvtzIcccccccccccccccc<Icccccccccccc<Icccccccc<oIccccccccaqayc>Icccccccccccca34!/(&$6&1(37(2-ayca &.c, &12ckhc& ,$1 aoIcccccccccccca/'& 1 ,$7$16ayc>Icccccccccccccccca,2'$/ayca63/(-$aoIcccccccccccccccca%21: 1'2(-76aycsocsmsss{qqxtwqqxocsmssstupswqvwocsmsswuxxuvvxqocsmspupuuv{xocsmsqvsuxuqspoIcccccccccccccccca%21: 1'7$3(9$aycsmpt{xqztvoIcccccccccccccccca%(6+$8$ &721aycsoIcccccccccccccccca1$ 33/8ayc714$Icccccccccccc<oIcccccccccccca6$-621 2'$ayc>Iccccccccccccccccasayc>Icccccccccccccccccccca34!/(&$6&1(37(2-aycaps{scvsccwyvaoIcccccccccccccccccccca%2& /$-*7+ 21, /(9$'aycsmz{utqqoIcccccccccccccccccccca12//(-*+477$1(,$aycvpmqzpwoIcccccccccccccccccccca*812(,$67 ,3%%6$7aycvmuzzsIcccccccccccccccc<Icccccccccccc<Icccccccc<oIccccccccavayc>Icccccccccccca34!/(&$6&1(37(2-ayca &.c4:c& ,$1 aoIcccccccccccca/'& 1 ,$7$16ayc>Icccccccccccccccca,2'$/ayca63/(-$aoIcccccccccccccccca%21: 1'2(-76aycsocsmssstupz{uqxqocsmssvuupzwtwuocsmsps{{{xpvuocsmspxwwxwwwtocsmsqvzwtsvvxoIcccccccccccccccca%21: 1'7$3(9$aycsmqzwpqtqp{oIcccccccccccccccca%(6+$8$ &721aycsoIcccccccccccccccca1$ 33/8ayc714$Icccccccccccc<oIcccccccccccca6$-621 2'$ayc>Iccccccccccccccccasayc>Icccccccccccccccccccca34!/(&$6&1(37(2-aycaps{scvsccwyvaoIcccccccccccccccccccca%2& /$-*7+ 21, /(9$'aycsmwttxxuoIcccccccccccccccccccca12//(-*+477$1(,$aycvqmvqwwoIcccccccccccccccccccca*812(,$67 ,3%%6$7aycqmuwv{oIcccccccccccccccccccca,$6+(9$aycvvocqpIcccccccccccccccc<Icccccccccccc<Icccccccc<Icccc<I<I

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Version: 3
Date: 2022-03-08
Device: Rhode 5G+ - Sunny
Description: EIS & OIS (Sunny) Calibration
>Icccca34!/(&-%2ayc>Icccccccca5$16(2-aycvoIcccccccca' 7$aycaqsqqlsvls{aoIcccccccca'$5(&$ayca+2'$ct
nclc4--8aoIcccccccca'$6&1(37(2-aycacecck4--8hc /(!1 7(2-aIcccc<oIcccca,$7 2-5$17$121, 7ayca6$-621aoIcccca& ,$1 ayc>Iccccccccasayc>Icccccccccccca34!/(&$6&1(37(2-ayca &.c, (-c& ,$1 aoIcccccccccccca/'& 1 ,$7$16ayc>Icccccccccccccccca,2'$/ayca63/(-$aoIcccccccccccccccca%21: 1'2(-76aycsocsmssswtpptvqxoczmqqsv{{{t$lsuoclsmssqpx{wsp{woclsmsswzvq{uvtpoclsmssvxutwvuxtoIcccccccccccccccca%21: 1'7$3(9$aycsmptpwsx{stoIcccccccccccccccca%(6+$8$ &721aycsoIcccccccccccccccca1$ 33/8ayc714$Icccccccccccc<oIcccccccccccca6$-621 2'$ayc>Iccccccccccccccccapayc>Icccccccccccccccccccca34!/(&$6&1(37(2-aycaps{scvscaoIcccccccccccccccccccca%2& /$-*7+ 21, /(9$'aycsm{qttzwoIcccccccccccccccccccca12//(-*+477$1(,$aycvpmxus{oIcccccccccccccccccccca*812(,$67 ,3%%6$7aycvmtuxzoIcccccccccccccccccccca/$-626(7(2-221'(- 7$867$,ayc>Icccccccccccccccccccccccca71 -6/ 7(2-aycsmpt{{wpqqvocsmpuvvq{vzxoIcccccccccccccccccccccccca6& /(-*ayclsmsvtpvxvuzoclsmsvwwqsvszzoIcccccccccccccccccccccccca127 7(2-aycsmxpts{ssppoIcccccccccccccccccccccccca' 7 83$ayca+ //aIcccccccccccccccccccc<oIcccccccccccccccccccca/$-626(7(2-(,$67 ,3%%6$7aycsmxuwxIcccccccccccccccc<Icccccccccccc<Icccccccc<oIccccccccapayc>Icccccccccccca34!/(&$6&1(37(2-ayca12-7c& ,$1 aoIcccccccccccca/'& 1 ,$7$16ayc>Icccccccccccccccca,2'$/ayca63/(-$aoIcccccccccccccccca%21: 1'2(-76aycsocsmssquzsqzqwxocsmsspptuzt{tqoclsmssszpxvz{{pxocsmssqutpt{uqocsmssz{tzpuwvzoIcccccccccccccccca%21: 1'7$3(9$aycsmpzwwuv{sxoIcccccccccccccccca%(6+$8$ &721aycsoIcccccccccccccccca1$ 33/8ayc714$Icccccccccccc<oIcccccccccccca6$-621 2'$ayc>Iccccccccccccccccapayc>Icccccccccccccccccccca34!/(&$6&1(37(2-aycaps{scvscaoIcccccccccccccccccccca%2& /$-*7+ 21, /(9$'aycsmzpuw{poIcccccccccccccccccccca12//(-*+477$1(,$aycpwmzqtxoIcccccccccccccccccccca*812(,$67 ,3%%6$7aycqmxvtzIcccccccccccccccc<Icccccccccccc<Icccccccc<oIccccccccaqayc>Icccccccccccca34!/(&$6&1(37(2-ayca &.c, &12ckhc& ,$1 aoIcccccccccccca/'& 1 ,$7$16ayc>Icccccccccccccccca,2'$/ayca63/(-$aoIcccccccccccccccca%21: 1'2(-76aycsocsmsss{qqxtwqqxocsmssstupswqvwocsmsswuxxuvvxqocsmspupuuv{xocsmsqvsuxuqspoIcccccccccccccccca%21: 1'7$3(9$aycsmpt{xqztvoIcccccccccccccccca%(6+$8$ &721aycsoIcccccccccccccccca1$ 33/8ayc714$Icccccccccccc<oIcccccccccccca6$-621 2'$ayc>Iccccccccccccccccasayc>Icccccccccccccccccccca34!/(&$6&1(37(2-aycaps{scvsccwyvaoIcccccccccccccccccccca%2& /$-*7+ 21, /(9$'aycsmz{utqqoIcccccccccccccccccccca12//(-*+477$1(,$aycvpmqzpwoIcccccccccccccccccccca*812(,$67 ,3%%6$7aycvmuzzsIcccccccccccccccc<Icccccccccccc<Icccccccc<oIccccccccavayc>Icccccccccccca34!/(&$6&1(37(2-ayca &.c4:c& ,$1 aoIcccccccccccca/'& 1 ,$7$16ayc>Icccccccccccccccca,2'$/ayca63/(-$aoIcccccccccccccccca%21: 1'2(-76aycsocsmssstupz{uqxqocsmssvuupzwtwuocsmsps{{{xpvuocsmspxwwxwwwtocsmsqvzwtsvvxoIcccccccccccccccca%21: 1'7$3(9$aycsmqzwpqtqp{oIcccccccccccccccca%(6+$8$ &721aycsoIcccccccccccccccca1$ 33/8ayc714$Icccccccccccc<oIcccccccccccca6$-621 2'$ayc>Iccccccccccccccccasayc>Icccccccccccccccccccca34!/(&$6&1(37(2-aycaps{scvsccwyvaoIcccccccccccccccccccca%2& /$-*7+ 21, /(9$'aycsmwttxxuoIcccccccccccccccccccca12//(-*+477$1(,$aycvqmvqwwoIcccccccccccccccccccca*812(,$67 ,3%%6$7aycqmuwv{oIcccccccccccccccccccca,$6+(9$aycvvocqpIcccccccccccccccc<Icccccccccccc<Icccccccc<Icccc<I<I

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service focal_hal /vendor/bin/hw/android.hardware.biometrics.fingerprint@2.1-focalservice
# "class hal" causes a race condition on some devices due to files created
# in /data. As a workaround, postpone startup until later in boot once
# /data is mounted.
class late_start
user system
group system input uhid
disabled

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service ets_hal /vendor/bin/hw/android.hardware.biometrics.fingerprint@2.1-service-ets
# "class hal" causes a race condition on some devices due to files created
# in /data. As a workaround, postpone startup until later in boot once
# /data is mounted.
class late_start
user system
group system input uhid
disabled

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proprietary/vendor/etc/init/init.ets.rc vendored Normal file
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# Egistec fingerprint feature
on post-fs-data
mkdir /persist/egis 0770 system system
chmod 0660 /sys/devices/platform/egis_input/navigation_event
chmod 0660 /sys/devices/platform/egis_input/navigation_enable
chmod 0660 /sys/devices/soc/0.et320/etspi_enable
chown system system /sys/devices/platform/egis_input/navigation_enable
chown system system /sys/devices/platform/egis_input/navigation_event
chown system system /sys/devices/soc/0.et320/etspi_enable
restorecon /sys/devices/platform/egis_input/navigation_enable
restorecon /sys/devices/platform/egis_input/navigation_event
restorecon /sys/devices/soc/0.et320/etspi_enable
# Egistec fingerprint fp daemon start
# service etsd /system/bin/etsd
# user system
# group system input
# class late_start
on post-fs-data
# service-ets
on property:ro.vendor.hw.fps=false
stop ets_hal

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#################### This file is used by NXP NFC NCI HAL #####################
## Modified by Motorola Mobility LLC
## Version : Cypfr.4 (2021/06/09)
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x03
NXPLOG_NCIHAL_LOGLEVEL=0x03
NXPLOG_NCIX_LOGLEVEL=0x03
NXPLOG_NCIR_LOGLEVEL=0x03
NXPLOG_FWDNLD_LOGLEVEL=0x03
NXPLOG_TML_LOGLEVEL=0x03
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# File name for Firmware
NXP_FW_NAME="libsn100u_fw.so"
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NFC forum profile settings
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
#NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
# *** RFBOARD30x20FN FW VERSION = 01.10.5B ***
NXP_RF_CONF_BLK_1={
20, 02, DB, 04,
A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 18, 18, 18, 18, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, FF, 07, 13, 07, 05, 13,
A0, A4, 85, 14, 00, 01, 00, 00, 00, 00, 03, 00, 06, 00, 0A, 00, 0D, 00, 10, 00, 14, 00, 17, 00, 1B, 00, 1E, 00, 21, 00, 25, 00, 28, 00, 2C, 00, 2F, 00, 32, 00, 36, 00, 39, 00, 3D, 00, 40, 00, 43, 00, 47, 00, 4A, 00, 4E, 00, 51, 00, 54, 00, 58, 00, 5B, 00, 5E, 00, 62, 00, 65, 00, 69, 00, 6C, 00, 6F, 00, 73, 00, 76, 00, 7A, 00, 7D, 00, 80, 00, 84, 00, 87, 00, 8B, 00, 8E, 00, 91, 00, 95, 00, 98, 00, 9C, 00, 9F, 00, A2, 00, A6, 00, A9, 00, AC, 00, B0, 00, B3, 00, B7, 00, BA, 00, BD, 00, C1, 00, C4, 00, C8, 00, CB, 00, CE, 00, D2, 00, D5, 00,
A0, A5, 0D, 3B, 3B, 3B, 3B, 3B, 3B, FF, 03, 1F, 00, 3B, 00, 00,
A0, 6A, 10, 28, 00, 28, 00, 28, 00, 28, 00, 80, 02, 80, 02, 80, 02, 80, 02
}
NXP_RF_CONF_BLK_2={
20, 02, CC, 01,
A0, 34, C8, 23, 04, 3D, 01, 0D, 0C, FA, 00, 00, 00, 90, 01, 00, 00, 26, 02, 00, 00, BC, 02, 00, 00, 52, 03, 00, 00, E8, 03, 00, 00, B0, 04, 00, 00, 40, 06, 00, 00, 98, 08, 00, 00, B8, 0B, 00, 00, 94, 11, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 0D, 0C, FA, 00, 00, 00, 90, 01, 00, 00, 26, 02, 00, 00, BC, 02, 00, 00, 52, 03, 00, 00, E8, 03, 00, 00, B0, 04, 00, 00, 40, 06, 00, 00, 98, 08, 00, 00, B8, 0B, 00, 00, 94, 11, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00
}
NXP_RF_CONF_BLK_3={
20, 02, 66, 01,
A1, 0A, 62, 14, 08, F4, 33, 00, 00, F4, 33, 00, 00, F4, 33, 00, 00, F4, 33, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00
}
NXP_RF_CONF_BLK_4={
20, 02, F1, 01,
A0, A9, ED, 40, 2A, FF, 41, 24, FF, 42, 1F, FF, 43, 1A, FF, 44, 16, FF, 45, 12, FF, 46, 0F, FF, 47, 0C, FF, 07, 2A, F1, 48, 09, FF, 08, 23, F7, 49, 07, FF, 09, 1E, F7, 4A, 05, FF, 0A, 19, FA, 4B, 03, FF, 0B, 15, FA, 4C, 01, FF, 0C, 12, F5, 0D, 0F, F2, 0E, 0C, F2, 0F, 09, F5, 10, 06, FC, 11, 06, E2, 12, 02, FB, 13, 01, F0, 14, 00, E6, 15, 00, CF, 16, 00, BA, 17, 00, A7, 18, 00, 96, 19, 00, 87, 1A, 00, 79, 1B, 00, 6C, 1C, 00, 61, 1D, 00, 57, 1E, 00, 4E, 1F, 00, 46, 20, 00, 3F, 21, 00, 38, 22, 00, 32, 23, 00, 2D, 24, 00, 28, A5, 00, 48, A6, 00, 40, A7, 00, 39, A8, 00, 33, A9, 00, 2D, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28
}
NXP_RF_CONF_BLK_5={
20, 02, C5, 02,
A0, 0B, BB, 00, 1D, 01, 14, 6A, 2A, E8, 03, E8, 03, 06, 10, 0E, 2C, 01, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 00, 00, 00, 00,
A0, A6, 03, C0, 08, 08
}
NXP_RF_CONF_BLK_6={
20, 02, E9, 05,
A0, AB, 82, 27, 1B, 33, 04, 42, 04, 55, 04, 75, 04, 9E, 04, C7, 04, F0, 04, 20, 05, 4F, 05, 7F, 05, B8, 05, F2, 05, 2B, 06, 72, 06, BA, 06, 02, 07, 49, 07, 91, 07, F0, 07, 50, 08, AF, 08, 0F, 09, 6E, 09, E1, 09, 54, 0A, C6, 0A, 56, 0B, E5, 0B, 74, 0C, 04, 0D, 93, 0D, 52, 0E, 11, 0F, D0, 0F, 8F, 10, 4F, 11, 0E, 12, 2C, 13, 4B, 14, 6A, 15, 88, 16, A7, 17, C6, 18, 44, 1A, C2, 1B, 41, 1D, BF, 1E, 9D, 20, 7B, 22, 58, 24, 96, 26, D3, 28, 11, 2B, 4E, 2D, 4B, 30, 47, 33, 44, 36, 40, 39, 3D, 3C, A2, 3F, 07, 43, 6C, 46, E6, 4A, 61, 4F,
A0, A7, 0B, 00, 02, 77, 17, 1F, 1F, 1F, 0A, FF, 19, 05,
A0, A8, 38, 00, 33, 33, 10, 00, 33, 23, 10, 00, 33, 24, 10, 4B, 23, 44, 10, CF, 22, 43, 10, CF, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, 00, 33, 22, 10, C0, 22, 23, 10, 00, 33, 22, 10, C0, 22, 23, 10,
A0, 98, 08, 6E, D3, 16, 80, 2A, 6E, 6E, 6E,
A0, 9E, 0C, 0F, D3, 16, 96, 00, 2C, 01, 2B, 25, 02, 00, 00
}
NXP_RF_CONF_BLK_7={
20, 02, FB, 14,
A0, C6, 5B, 00, 00, 04, 00, 00, 00, 3C, 00, 00, 00, 20, 80, FF, 01, 00, 00, 64, 00, 00, C0, 00, 00, 00, C0, 00, 00, 00, 01, 01, 01, 20, 01, 03, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
A0, 0D, 06, 10, C9, 30, 00, 40, 00,
A0, 0D, 03, 24, 29, 07,
A0, 0D, 03, 24, 30, 07,
A0, 0D, 03, 25, 29, 01,
A0, 0D, 03, 25, 30, 01,
A0, 0D, 06, 40, 42, F0, C1, 37, CC,
A0, 0D, 06, 41, 45, 31, 12, 00, 00,
A0, 0D, 03, 42, 7C, 54,
A0, 0D, 06, 42, 8D, 00, A0, A4, 64,
A0, 0D, 06, 42, 8B, 00, A2, 23, 00,
A0, 0D, 06, 42, 89, 7F, 12, BD, 01,
A0, 0D, 06, 42, 44, 00, B0, 66, 01,
A0, 0D, 06, 42, 43, 24, 24, 4D, ED,
A0, 0D, 06, 42, 41, FD, FF, 5F, F0,
A0, 0D, 06, 42, 40, 08, 77, 33, 3A,
A0, 0D, 06, 42, 4A, 00, 00, 00, 00,
A0, 0D, 06, 42, 49, 00, 00, 00, 00,
A0, 0D, 06, 51, 40, 12, 77, 33, 3A,
A0, 0D, 06, 43, 44, 00, 34, 52, 01
}
NXP_RF_CONF_BLK_8={
20, 02, FD, 1C,
A0, 0D, 06, 43, 43, A5, 64, 4C, AD,
A0, 0D, 06, 43, 40, 05, 77, 33, 3D,
A0, 0D, 06, 43, 4A, 00, 00, 00, 00,
A0, 0D, 06, 43, 49, 00, 00, 00, 00,
A0, 0D, 06, 44, 44, 00, 34, 52, 01,
A0, 0D, 06, 44, 43, A5, 64, 4C, AD,
A0, 0D, 06, 44, 40, 05, 77, 33, 3D,
A0, 0D, 06, 44, 4A, 00, 00, 00, 00,
A0, 0D, 06, 44, 49, 00, 00, 00, 00,
A0, 0D, 06, 45, 44, 00, 34, 52, 01,
A0, 0D, 06, 45, 43, A5, 64, 4C, AD,
A0, 0D, 06, 45, 40, 05, 77, 33, 3D,
A0, 0D, 06, 45, 4A, 00, 00, 00, 00,
A0, 0D, 06, 45, 49, 00, 00, 00, 00,
A0, 0D, 06, 46, 45, 39, 12, 00, 00,
A0, 0D, 06, 46, 44, 00, 34, 52, 01,
A0, 0D, 06, 47, 43, A5, 64, 4C, ED,
A0, 0D, 06, 47, 40, 05, 77, 33, 3D,
A0, 0D, 06, 47, 4A, 20, AA, 0B, 81,
A0, 0D, 06, 47, 49, B5, 44, 22, 00,
A0, 0D, 06, 48, 43, A5, 64, 4C, AD,
A0, 0D, 06, 48, 40, 05, 77, 33, 3D,
A0, 0D, 06, 48, 4A, 00, 00, 00, 00,
A0, 0D, 06, 48, 49, 00, 00, 00, 00,
A0, 0D, 06, 49, 43, A5, 64, 4C, AD,
A0, 0D, 06, 49, 40, 05, 77, 33, 3D,
A0, 0D, 06, 49, 4A, 00, 00, 00, 00,
A0, 0D, 06, 49, 49, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_9={
20, 02, FA, 1C,
A0, 0D, 06, 4A, 8B, 48, 02, F0, 80,
A0, 0D, 06, 4A, 43, A5, 64, 4C, AD,
A0, 0D, 06, 4A, 40, 05, 77, 33, 3D,
A0, 0D, 06, 4A, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4A, 49, 00, 00, 00, 00,
A0, 0D, 06, 4B, 43, A5, 64, 4C, 6D,
A0, 0D, 06, 4C, 44, 00, 34, 52, 01,
A0, 0D, 06, 4C, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4C, 49, 00, 00, 00, 00,
A0, 0D, 06, 4C, 40, 85, 51, 33, 3D,
A0, 0D, 06, 4D, 44, 00, 34, 52, 01,
A0, 0D, 06, 4D, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4D, 49, 00, 00, 00, 00,
A0, 0D, 06, 4D, 40, 85, 51, 33, 3D,
A0, 0D, 06, 4E, 45, 31, 12, 00, 00,
A0, 0D, 03, 4E, 7C, 50,
A0, 0D, 06, 4E, 8D, 00, 00, 00, 06,
A0, 0D, 06, 4E, 8B, 00, A2, 24, 00,
A0, 0D, 06, 4E, 89, 7D, 84, 05, 08,
A0, 0D, 06, 4E, 44, 00, B0, 66, 01,
A0, 0D, 06, 4E, 43, A5, 64, 5C, AD,
A0, 0D, 06, 4E, 41, FD, FF, 5F, F0,
A0, 0D, 06, 4E, 40, 07, 77, 33, 3D,
A0, 0D, 06, 4F, 4A, 2A, 8E, 8D, 2A,
A0, 0D, 06, 4F, 49, 5D, 27, 27, 00,
A0, 0D, 06, 50, 4A, 00, 00, 00, 00,
A0, 0D, 06, 50, 49, 00, 00, 00, 00,
A0, 0D, 06, 52, 4A, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_10={
20, 02, FD, 1C,
A0, 0D, 06, 52, 49, 00, 00, 00, 00,
A0, 0D, 06, 53, 4A, 00, 00, 00, 00,
A0, 0D, 06, 53, 49, 00, 00, 00, 00,
A0, 0D, 06, 60, 4E, FF, FF, FF, 01,
A0, 0D, 06, 60, 4F, FF, FF, FF, 01,
A0, 0D, 06, 60, 50, FF, FF, FF, 3F,
A0, 0D, 06, 80, 7D, A0, 00, 9E, BB,
A0, 0D, 06, 80, 80, B8, 5A, 0D, 00,
A0, 0D, 06, 80, C9, 30, 00, 00, 00,
A0, 0D, 06, 8C, 80, B8, 5A, 0D, 00,
A0, 0D, 06, 90, 4F, FF, FF, FF, 01,
A0, 0D, 06, 90, 4E, FF, FF, FF, 01,
A0, 0D, 06, 90, 39, 3F, 00, 00, 7F,
A0, 0D, 06, 9B, A9, 84, 00, 00, 00,
A0, 0D, 06, 9B, A1, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 99, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 95, FF, 00, 0F, 00,
A0, 0D, 06, 9B, A5, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 9D, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9B, 4F, FF, FF, FF, 01,
A0, 0D, 06, 9B, 4E, FF, FF, FF, 01,
A0, 0D, 06, 91, D4, F8, 84, EF, 03,
A0, 0D, 06, 91, D2, 4A, 4A, 4B, 38,
A0, 0D, 06, 9C, A9, 84, 00, 00, 00,
A0, 0D, 06, 9C, A1, 7F, 22, 5F, 00,
A0, 0D, 06, 9C, 99, 7F, 22, 7F, 7F,
A0, 0D, 06, 9C, 95, FF, 00, 0F, 00
}
NXP_RF_CONF_BLK_11={
20, 02, F5, 17,
A0, 0D, 06, 9C, A5, 7F, 22, 5F, 00,
A0, 0D, 06, 9C, 9D, 7F, 22, 7F, 7F,
A0, 0D, 06, 9C, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9C, 4F, 9F, 88, FF, 01,
A0, 0D, 06, 9C, 4E, 9F, 88, FF, 01,
A0, 0D, 06, 95, D4, F8, 84, 75, 00,
A0, 0D, 06, 95, D2, 4A, 4B, 4B, 58,
A0, 0D, 06, 9D, A9, 84, 00, 00, 00,
A0, 0D, 06, 9D, A1, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 99, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 95, FF, 00, 0F, 00,
A0, 0D, 06, 9D, A5, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 9D, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9D, 4F, FF, FF, FF, 01,
A0, 0D, 06, 9D, 4E, FF, FF, FF, 01,
A0, 0D, 06, 99, D4, F8, 04, E4, 01,
A0, 0D, 06, 99, D2, 4A, 4B, 4B, 48,
A0, AF, 09, 10, 5F, 00, 18, 10, 5F, 00, 18, 00,
A0, 92, 28, 37, 00, 1B, 00, FC, 81, 0F, 00, 22, 80, 0F, 00, 14, 00, 20, 70, EA, 01, 43, 18, 32, 16, 78, 30, 0D, 00, 03, 55, EA, 05, 01, 04, 68, 02, 3F, 92, 04, 00, 0C, 13,
A0, 1F, 06, 63, 00, 42, 00, 14, 00,
A0, 9A, 02, 95, 01,
A0, 99, 0A, 03, 00, 80, 00, 00, 80, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_12={
20, 02, 3B, 03,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, D0, 07, 00, 0F, FF, 7F, 00, 0F, FF, 7F, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0D, 03, 61, 09, 7E,
A0, 85, 04, 58, 08, A8, AC
}
## DLMA Enable | VDDPA 3.9
## LMA (CLK) A+B - (CLK-LESS) A/B/F 32 - 57.7/28.2/55.3 | RSSI 0x134F | H 8A/m
## LPDET 150 | NFCLD 300 | Ratio 43 | GreenCar 600
## Tx first entry 3/6
NXP_RF_CONF_BLK_13={
20, 02, F2, 04,
A0, AF, 09, 11, 20, 00, 18, 11, 20, 00, 18, 00,
A0, 98, 08, 20, 4F, 13, 80, 18, 39, 1C, 37,
A0, 34, C8, 23, 04, 3D, 01, 04, 19, CB, 05, 00, 00, 3E, 07, 00, 00, B0, 08, 00, 00, B0, 08, 00, 00, E5, 09, 00, 00, E5, 09, 00, 00, 58, 0B, 00, 00, 58, 0B, 00, 00, E1, 0D, 00, 00, 4B, 10, 00, 00, 4B, 10, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 06, 19, B9, 00, 00, 00, 35, 01, 00, 00, CF, 01, 00, 00, 2C, 02, 00, 00, C7, 02, 00, 00, 23, 03, 00, 00, DD, 03, 00, 00, 30, 05, 00, 00, 00, 07, 00, 00, A8, 09, 00, 00, 7B, 0E, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00,
A0, 9E, 0C, 07, 4F, 13, 96, 00, 2C, 01, 2B, 58, 02, 00, 00
}
NXP_RF_CONF_BLK_14={
20, 02, F1, 01,
A0, A9, ED, 00, 2A, FF, 01, 24, FF, 02, 1F, FF, 03, 1A, FF, 04, 16, FF, 05, 12, FF, 06, 0F, FF, 07, 0C, FF, 08, 09, FF, 09, 07, FF, 0A, 05, FF, 0B, 03, FF, 0C, 01, FF, 0D, 00, F5, 0E, 00, DC, 0F, 00, C6, 10, 00, B3, 11, 00, A2, 12, 00, 92, 13, 00, 84, 14, 00, 77, 15, 00, 6B, 16, 00, 60, 17, 00, 57, 18, 00, 4E, 19, 00, 46, 1A, 00, 3F, 1B, 00, 39, 1C, 00, 33, 1D, 00, 2E, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A
}
NXP_RF_CONF_MAX_NUM=14
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3F, 05,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A1, 13, 01, 32,
A0, 80, 02, FA, 00
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x3B
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x01
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x02
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x02
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# Disable 0x00
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
###################################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0 & Byte1
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events Card Emulation (ISO14443-3, Modulation detected, RF Field ON/OFF)
#Byte 1:
# Enable RSSI 0x01 Byte1 Byte0
# Disable RSSI 0x00 \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0110 ==> L1 with RSSI
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_SYS_CODE_PWR_STATE=0x3B
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
################################################################################
# This will enable power state required for GSMA testing.
# When this is enabled , then default AID route power state is added with this power state
# If any aid with power state 0 is added, then this power state is used.
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
#DEFUALT_GSMA_PWR_STATE=0x3B
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################

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#################### This file is used by NXP NFC NCI HAL #####################
## Modified by Motorola Mobility LLC
## Version : Cypfr.4 (2021/06/09)
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x03
NXPLOG_NCIHAL_LOGLEVEL=0x03
NXPLOG_NCIX_LOGLEVEL=0x03
NXPLOG_NCIR_LOGLEVEL=0x03
NXPLOG_FWDNLD_LOGLEVEL=0x03
NXPLOG_TML_LOGLEVEL=0x03
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# File name for Firmware
NXP_FW_NAME="libsn100u_fw.so"
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NFC forum profile settings
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
#NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
# *** RFBOARD30x20FN FW VERSION = 01.10.5B ***
NXP_RF_CONF_BLK_1={
20, 02, DB, 04,
A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 18, 18, 18, 18, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, FF, 07, 13, 07, 05, 13,
A0, A4, 85, 14, 00, 01, 00, 00, 00, 00, 03, 00, 06, 00, 0A, 00, 0D, 00, 10, 00, 14, 00, 17, 00, 1B, 00, 1E, 00, 21, 00, 25, 00, 28, 00, 2C, 00, 2F, 00, 32, 00, 36, 00, 39, 00, 3D, 00, 40, 00, 43, 00, 47, 00, 4A, 00, 4E, 00, 51, 00, 54, 00, 58, 00, 5B, 00, 5E, 00, 62, 00, 65, 00, 69, 00, 6C, 00, 6F, 00, 73, 00, 76, 00, 7A, 00, 7D, 00, 80, 00, 84, 00, 87, 00, 8B, 00, 8E, 00, 91, 00, 95, 00, 98, 00, 9C, 00, 9F, 00, A2, 00, A6, 00, A9, 00, AC, 00, B0, 00, B3, 00, B7, 00, BA, 00, BD, 00, C1, 00, C4, 00, C8, 00, CB, 00, CE, 00, D2, 00, D5, 00,
A0, A5, 0D, 3B, 3B, 3B, 3B, 3B, 3B, FF, 03, 1F, 00, 3B, 00, 00,
A0, 6A, 10, 28, 00, 28, 00, 28, 00, 28, 00, 80, 02, 80, 02, 80, 02, 80, 02
}
NXP_RF_CONF_BLK_2={
20, 02, CC, 01,
A0, 34, C8, 23, 04, 3D, 01, 0D, 0C, FA, 00, 00, 00, 90, 01, 00, 00, 26, 02, 00, 00, BC, 02, 00, 00, 52, 03, 00, 00, E8, 03, 00, 00, B0, 04, 00, 00, 40, 06, 00, 00, 98, 08, 00, 00, B8, 0B, 00, 00, 94, 11, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 0D, 0C, FA, 00, 00, 00, 90, 01, 00, 00, 26, 02, 00, 00, BC, 02, 00, 00, 52, 03, 00, 00, E8, 03, 00, 00, B0, 04, 00, 00, 40, 06, 00, 00, 98, 08, 00, 00, B8, 0B, 00, 00, 94, 11, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00
}
NXP_RF_CONF_BLK_3={
20, 02, 66, 01,
A1, 0A, 62, 14, 08, F4, 33, 00, 00, F4, 33, 00, 00, F4, 33, 00, 00, F4, 33, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00
}
NXP_RF_CONF_BLK_4={
20, 02, F1, 01,
A0, A9, ED, 40, 2A, FF, 41, 24, FF, 42, 1F, FF, 43, 1A, FF, 44, 16, FF, 45, 12, FF, 46, 0F, FF, 47, 0C, FF, 07, 2A, F1, 48, 09, FF, 08, 23, F7, 49, 07, FF, 09, 1E, F7, 4A, 05, FF, 0A, 19, FA, 4B, 03, FF, 0B, 15, FA, 4C, 01, FF, 0C, 12, F5, 0D, 0F, F2, 0E, 0C, F2, 0F, 09, F5, 10, 06, FC, 11, 06, E2, 12, 02, FB, 13, 01, F0, 14, 00, E6, 15, 00, CF, 16, 00, BA, 17, 00, A7, 18, 00, 96, 19, 00, 87, 1A, 00, 79, 1B, 00, 6C, 1C, 00, 61, 1D, 00, 57, 1E, 00, 4E, 1F, 00, 46, 20, 00, 3F, 21, 00, 38, 22, 00, 32, 23, 00, 2D, 24, 00, 28, A5, 00, 48, A6, 00, 40, A7, 00, 39, A8, 00, 33, A9, 00, 2D, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28
}
NXP_RF_CONF_BLK_5={
20, 02, C5, 02,
A0, 0B, BB, 00, 1D, 01, 14, 6A, 2A, E8, 03, E8, 03, 06, 10, 0E, 2C, 01, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 00, 00, 00, 00,
A0, A6, 03, C0, 08, 08
}
NXP_RF_CONF_BLK_6={
20, 02, E9, 05,
A0, AB, 82, 27, 1B, 33, 04, 42, 04, 55, 04, 75, 04, 9E, 04, C7, 04, F0, 04, 20, 05, 4F, 05, 7F, 05, B8, 05, F2, 05, 2B, 06, 72, 06, BA, 06, 02, 07, 49, 07, 91, 07, F0, 07, 50, 08, AF, 08, 0F, 09, 6E, 09, E1, 09, 54, 0A, C6, 0A, 56, 0B, E5, 0B, 74, 0C, 04, 0D, 93, 0D, 52, 0E, 11, 0F, D0, 0F, 8F, 10, 4F, 11, 0E, 12, 2C, 13, 4B, 14, 6A, 15, 88, 16, A7, 17, C6, 18, 44, 1A, C2, 1B, 41, 1D, BF, 1E, 9D, 20, 7B, 22, 58, 24, 96, 26, D3, 28, 11, 2B, 4E, 2D, 4B, 30, 47, 33, 44, 36, 40, 39, 3D, 3C, A2, 3F, 07, 43, 6C, 46, E6, 4A, 61, 4F,
A0, A7, 0B, 00, 02, 77, 17, 1F, 1F, 1F, 0A, FF, 19, 05,
A0, A8, 38, 00, 33, 33, 10, 00, 33, 23, 10, 00, 33, 24, 10, 4B, 23, 44, 10, CF, 22, 43, 10, CF, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, 00, 33, 22, 10, C0, 22, 23, 10, 00, 33, 22, 10, C0, 22, 23, 10,
A0, 98, 08, 6E, D3, 16, 80, 2A, 6E, 6E, 6E,
A0, 9E, 0C, 0F, D3, 16, 96, 00, 2C, 01, 2B, 25, 02, 00, 00
}
NXP_RF_CONF_BLK_7={
20, 02, FB, 14,
A0, C6, 5B, 00, 00, 04, 00, 00, 00, 3C, 00, 00, 00, 20, 80, FF, 01, 00, 00, 64, 00, 00, C0, 00, 00, 00, C0, 00, 00, 00, 01, 01, 01, 20, 01, 03, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
A0, 0D, 06, 10, C9, 30, 00, 40, 00,
A0, 0D, 03, 24, 29, 07,
A0, 0D, 03, 24, 30, 07,
A0, 0D, 03, 25, 29, 01,
A0, 0D, 03, 25, 30, 01,
A0, 0D, 06, 40, 42, F0, C1, 37, CC,
A0, 0D, 06, 41, 45, 31, 12, 00, 00,
A0, 0D, 03, 42, 7C, 54,
A0, 0D, 06, 42, 8D, 00, A0, A4, 64,
A0, 0D, 06, 42, 8B, 00, A2, 23, 00,
A0, 0D, 06, 42, 89, 7F, 12, BD, 01,
A0, 0D, 06, 42, 44, 00, B0, 66, 01,
A0, 0D, 06, 42, 43, 24, 24, 4D, ED,
A0, 0D, 06, 42, 41, FD, FF, 5F, F0,
A0, 0D, 06, 42, 40, 08, 77, 33, 3A,
A0, 0D, 06, 42, 4A, 00, 00, 00, 00,
A0, 0D, 06, 42, 49, 00, 00, 00, 00,
A0, 0D, 06, 51, 40, 12, 77, 33, 3A,
A0, 0D, 06, 43, 44, 00, 34, 52, 01
}
NXP_RF_CONF_BLK_8={
20, 02, FD, 1C,
A0, 0D, 06, 43, 43, A5, 64, 4C, AD,
A0, 0D, 06, 43, 40, 05, 77, 33, 3D,
A0, 0D, 06, 43, 4A, 00, 00, 00, 00,
A0, 0D, 06, 43, 49, 00, 00, 00, 00,
A0, 0D, 06, 44, 44, 00, 34, 52, 01,
A0, 0D, 06, 44, 43, A5, 64, 4C, AD,
A0, 0D, 06, 44, 40, 05, 77, 33, 3D,
A0, 0D, 06, 44, 4A, 00, 00, 00, 00,
A0, 0D, 06, 44, 49, 00, 00, 00, 00,
A0, 0D, 06, 45, 44, 00, 34, 52, 01,
A0, 0D, 06, 45, 43, A5, 64, 4C, AD,
A0, 0D, 06, 45, 40, 05, 77, 33, 3D,
A0, 0D, 06, 45, 4A, 00, 00, 00, 00,
A0, 0D, 06, 45, 49, 00, 00, 00, 00,
A0, 0D, 06, 46, 45, 39, 12, 00, 00,
A0, 0D, 06, 46, 44, 00, 34, 52, 01,
A0, 0D, 06, 47, 43, A5, 64, 4C, ED,
A0, 0D, 06, 47, 40, 05, 77, 33, 3D,
A0, 0D, 06, 47, 4A, 20, AA, 0B, 81,
A0, 0D, 06, 47, 49, B5, 44, 22, 00,
A0, 0D, 06, 48, 43, A5, 64, 4C, AD,
A0, 0D, 06, 48, 40, 05, 77, 33, 3D,
A0, 0D, 06, 48, 4A, 00, 00, 00, 00,
A0, 0D, 06, 48, 49, 00, 00, 00, 00,
A0, 0D, 06, 49, 43, A5, 64, 4C, AD,
A0, 0D, 06, 49, 40, 05, 77, 33, 3D,
A0, 0D, 06, 49, 4A, 00, 00, 00, 00,
A0, 0D, 06, 49, 49, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_9={
20, 02, FA, 1C,
A0, 0D, 06, 4A, 8B, 48, 02, F0, 80,
A0, 0D, 06, 4A, 43, A5, 64, 4C, AD,
A0, 0D, 06, 4A, 40, 05, 77, 33, 3D,
A0, 0D, 06, 4A, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4A, 49, 00, 00, 00, 00,
A0, 0D, 06, 4B, 43, A5, 64, 4C, 6D,
A0, 0D, 06, 4C, 44, 00, 34, 52, 01,
A0, 0D, 06, 4C, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4C, 49, 00, 00, 00, 00,
A0, 0D, 06, 4C, 40, 85, 51, 33, 3D,
A0, 0D, 06, 4D, 44, 00, 34, 52, 01,
A0, 0D, 06, 4D, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4D, 49, 00, 00, 00, 00,
A0, 0D, 06, 4D, 40, 85, 51, 33, 3D,
A0, 0D, 06, 4E, 45, 31, 12, 00, 00,
A0, 0D, 03, 4E, 7C, 50,
A0, 0D, 06, 4E, 8D, 00, 00, 00, 06,
A0, 0D, 06, 4E, 8B, 00, A2, 24, 00,
A0, 0D, 06, 4E, 89, 7D, 84, 05, 08,
A0, 0D, 06, 4E, 44, 00, B0, 66, 01,
A0, 0D, 06, 4E, 43, A5, 64, 5C, AD,
A0, 0D, 06, 4E, 41, FD, FF, 5F, F0,
A0, 0D, 06, 4E, 40, 07, 77, 33, 3D,
A0, 0D, 06, 4F, 4A, 2A, 8E, 8D, 2A,
A0, 0D, 06, 4F, 49, 5D, 27, 27, 00,
A0, 0D, 06, 50, 4A, 00, 00, 00, 00,
A0, 0D, 06, 50, 49, 00, 00, 00, 00,
A0, 0D, 06, 52, 4A, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_10={
20, 02, FD, 1C,
A0, 0D, 06, 52, 49, 00, 00, 00, 00,
A0, 0D, 06, 53, 4A, 00, 00, 00, 00,
A0, 0D, 06, 53, 49, 00, 00, 00, 00,
A0, 0D, 06, 60, 4E, FF, FF, FF, 01,
A0, 0D, 06, 60, 4F, FF, FF, FF, 01,
A0, 0D, 06, 60, 50, FF, FF, FF, 3F,
A0, 0D, 06, 80, 7D, A0, 00, 9E, BB,
A0, 0D, 06, 80, 80, B8, 5A, 0D, 00,
A0, 0D, 06, 80, C9, 30, 00, 00, 00,
A0, 0D, 06, 8C, 80, B8, 5A, 0D, 00,
A0, 0D, 06, 90, 4F, FF, FF, FF, 01,
A0, 0D, 06, 90, 4E, FF, FF, FF, 01,
A0, 0D, 06, 90, 39, 3F, 00, 00, 7F,
A0, 0D, 06, 9B, A9, 84, 00, 00, 00,
A0, 0D, 06, 9B, A1, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 99, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 95, FF, 00, 0F, 00,
A0, 0D, 06, 9B, A5, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 9D, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9B, 4F, FF, FF, FF, 01,
A0, 0D, 06, 9B, 4E, FF, FF, FF, 01,
A0, 0D, 06, 91, D4, F8, 84, EF, 03,
A0, 0D, 06, 91, D2, 4A, 4A, 4B, 38,
A0, 0D, 06, 9C, A9, 84, 00, 00, 00,
A0, 0D, 06, 9C, A1, 7F, 22, 5F, 00,
A0, 0D, 06, 9C, 99, 7F, 22, 7F, 7F,
A0, 0D, 06, 9C, 95, FF, 00, 0F, 00
}
NXP_RF_CONF_BLK_11={
20, 02, F5, 17,
A0, 0D, 06, 9C, A5, 7F, 22, 5F, 00,
A0, 0D, 06, 9C, 9D, 7F, 22, 7F, 7F,
A0, 0D, 06, 9C, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9C, 4F, 9F, 88, FF, 01,
A0, 0D, 06, 9C, 4E, 9F, 88, FF, 01,
A0, 0D, 06, 95, D4, F8, 84, 75, 00,
A0, 0D, 06, 95, D2, 4A, 4B, 4B, 58,
A0, 0D, 06, 9D, A9, 84, 00, 00, 00,
A0, 0D, 06, 9D, A1, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 99, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 95, FF, 00, 0F, 00,
A0, 0D, 06, 9D, A5, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 9D, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9D, 4F, FF, FF, FF, 01,
A0, 0D, 06, 9D, 4E, FF, FF, FF, 01,
A0, 0D, 06, 99, D4, F8, 04, E4, 01,
A0, 0D, 06, 99, D2, 4A, 4B, 4B, 48,
A0, AF, 09, 10, 5F, 00, 18, 10, 5F, 00, 18, 00,
A0, 92, 28, 37, 00, 1B, 00, FC, 81, 0F, 00, 22, 80, 0F, 00, 14, 00, 20, 70, EA, 01, 43, 18, 32, 16, 78, 30, 0D, 00, 03, 55, EA, 05, 01, 04, 68, 02, 3F, 92, 04, 00, 0C, 13,
A0, 1F, 06, 63, 00, 42, 00, 14, 00,
A0, 9A, 02, 95, 01,
A0, 99, 0A, 03, 00, 80, 00, 00, 80, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_12={
20, 02, 3B, 03,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, D0, 07, 00, 0F, FF, 7F, 00, 0F, FF, 7F, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0D, 03, 61, 09, 7E,
A0, 85, 04, 58, 08, A8, AC
}
## DLMA Enable | VDDPA 3.9
## LMA (CLK) A+B - (CLK-LESS) A/B/F 32 - 57.7/28.2/55.3 | RSSI 0x134F | H 8A/m
## LPDET 150 | NFCLD 300 | Ratio 43 | GreenCar 600
## Tx first entry 3/6
NXP_RF_CONF_BLK_13={
20, 02, F2, 04,
A0, AF, 09, 11, 20, 00, 18, 11, 20, 00, 18, 00,
A0, 98, 08, 20, 4F, 13, 80, 18, 39, 1C, 37,
A0, 34, C8, 23, 04, 3D, 01, 04, 19, CB, 05, 00, 00, 3E, 07, 00, 00, B0, 08, 00, 00, B0, 08, 00, 00, E5, 09, 00, 00, E5, 09, 00, 00, 58, 0B, 00, 00, 58, 0B, 00, 00, E1, 0D, 00, 00, 4B, 10, 00, 00, 4B, 10, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 06, 19, B9, 00, 00, 00, 35, 01, 00, 00, CF, 01, 00, 00, 2C, 02, 00, 00, C7, 02, 00, 00, 23, 03, 00, 00, DD, 03, 00, 00, 30, 05, 00, 00, 00, 07, 00, 00, A8, 09, 00, 00, 7B, 0E, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00,
A0, 9E, 0C, 07, 4F, 13, 96, 00, 2C, 01, 2B, 58, 02, 00, 00
}
NXP_RF_CONF_BLK_14={
20, 02, F1, 01,
A0, A9, ED, 00, 2A, FF, 01, 24, FF, 02, 1F, FF, 03, 1A, FF, 04, 16, FF, 05, 12, FF, 06, 0F, FF, 07, 0C, FF, 08, 09, FF, 09, 07, FF, 0A, 05, FF, 0B, 03, FF, 0C, 01, FF, 0D, 00, F5, 0E, 00, DC, 0F, 00, C6, 10, 00, B3, 11, 00, A2, 12, 00, 92, 13, 00, 84, 14, 00, 77, 15, 00, 6B, 16, 00, 60, 17, 00, 57, 18, 00, 4E, 19, 00, 46, 1A, 00, 3F, 1B, 00, 39, 1C, 00, 33, 1D, 00, 2E, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A
}
NXP_RF_CONF_MAX_NUM=14
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3F, 05,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A1, 13, 01, 32,
A0, 80, 02, FA, 00
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x3B
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x01
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x02
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x02
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# Disable 0x00
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
###################################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0 & Byte1
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events Card Emulation (ISO14443-3, Modulation detected, RF Field ON/OFF)
#Byte 1:
# Enable RSSI 0x01 Byte1 Byte0
# Disable RSSI 0x00 \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0110 ==> L1 with RSSI
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_SYS_CODE_PWR_STATE=0x3B
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
################################################################################
# This will enable power state required for GSMA testing.
# When this is enabled , then default AID route power state is added with this power state
# If any aid with power state 0 is added, then this power state is used.
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
#DEFUALT_GSMA_PWR_STATE=0x3B
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################

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#################### This file is used by NXP NFC NCI HAL #####################
## Modified by Motorola Mobility LLC
## Version : Cypfr.4 (2021/06/09)
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x03
NXPLOG_NCIHAL_LOGLEVEL=0x03
NXPLOG_NCIX_LOGLEVEL=0x03
NXPLOG_NCIR_LOGLEVEL=0x03
NXPLOG_FWDNLD_LOGLEVEL=0x03
NXPLOG_TML_LOGLEVEL=0x03
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# File name for Firmware
NXP_FW_NAME="libsn100u_fw.so"
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NFC forum profile settings
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
#NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
# *** RFBOARD30x20FN FW VERSION = 01.10.5B ***
NXP_RF_CONF_BLK_1={
20, 02, DB, 04,
A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 18, 18, 18, 18, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, FF, 07, 13, 07, 05, 13,
A0, A4, 85, 14, 00, 01, 00, 00, 00, 00, 03, 00, 06, 00, 0A, 00, 0D, 00, 10, 00, 14, 00, 17, 00, 1B, 00, 1E, 00, 21, 00, 25, 00, 28, 00, 2C, 00, 2F, 00, 32, 00, 36, 00, 39, 00, 3D, 00, 40, 00, 43, 00, 47, 00, 4A, 00, 4E, 00, 51, 00, 54, 00, 58, 00, 5B, 00, 5E, 00, 62, 00, 65, 00, 69, 00, 6C, 00, 6F, 00, 73, 00, 76, 00, 7A, 00, 7D, 00, 80, 00, 84, 00, 87, 00, 8B, 00, 8E, 00, 91, 00, 95, 00, 98, 00, 9C, 00, 9F, 00, A2, 00, A6, 00, A9, 00, AC, 00, B0, 00, B3, 00, B7, 00, BA, 00, BD, 00, C1, 00, C4, 00, C8, 00, CB, 00, CE, 00, D2, 00, D5, 00,
A0, A5, 0D, 3B, 3B, 3B, 3B, 3B, 3B, FF, 03, 1F, 00, 3B, 00, 00,
A0, 6A, 10, 28, 00, 28, 00, 28, 00, 28, 00, 80, 02, 80, 02, 80, 02, 80, 02
}
NXP_RF_CONF_BLK_2={
20, 02, CC, 01,
A0, 34, C8, 23, 04, 3D, 01, 0D, 0C, FA, 00, 00, 00, 90, 01, 00, 00, 26, 02, 00, 00, BC, 02, 00, 00, 52, 03, 00, 00, E8, 03, 00, 00, B0, 04, 00, 00, 40, 06, 00, 00, 98, 08, 00, 00, B8, 0B, 00, 00, 94, 11, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 0D, 0C, FA, 00, 00, 00, 90, 01, 00, 00, 26, 02, 00, 00, BC, 02, 00, 00, 52, 03, 00, 00, E8, 03, 00, 00, B0, 04, 00, 00, 40, 06, 00, 00, 98, 08, 00, 00, B8, 0B, 00, 00, 94, 11, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00
}
NXP_RF_CONF_BLK_3={
20, 02, 66, 01,
A1, 0A, 62, 14, 08, F4, 33, 00, 00, F4, 33, 00, 00, F4, 33, 00, 00, F4, 33, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00
}
NXP_RF_CONF_BLK_4={
20, 02, F1, 01,
A0, A9, ED, 40, 2A, FF, 41, 24, FF, 42, 1F, FF, 43, 1A, FF, 44, 16, FF, 45, 12, FF, 46, 0F, FF, 47, 0C, FF, 07, 2A, F1, 48, 09, FF, 08, 23, F7, 49, 07, FF, 09, 1E, F7, 4A, 05, FF, 0A, 19, FA, 4B, 03, FF, 0B, 15, FA, 4C, 01, FF, 0C, 12, F5, 0D, 0F, F2, 0E, 0C, F2, 0F, 09, F5, 10, 06, FC, 11, 06, E2, 12, 02, FB, 13, 01, F0, 14, 00, E6, 15, 00, CF, 16, 00, BA, 17, 00, A7, 18, 00, 96, 19, 00, 87, 1A, 00, 79, 1B, 00, 6C, 1C, 00, 61, 1D, 00, 57, 1E, 00, 4E, 1F, 00, 46, 20, 00, 3F, 21, 00, 38, 22, 00, 32, 23, 00, 2D, 24, 00, 28, A5, 00, 48, A6, 00, 40, A7, 00, 39, A8, 00, 33, A9, 00, 2D, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28
}
NXP_RF_CONF_BLK_5={
20, 02, C5, 02,
A0, 0B, BB, 00, 1D, 01, 14, 6A, 2A, E8, 03, E8, 03, 06, 10, 0E, 2C, 01, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 00, 00, 00, 00,
A0, A6, 03, C0, 08, 08
}
NXP_RF_CONF_BLK_6={
20, 02, E9, 05,
A0, AB, 82, 27, 1B, 33, 04, 42, 04, 55, 04, 75, 04, 9E, 04, C7, 04, F0, 04, 20, 05, 4F, 05, 7F, 05, B8, 05, F2, 05, 2B, 06, 72, 06, BA, 06, 02, 07, 49, 07, 91, 07, F0, 07, 50, 08, AF, 08, 0F, 09, 6E, 09, E1, 09, 54, 0A, C6, 0A, 56, 0B, E5, 0B, 74, 0C, 04, 0D, 93, 0D, 52, 0E, 11, 0F, D0, 0F, 8F, 10, 4F, 11, 0E, 12, 2C, 13, 4B, 14, 6A, 15, 88, 16, A7, 17, C6, 18, 44, 1A, C2, 1B, 41, 1D, BF, 1E, 9D, 20, 7B, 22, 58, 24, 96, 26, D3, 28, 11, 2B, 4E, 2D, 4B, 30, 47, 33, 44, 36, 40, 39, 3D, 3C, A2, 3F, 07, 43, 6C, 46, E6, 4A, 61, 4F,
A0, A7, 0B, 00, 02, 77, 17, 1F, 1F, 1F, 0A, FF, 19, 05,
A0, A8, 38, 00, 33, 33, 10, 00, 33, 23, 10, 00, 33, 24, 10, 4B, 23, 44, 10, CF, 22, 43, 10, CF, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, 00, 33, 22, 10, C0, 22, 23, 10, 00, 33, 22, 10, C0, 22, 23, 10,
A0, 98, 08, 6E, D3, 16, 80, 2A, 6E, 6E, 6E,
A0, 9E, 0C, 0F, D3, 16, 96, 00, 2C, 01, 2B, 25, 02, 00, 00
}
NXP_RF_CONF_BLK_7={
20, 02, FB, 14,
A0, C6, 5B, 00, 00, 04, 00, 00, 00, 3C, 00, 00, 00, 20, 80, FF, 01, 00, 00, 64, 00, 00, C0, 00, 00, 00, C0, 00, 00, 00, 01, 01, 01, 20, 01, 03, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
A0, 0D, 06, 10, C9, 30, 00, 40, 00,
A0, 0D, 03, 24, 29, 07,
A0, 0D, 03, 24, 30, 07,
A0, 0D, 03, 25, 29, 01,
A0, 0D, 03, 25, 30, 01,
A0, 0D, 06, 40, 42, F0, C1, 37, CC,
A0, 0D, 06, 41, 45, 31, 12, 00, 00,
A0, 0D, 03, 42, 7C, 54,
A0, 0D, 06, 42, 8D, 00, A0, A4, 64,
A0, 0D, 06, 42, 8B, 00, A2, 23, 00,
A0, 0D, 06, 42, 89, 7F, 12, BD, 01,
A0, 0D, 06, 42, 44, 00, B0, 66, 01,
A0, 0D, 06, 42, 43, 24, 24, 4D, ED,
A0, 0D, 06, 42, 41, FD, FF, 5F, F0,
A0, 0D, 06, 42, 40, 08, 77, 33, 3A,
A0, 0D, 06, 42, 4A, 00, 00, 00, 00,
A0, 0D, 06, 42, 49, 00, 00, 00, 00,
A0, 0D, 06, 51, 40, 12, 77, 33, 3A,
A0, 0D, 06, 43, 44, 00, 34, 52, 01
}
NXP_RF_CONF_BLK_8={
20, 02, FD, 1C,
A0, 0D, 06, 43, 43, A5, 64, 4C, AD,
A0, 0D, 06, 43, 40, 05, 77, 33, 3D,
A0, 0D, 06, 43, 4A, 00, 00, 00, 00,
A0, 0D, 06, 43, 49, 00, 00, 00, 00,
A0, 0D, 06, 44, 44, 00, 34, 52, 01,
A0, 0D, 06, 44, 43, A5, 64, 4C, AD,
A0, 0D, 06, 44, 40, 05, 77, 33, 3D,
A0, 0D, 06, 44, 4A, 00, 00, 00, 00,
A0, 0D, 06, 44, 49, 00, 00, 00, 00,
A0, 0D, 06, 45, 44, 00, 34, 52, 01,
A0, 0D, 06, 45, 43, A5, 64, 4C, AD,
A0, 0D, 06, 45, 40, 05, 77, 33, 3D,
A0, 0D, 06, 45, 4A, 00, 00, 00, 00,
A0, 0D, 06, 45, 49, 00, 00, 00, 00,
A0, 0D, 06, 46, 45, 39, 12, 00, 00,
A0, 0D, 06, 46, 44, 00, 34, 52, 01,
A0, 0D, 06, 47, 43, A5, 64, 4C, ED,
A0, 0D, 06, 47, 40, 05, 77, 33, 3D,
A0, 0D, 06, 47, 4A, 20, AA, 0B, 81,
A0, 0D, 06, 47, 49, B5, 44, 22, 00,
A0, 0D, 06, 48, 43, A5, 64, 4C, AD,
A0, 0D, 06, 48, 40, 05, 77, 33, 3D,
A0, 0D, 06, 48, 4A, 00, 00, 00, 00,
A0, 0D, 06, 48, 49, 00, 00, 00, 00,
A0, 0D, 06, 49, 43, A5, 64, 4C, AD,
A0, 0D, 06, 49, 40, 05, 77, 33, 3D,
A0, 0D, 06, 49, 4A, 00, 00, 00, 00,
A0, 0D, 06, 49, 49, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_9={
20, 02, FA, 1C,
A0, 0D, 06, 4A, 8B, 48, 02, F0, 80,
A0, 0D, 06, 4A, 43, A5, 64, 4C, AD,
A0, 0D, 06, 4A, 40, 05, 77, 33, 3D,
A0, 0D, 06, 4A, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4A, 49, 00, 00, 00, 00,
A0, 0D, 06, 4B, 43, A5, 64, 4C, 6D,
A0, 0D, 06, 4C, 44, 00, 34, 52, 01,
A0, 0D, 06, 4C, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4C, 49, 00, 00, 00, 00,
A0, 0D, 06, 4C, 40, 85, 51, 33, 3D,
A0, 0D, 06, 4D, 44, 00, 34, 52, 01,
A0, 0D, 06, 4D, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4D, 49, 00, 00, 00, 00,
A0, 0D, 06, 4D, 40, 85, 51, 33, 3D,
A0, 0D, 06, 4E, 45, 31, 12, 00, 00,
A0, 0D, 03, 4E, 7C, 50,
A0, 0D, 06, 4E, 8D, 00, 00, 00, 06,
A0, 0D, 06, 4E, 8B, 00, A2, 24, 00,
A0, 0D, 06, 4E, 89, 7D, 84, 05, 08,
A0, 0D, 06, 4E, 44, 00, B0, 66, 01,
A0, 0D, 06, 4E, 43, A5, 64, 5C, AD,
A0, 0D, 06, 4E, 41, FD, FF, 5F, F0,
A0, 0D, 06, 4E, 40, 07, 77, 33, 3D,
A0, 0D, 06, 4F, 4A, 2A, 8E, 8D, 2A,
A0, 0D, 06, 4F, 49, 5D, 27, 27, 00,
A0, 0D, 06, 50, 4A, 00, 00, 00, 00,
A0, 0D, 06, 50, 49, 00, 00, 00, 00,
A0, 0D, 06, 52, 4A, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_10={
20, 02, FD, 1C,
A0, 0D, 06, 52, 49, 00, 00, 00, 00,
A0, 0D, 06, 53, 4A, 00, 00, 00, 00,
A0, 0D, 06, 53, 49, 00, 00, 00, 00,
A0, 0D, 06, 60, 4E, FF, FF, FF, 01,
A0, 0D, 06, 60, 4F, FF, FF, FF, 01,
A0, 0D, 06, 60, 50, FF, FF, FF, 3F,
A0, 0D, 06, 80, 7D, A0, 00, 9E, BB,
A0, 0D, 06, 80, 80, B8, 5A, 0D, 00,
A0, 0D, 06, 80, C9, 30, 00, 00, 00,
A0, 0D, 06, 8C, 80, B8, 5A, 0D, 00,
A0, 0D, 06, 90, 4F, FF, FF, FF, 01,
A0, 0D, 06, 90, 4E, FF, FF, FF, 01,
A0, 0D, 06, 90, 39, 3F, 00, 00, 7F,
A0, 0D, 06, 9B, A9, 84, 00, 00, 00,
A0, 0D, 06, 9B, A1, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 99, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 95, FF, 00, 0F, 00,
A0, 0D, 06, 9B, A5, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 9D, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9B, 4F, FF, FF, FF, 01,
A0, 0D, 06, 9B, 4E, FF, FF, FF, 01,
A0, 0D, 06, 91, D4, F8, 84, EF, 03,
A0, 0D, 06, 91, D2, 4A, 4A, 4B, 38,
A0, 0D, 06, 9C, A9, 84, 00, 00, 00,
A0, 0D, 06, 9C, A1, 7F, 22, 5F, 00,
A0, 0D, 06, 9C, 99, 7F, 22, 7F, 7F,
A0, 0D, 06, 9C, 95, FF, 00, 0F, 00
}
NXP_RF_CONF_BLK_11={
20, 02, F5, 17,
A0, 0D, 06, 9C, A5, 7F, 22, 5F, 00,
A0, 0D, 06, 9C, 9D, 7F, 22, 7F, 7F,
A0, 0D, 06, 9C, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9C, 4F, 9F, 88, FF, 01,
A0, 0D, 06, 9C, 4E, 9F, 88, FF, 01,
A0, 0D, 06, 95, D4, F8, 84, 75, 00,
A0, 0D, 06, 95, D2, 4A, 4B, 4B, 58,
A0, 0D, 06, 9D, A9, 84, 00, 00, 00,
A0, 0D, 06, 9D, A1, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 99, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 95, FF, 00, 0F, 00,
A0, 0D, 06, 9D, A5, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 9D, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9D, 4F, FF, FF, FF, 01,
A0, 0D, 06, 9D, 4E, FF, FF, FF, 01,
A0, 0D, 06, 99, D4, F8, 04, E4, 01,
A0, 0D, 06, 99, D2, 4A, 4B, 4B, 48,
A0, AF, 09, 10, 5F, 00, 18, 10, 5F, 00, 18, 00,
A0, 92, 28, 37, 00, 1B, 00, FC, 81, 0F, 00, 22, 80, 0F, 00, 14, 00, 20, 70, EA, 01, 43, 18, 32, 16, 78, 30, 0D, 00, 03, 55, EA, 05, 01, 04, 68, 02, 3F, 92, 04, 00, 0C, 13,
A0, 1F, 06, 63, 00, 42, 00, 14, 00,
A0, 9A, 02, 95, 01,
A0, 99, 0A, 03, 00, 80, 00, 00, 80, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_12={
20, 02, 3B, 03,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, D0, 07, 00, 0F, FF, 7F, 00, 0F, FF, 7F, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0D, 03, 61, 09, 7E,
A0, 85, 04, 58, 08, A8, AC
}
## DLMA Enable | VDDPA 3.9
## LMA (CLK) A+B - (CLK-LESS) A/B/F 32 - 57.7/28.2/55.3 | RSSI 0x134F | H 8A/m
## LPDET 150 | NFCLD 300 | Ratio 43 | GreenCar 600
## Tx first entry 3/6
NXP_RF_CONF_BLK_13={
20, 02, F2, 04,
A0, AF, 09, 11, 20, 00, 18, 11, 20, 00, 18, 00,
A0, 98, 08, 20, 4F, 13, 80, 18, 39, 1C, 37,
A0, 34, C8, 23, 04, 3D, 01, 04, 19, CB, 05, 00, 00, 3E, 07, 00, 00, B0, 08, 00, 00, B0, 08, 00, 00, E5, 09, 00, 00, E5, 09, 00, 00, 58, 0B, 00, 00, 58, 0B, 00, 00, E1, 0D, 00, 00, 4B, 10, 00, 00, 4B, 10, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 06, 19, B9, 00, 00, 00, 35, 01, 00, 00, CF, 01, 00, 00, 2C, 02, 00, 00, C7, 02, 00, 00, 23, 03, 00, 00, DD, 03, 00, 00, 30, 05, 00, 00, 00, 07, 00, 00, A8, 09, 00, 00, 7B, 0E, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00,
A0, 9E, 0C, 07, 4F, 13, 96, 00, 2C, 01, 2B, 58, 02, 00, 00
}
NXP_RF_CONF_BLK_14={
20, 02, F1, 01,
A0, A9, ED, 00, 2A, FF, 01, 24, FF, 02, 1F, FF, 03, 1A, FF, 04, 16, FF, 05, 12, FF, 06, 0F, FF, 07, 0C, FF, 08, 09, FF, 09, 07, FF, 0A, 05, FF, 0B, 03, FF, 0C, 01, FF, 0D, 00, F5, 0E, 00, DC, 0F, 00, C6, 10, 00, B3, 11, 00, A2, 12, 00, 92, 13, 00, 84, 14, 00, 77, 15, 00, 6B, 16, 00, 60, 17, 00, 57, 18, 00, 4E, 19, 00, 46, 1A, 00, 3F, 1B, 00, 39, 1C, 00, 33, 1D, 00, 2E, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A
}
NXP_RF_CONF_MAX_NUM=14
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3F, 05,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A1, 13, 01, 32,
A0, 80, 02, FA, 00
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x3B
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x01
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x02
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x02
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# Disable 0x00
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
###################################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0 & Byte1
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events Card Emulation (ISO14443-3, Modulation detected, RF Field ON/OFF)
#Byte 1:
# Enable RSSI 0x01 Byte1 Byte0
# Disable RSSI 0x00 \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0110 ==> L1 with RSSI
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_SYS_CODE_PWR_STATE=0x3B
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
################################################################################
# This will enable power state required for GSMA testing.
# When this is enabled , then default AID route power state is added with this power state
# If any aid with power state 0 is added, then this power state is used.
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
#DEFUALT_GSMA_PWR_STATE=0x3B
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################

90
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########################## Start of libnfc-nci.conf ###########################
###############################################################################
# Application options
NFC_DEBUG_ENABLED=0
###############################################################################
# File used for NFA storage
NFA_STORAGE="/data/nfc"
PRESERVE_STORAGE=0x01
# Force tag polling for the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B |
# NFA_TECHNOLOGY_MASK_F | NFA_TECHNOLOGY_MASK_ISO15693 |
# NFA_TECHNOLOGY_MASK_B_PRIME | NFA_TECHNOLOGY_MASK_KOVIO |
# NFA_TECHNOLOGY_MASK_ACTIVE
#
# Notable bits:
# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */
# NFA_TECHNOLOGY_MASK_B 0x02 /* NFC Technology B */
# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */
# NFA_TECHNOLOGY_MASK_ISO15693 0x08 /* Proprietary Technology */
# NFA_TECHNOLOGY_MASK_KOVIO 0x20 /* Proprietary Technology */
# NFA_TECHNOLOGY_MASK_ACTIVE 0x40 /* NFC Technology Active */
POLLING_TECH_MASK=0x6F
###############################################################################
# Force P2P to only listen for the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F |
# NFA_TECHNOLOGY_MASK_ACTIVE
#
# Notable bits:
# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */
# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */
# NFA_TECHNOLOGY_MASK_ACTIVE 0x40 /* NFC Technology Active */
P2P_LISTEN_TECH_MASK=0x44
UICC_LISTEN_TECH_MASK=0x07
#NFA_DM_CFG
###############################################################################
# When screen is turned off, specify the desired power state of the controller.
# 0: power-off-sleep state; DEFAULT
# 1: full-power state
# 2: screen-off card-emulation (CE4/CE3/CE1 modes are used)
SCREEN_OFF_POWER_STATE=1
###############################################################################
###############################################################################
# Override the stack default for NFA_EE_MAX_EE_SUPPORTED set in nfc_target.h.
# The value is set assumeing discovery of 0x00(Host), 0xC0(Ese) and 0x80(UICC).
# If a platform will exclude and SE, this value can be reduced so that the stack
# will not wait any longer than necessary.
# Maximum EE supported number
NFA_MAX_EE_SUPPORTED=3
###############################################################################
# Default poll duration (in ms)
# The defualt is 500ms if not set (see nfc_target.h)
NFA_DM_DISC_DURATION_POLL=800
#POLL_FREQUENCY
NFA_AID_BLOCK_ROUTE=1
#AID_FOR_EMPTY_SELECT
###############################################################################
# Enable/Disable Block Route feature.
# Block Route will restrict routing to first matched rule
# Block Route enable 0x01
# Block Route disable 0x00
#NFA_BLOCK_ROUTE=0x00
###############################################################################
# AID_MATCHING constants
# AID_MATCHING_EXACT_ONLY 0x00
# AID_MATCHING_EXACT_OR_PREFIX 0x01
# AID_MATCHING_PREFIX_ONLY 0x02
# AID_MATCHING_EXACT_OR_SUBSET_OR_PREFIX 0x03
AID_MATCHING_MODE=0
###############################################################################
# AID Route power state for OffHost
OFFHOST_AID_ROUTE_PWR_STATE=0x3B
###############################################################################
LEGACY_MIFARE_READER=1

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#################### This file is used by NXP NFC NCI HAL #####################
## Modified by Motorola Mobility LLC
## Version : Cypfr.4 (2021/06/09)
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x03
NXPLOG_NCIHAL_LOGLEVEL=0x03
NXPLOG_NCIX_LOGLEVEL=0x03
NXPLOG_NCIR_LOGLEVEL=0x03
NXPLOG_FWDNLD_LOGLEVEL=0x03
NXPLOG_TML_LOGLEVEL=0x03
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# File name for Firmware
NXP_FW_NAME="libsn100u_fw.so"
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NFC forum profile settings
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
#NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
# *** RFBOARD30x20FN FW VERSION = 01.10.5B ***
NXP_RF_CONF_BLK_1={
20, 02, DB, 04,
A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 18, 18, 18, 18, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, FF, 07, 13, 07, 05, 13,
A0, A4, 85, 14, 00, 01, 00, 00, 00, 00, 03, 00, 06, 00, 0A, 00, 0D, 00, 10, 00, 14, 00, 17, 00, 1B, 00, 1E, 00, 21, 00, 25, 00, 28, 00, 2C, 00, 2F, 00, 32, 00, 36, 00, 39, 00, 3D, 00, 40, 00, 43, 00, 47, 00, 4A, 00, 4E, 00, 51, 00, 54, 00, 58, 00, 5B, 00, 5E, 00, 62, 00, 65, 00, 69, 00, 6C, 00, 6F, 00, 73, 00, 76, 00, 7A, 00, 7D, 00, 80, 00, 84, 00, 87, 00, 8B, 00, 8E, 00, 91, 00, 95, 00, 98, 00, 9C, 00, 9F, 00, A2, 00, A6, 00, A9, 00, AC, 00, B0, 00, B3, 00, B7, 00, BA, 00, BD, 00, C1, 00, C4, 00, C8, 00, CB, 00, CE, 00, D2, 00, D5, 00,
A0, A5, 0D, 3B, 3B, 3B, 3B, 3B, 3B, FF, 03, 1F, 00, 3B, 00, 00,
A0, 6A, 10, 28, 00, 28, 00, 28, 00, 28, 00, 80, 02, 80, 02, 80, 02, 80, 02
}
NXP_RF_CONF_BLK_2={
20, 02, CC, 01,
A0, 34, C8, 23, 04, 3D, 01, 0D, 0C, FA, 00, 00, 00, 90, 01, 00, 00, 26, 02, 00, 00, BC, 02, 00, 00, 52, 03, 00, 00, E8, 03, 00, 00, B0, 04, 00, 00, 40, 06, 00, 00, 98, 08, 00, 00, B8, 0B, 00, 00, 94, 11, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 0D, 0C, FA, 00, 00, 00, 90, 01, 00, 00, 26, 02, 00, 00, BC, 02, 00, 00, 52, 03, 00, 00, E8, 03, 00, 00, B0, 04, 00, 00, 40, 06, 00, 00, 98, 08, 00, 00, B8, 0B, 00, 00, 94, 11, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00, 7C, 15, 00, 00
}
NXP_RF_CONF_BLK_3={
20, 02, 66, 01,
A1, 0A, 62, 14, 08, F4, 33, 00, 00, F4, 33, 00, 00, F4, 33, 00, 00, F4, 33, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 20, 35, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00, 40, 1F, 00, 00
}
NXP_RF_CONF_BLK_4={
20, 02, F1, 01,
A0, A9, ED, 40, 2A, FF, 41, 24, FF, 42, 1F, FF, 43, 1A, FF, 44, 16, FF, 45, 12, FF, 46, 0F, FF, 47, 0C, FF, 07, 2A, F1, 48, 09, FF, 08, 23, F7, 49, 07, FF, 09, 1E, F7, 4A, 05, FF, 0A, 19, FA, 4B, 03, FF, 0B, 15, FA, 4C, 01, FF, 0C, 12, F5, 0D, 0F, F2, 0E, 0C, F2, 0F, 09, F5, 10, 06, FC, 11, 06, E2, 12, 02, FB, 13, 01, F0, 14, 00, E6, 15, 00, CF, 16, 00, BA, 17, 00, A7, 18, 00, 96, 19, 00, 87, 1A, 00, 79, 1B, 00, 6C, 1C, 00, 61, 1D, 00, 57, 1E, 00, 4E, 1F, 00, 46, 20, 00, 3F, 21, 00, 38, 22, 00, 32, 23, 00, 2D, 24, 00, 28, A5, 00, 48, A6, 00, 40, A7, 00, 39, A8, 00, 33, A9, 00, 2D, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28, AA, 00, 28
}
NXP_RF_CONF_BLK_5={
20, 02, C5, 02,
A0, 0B, BB, 00, 1D, 01, 14, 6A, 2A, E8, 03, E8, 03, 06, 10, 0E, 2C, 01, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 13, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 0A, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 78, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 3C, 00, 00, 00, 00, 00, 00, 00,
A0, A6, 03, C0, 08, 08
}
NXP_RF_CONF_BLK_6={
20, 02, E9, 05,
A0, AB, 82, 27, 1B, 33, 04, 42, 04, 55, 04, 75, 04, 9E, 04, C7, 04, F0, 04, 20, 05, 4F, 05, 7F, 05, B8, 05, F2, 05, 2B, 06, 72, 06, BA, 06, 02, 07, 49, 07, 91, 07, F0, 07, 50, 08, AF, 08, 0F, 09, 6E, 09, E1, 09, 54, 0A, C6, 0A, 56, 0B, E5, 0B, 74, 0C, 04, 0D, 93, 0D, 52, 0E, 11, 0F, D0, 0F, 8F, 10, 4F, 11, 0E, 12, 2C, 13, 4B, 14, 6A, 15, 88, 16, A7, 17, C6, 18, 44, 1A, C2, 1B, 41, 1D, BF, 1E, 9D, 20, 7B, 22, 58, 24, 96, 26, D3, 28, 11, 2B, 4E, 2D, 4B, 30, 47, 33, 44, 36, 40, 39, 3D, 3C, A2, 3F, 07, 43, 6C, 46, E6, 4A, 61, 4F,
A0, A7, 0B, 00, 02, 77, 17, 1F, 1F, 1F, 0A, FF, 19, 05,
A0, A8, 38, 00, 33, 33, 10, 00, 33, 23, 10, 00, 33, 24, 10, 4B, 23, 44, 10, CF, 22, 43, 10, CF, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, CF, 22, 43, 10, CE, 22, 43, 10, 00, 33, 22, 10, C0, 22, 23, 10, 00, 33, 22, 10, C0, 22, 23, 10,
A0, 98, 08, 6E, D3, 16, 80, 2A, 6E, 6E, 6E,
A0, 9E, 0C, 0F, D3, 16, 96, 00, 2C, 01, 2B, 25, 02, 00, 00
}
NXP_RF_CONF_BLK_7={
20, 02, FB, 14,
A0, C6, 5B, 00, 00, 04, 00, 00, 00, 3C, 00, 00, 00, 20, 80, FF, 01, 00, 00, 64, 00, 00, C0, 00, 00, 00, C0, 00, 00, 00, 01, 01, 01, 20, 01, 03, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00, 00,
A0, 0D, 06, 10, C9, 30, 00, 40, 00,
A0, 0D, 03, 24, 29, 07,
A0, 0D, 03, 24, 30, 07,
A0, 0D, 03, 25, 29, 01,
A0, 0D, 03, 25, 30, 01,
A0, 0D, 06, 40, 42, F0, C1, 37, CC,
A0, 0D, 06, 41, 45, 31, 12, 00, 00,
A0, 0D, 03, 42, 7C, 54,
A0, 0D, 06, 42, 8D, 00, A0, A4, 64,
A0, 0D, 06, 42, 8B, 00, A2, 23, 00,
A0, 0D, 06, 42, 89, 7F, 12, BD, 01,
A0, 0D, 06, 42, 44, 00, B0, 66, 01,
A0, 0D, 06, 42, 43, 24, 24, 4D, ED,
A0, 0D, 06, 42, 41, FD, FF, 5F, F0,
A0, 0D, 06, 42, 40, 08, 77, 33, 3A,
A0, 0D, 06, 42, 4A, 00, 00, 00, 00,
A0, 0D, 06, 42, 49, 00, 00, 00, 00,
A0, 0D, 06, 51, 40, 12, 77, 33, 3A,
A0, 0D, 06, 43, 44, 00, 34, 52, 01
}
NXP_RF_CONF_BLK_8={
20, 02, FD, 1C,
A0, 0D, 06, 43, 43, A5, 64, 4C, AD,
A0, 0D, 06, 43, 40, 05, 77, 33, 3D,
A0, 0D, 06, 43, 4A, 00, 00, 00, 00,
A0, 0D, 06, 43, 49, 00, 00, 00, 00,
A0, 0D, 06, 44, 44, 00, 34, 52, 01,
A0, 0D, 06, 44, 43, A5, 64, 4C, AD,
A0, 0D, 06, 44, 40, 05, 77, 33, 3D,
A0, 0D, 06, 44, 4A, 00, 00, 00, 00,
A0, 0D, 06, 44, 49, 00, 00, 00, 00,
A0, 0D, 06, 45, 44, 00, 34, 52, 01,
A0, 0D, 06, 45, 43, A5, 64, 4C, AD,
A0, 0D, 06, 45, 40, 05, 77, 33, 3D,
A0, 0D, 06, 45, 4A, 00, 00, 00, 00,
A0, 0D, 06, 45, 49, 00, 00, 00, 00,
A0, 0D, 06, 46, 45, 39, 12, 00, 00,
A0, 0D, 06, 46, 44, 00, 34, 52, 01,
A0, 0D, 06, 47, 43, A5, 64, 4C, ED,
A0, 0D, 06, 47, 40, 05, 77, 33, 3D,
A0, 0D, 06, 47, 4A, 20, AA, 0B, 81,
A0, 0D, 06, 47, 49, B5, 44, 22, 00,
A0, 0D, 06, 48, 43, A5, 64, 4C, AD,
A0, 0D, 06, 48, 40, 05, 77, 33, 3D,
A0, 0D, 06, 48, 4A, 00, 00, 00, 00,
A0, 0D, 06, 48, 49, 00, 00, 00, 00,
A0, 0D, 06, 49, 43, A5, 64, 4C, AD,
A0, 0D, 06, 49, 40, 05, 77, 33, 3D,
A0, 0D, 06, 49, 4A, 00, 00, 00, 00,
A0, 0D, 06, 49, 49, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_9={
20, 02, FA, 1C,
A0, 0D, 06, 4A, 8B, 48, 02, F0, 80,
A0, 0D, 06, 4A, 43, A5, 64, 4C, AD,
A0, 0D, 06, 4A, 40, 05, 77, 33, 3D,
A0, 0D, 06, 4A, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4A, 49, 00, 00, 00, 00,
A0, 0D, 06, 4B, 43, A5, 64, 4C, 6D,
A0, 0D, 06, 4C, 44, 00, 34, 52, 01,
A0, 0D, 06, 4C, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4C, 49, 00, 00, 00, 00,
A0, 0D, 06, 4C, 40, 85, 51, 33, 3D,
A0, 0D, 06, 4D, 44, 00, 34, 52, 01,
A0, 0D, 06, 4D, 4A, 00, 00, 00, 00,
A0, 0D, 06, 4D, 49, 00, 00, 00, 00,
A0, 0D, 06, 4D, 40, 85, 51, 33, 3D,
A0, 0D, 06, 4E, 45, 31, 12, 00, 00,
A0, 0D, 03, 4E, 7C, 50,
A0, 0D, 06, 4E, 8D, 00, 00, 00, 06,
A0, 0D, 06, 4E, 8B, 00, A2, 24, 00,
A0, 0D, 06, 4E, 89, 7D, 84, 05, 08,
A0, 0D, 06, 4E, 44, 00, B0, 66, 01,
A0, 0D, 06, 4E, 43, A5, 64, 5C, AD,
A0, 0D, 06, 4E, 41, FD, FF, 5F, F0,
A0, 0D, 06, 4E, 40, 07, 77, 33, 3D,
A0, 0D, 06, 4F, 4A, 2A, 8E, 8D, 2A,
A0, 0D, 06, 4F, 49, 5D, 27, 27, 00,
A0, 0D, 06, 50, 4A, 00, 00, 00, 00,
A0, 0D, 06, 50, 49, 00, 00, 00, 00,
A0, 0D, 06, 52, 4A, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_10={
20, 02, FD, 1C,
A0, 0D, 06, 52, 49, 00, 00, 00, 00,
A0, 0D, 06, 53, 4A, 00, 00, 00, 00,
A0, 0D, 06, 53, 49, 00, 00, 00, 00,
A0, 0D, 06, 60, 4E, FF, FF, FF, 01,
A0, 0D, 06, 60, 4F, FF, FF, FF, 01,
A0, 0D, 06, 60, 50, FF, FF, FF, 3F,
A0, 0D, 06, 80, 7D, A0, 00, 9E, BB,
A0, 0D, 06, 80, 80, B8, 5A, 0D, 00,
A0, 0D, 06, 80, C9, 30, 00, 00, 00,
A0, 0D, 06, 8C, 80, B8, 5A, 0D, 00,
A0, 0D, 06, 90, 4F, FF, FF, FF, 01,
A0, 0D, 06, 90, 4E, FF, FF, FF, 01,
A0, 0D, 06, 90, 39, 3F, 00, 00, 7F,
A0, 0D, 06, 9B, A9, 84, 00, 00, 00,
A0, 0D, 06, 9B, A1, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 99, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 95, FF, 00, 0F, 00,
A0, 0D, 06, 9B, A5, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 9D, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9B, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9B, 4F, FF, FF, FF, 01,
A0, 0D, 06, 9B, 4E, FF, FF, FF, 01,
A0, 0D, 06, 91, D4, F8, 84, EF, 03,
A0, 0D, 06, 91, D2, 4A, 4A, 4B, 38,
A0, 0D, 06, 9C, A9, 84, 00, 00, 00,
A0, 0D, 06, 9C, A1, 7F, 22, 5F, 00,
A0, 0D, 06, 9C, 99, 7F, 22, 7F, 7F,
A0, 0D, 06, 9C, 95, FF, 00, 0F, 00
}
NXP_RF_CONF_BLK_11={
20, 02, F5, 17,
A0, 0D, 06, 9C, A5, 7F, 22, 5F, 00,
A0, 0D, 06, 9C, 9D, 7F, 22, 7F, 7F,
A0, 0D, 06, 9C, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9C, 4F, 9F, 88, FF, 01,
A0, 0D, 06, 9C, 4E, 9F, 88, FF, 01,
A0, 0D, 06, 95, D4, F8, 84, 75, 00,
A0, 0D, 06, 95, D2, 4A, 4B, 4B, 58,
A0, 0D, 06, 9D, A9, 84, 00, 00, 00,
A0, 0D, 06, 9D, A1, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 99, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 95, FF, 00, 0F, 00,
A0, 0D, 06, 9D, A5, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 9D, 7F, 7F, 7F, 7F,
A0, 0D, 06, 9D, 97, FF, 00, 0F, 00,
A0, 0D, 06, 9D, 4F, FF, FF, FF, 01,
A0, 0D, 06, 9D, 4E, FF, FF, FF, 01,
A0, 0D, 06, 99, D4, F8, 04, E4, 01,
A0, 0D, 06, 99, D2, 4A, 4B, 4B, 48,
A0, AF, 09, 10, 5F, 00, 18, 10, 5F, 00, 18, 00,
A0, 92, 28, 37, 00, 1B, 00, FC, 81, 0F, 00, 22, 80, 0F, 00, 14, 00, 20, 70, EA, 01, 43, 18, 32, 16, 78, 30, 0D, 00, 03, 55, EA, 05, 01, 04, 68, 02, 3F, 92, 04, 00, 0C, 13,
A0, 1F, 06, 63, 00, 42, 00, 14, 00,
A0, 9A, 02, 95, 01,
A0, 99, 0A, 03, 00, 80, 00, 00, 80, 00, 00, 00, 00
}
NXP_RF_CONF_BLK_12={
20, 02, 3B, 03,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, D0, 07, 00, 0F, FF, 7F, 00, 0F, FF, 7F, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0D, 03, 61, 09, 7E,
A0, 85, 04, 58, 08, A8, AC
}
## DLMA Enable | VDDPA 3.9
## LMA (CLK) A+B - (CLK-LESS) A/B/F 32 - 57.7/28.2/55.3 | RSSI 0x134F | H 8A/m
## LPDET 150 | NFCLD 300 | Ratio 43 | GreenCar 600
## Tx first entry 3/6
NXP_RF_CONF_BLK_13={
20, 02, F2, 04,
A0, AF, 09, 11, 20, 00, 18, 11, 20, 00, 18, 00,
A0, 98, 08, 20, 4F, 13, 80, 18, 39, 1C, 37,
A0, 34, C8, 23, 04, 3D, 01, 04, 19, CB, 05, 00, 00, 3E, 07, 00, 00, B0, 08, 00, 00, B0, 08, 00, 00, E5, 09, 00, 00, E5, 09, 00, 00, 58, 0B, 00, 00, 58, 0B, 00, 00, E1, 0D, 00, 00, 4B, 10, 00, 00, 4B, 10, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 4F, 13, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 06, 19, B9, 00, 00, 00, 35, 01, 00, 00, CF, 01, 00, 00, 2C, 02, 00, 00, C7, 02, 00, 00, 23, 03, 00, 00, DD, 03, 00, 00, 30, 05, 00, 00, 00, 07, 00, 00, A8, 09, 00, 00, 7B, 0E, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00, 46, 30, 00, 00,
A0, 9E, 0C, 07, 4F, 13, 96, 00, 2C, 01, 2B, 58, 02, 00, 00
}
NXP_RF_CONF_BLK_14={
20, 02, F1, 01,
A0, A9, ED, 00, 2A, FF, 01, 24, FF, 02, 1F, FF, 03, 1A, FF, 04, 16, FF, 05, 12, FF, 06, 0F, FF, 07, 0C, FF, 08, 09, FF, 09, 07, FF, 0A, 05, FF, 0B, 03, FF, 0C, 01, FF, 0D, 00, F5, 0E, 00, DC, 0F, 00, C6, 10, 00, B3, 11, 00, A2, 12, 00, 92, 13, 00, 84, 14, 00, 77, 15, 00, 6B, 16, 00, 60, 17, 00, 57, 18, 00, 4E, 19, 00, 46, 1A, 00, 3F, 1B, 00, 39, 1C, 00, 33, 1D, 00, 2E, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A, 1E, 00, 2A
}
NXP_RF_CONF_MAX_NUM=14
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3F, 05,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A1, 13, 01, 32,
A0, 80, 02, FA, 00
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x3B
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x01
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x02
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x02
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# Disable 0x00
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
###################################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0 & Byte1
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events Card Emulation (ISO14443-3, Modulation detected, RF Field ON/OFF)
#Byte 1:
# Enable RSSI 0x01 Byte1 Byte0
# Disable RSSI 0x00 \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0110 ==> L1 with RSSI
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_SYS_CODE_PWR_STATE=0x3B
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
################################################################################
# This will enable power state required for GSMA testing.
# When this is enabled , then default AID route power state is added with this power state
# If any aid with power state 0 is added, then this power state is used.
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
#DEFUALT_GSMA_PWR_STATE=0x3B
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################
###############################################################################
# Enable(0x01) or disable(0x00) non-standard tag reading
# Disable Non-standard card read 0x00
# Enable Non-standard card read 0x01
NXP_SUPPORT_NON_STD_CARD=0x00
#################################################################################
# Enable(0x01) or disable(0x00) iso dep sak merge
# Disable SAK merging 0x00
# Enable SAK merging 0x01
NXP_ISO_DEP_MERGE_SAK=0x01
#################################################################################
# Enable(0x01) or disable(0x00 ) for getting HW Info log over SMB wired
# Disable getting HW info log 0x00
# Enable getting HW info log 0x01
NXP_GET_HW_INFO_LOG=0x00
#################################################################################
# Valid time difference range within for non-standard tag detection from first
# Activation fail to next discovery
# Note :- 1. This will take effect only when NXP_SUPPORT_NON_STD_CARD is enabled
# 2. The number will be multiplied by 100ms by MW.
# Default:
# Set to 00 if not supported
# byte[0] MIFARE_CLASSIC 100ms
# byte[1] ISO_DEP 300ms
NXP_NON_STD_CARD_TIMEDIFF={01, 03}
#################################################################################

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@ -0,0 +1,592 @@
#################### This file is used by NXP NFC NCI HAL #####################
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x03
NXPLOG_NCIHAL_LOGLEVEL=0x03
NXPLOG_NCIX_LOGLEVEL=0x03
NXPLOG_NCIR_LOGLEVEL=0x03
NXPLOG_FWDNLD_LOGLEVEL=0x03
NXPLOG_TML_LOGLEVEL=0x03
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# File name for Firmware
NXP_FW_NAME="libsn100u_fw.so"
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NFC forum profile settings
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
NXP_EXT_TVDD_CFG_2={20, 02, 30, 01, A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 0F, 0F, 0F, 0F, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, 20, 07, 13, 07, 05, 13}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_1={
#}
###############################################################################
# By default, the LPCD shall be enabled.
# Please check the platform specific configuration and enable it.
# NXP_RF_CONF_BLK_1={
# 20, 02, 2E, 01,
# A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00,
# 83, 04,
# 00,
# C0, 00, C0, 00,
# 00, 01, 00, 01,
# A0, 00, A0, 00,
# 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00,
# 05,
# 7F, 00,
# 00, 01,00, 03
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_2={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_3={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_4={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3A, 04,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0A, 01, 20
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x39
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x00
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x02
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x02
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# Disable 0x00
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
###################################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0 & Byte1
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events Card Emulation (ISO14443-3, Modulation detected, RF Field ON/OFF)
#Byte 1:
# Enable RSSI 0x01 Byte1 Byte0
# Disable RSSI 0x00 \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0110 ==> L1 with RSSI
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_SYS_CODE_PWR_STATE=0x00
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
################################################################################
# This will enable power state required for GSMA testing.
# When this is enabled , then default AID route power state is added with this power state
# If any aid with power state 0 is added, then this power state is used.
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
#DEFUALT_GSMA_PWR_STATE=0x3B
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################

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#################### This file is used by NXP NFC NCI HAL #####################
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
NXPLOG_EXTNS_LOGLEVEL=0x03
NXPLOG_NCIHAL_LOGLEVEL=0x03
NXPLOG_NCIX_LOGLEVEL=0x03
NXPLOG_NCIR_LOGLEVEL=0x03
NXPLOG_FWDNLD_LOGLEVEL=0x03
NXPLOG_TML_LOGLEVEL=0x03
NFC_DEBUG_ENABLED=1
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/nq-nci"
#################################################################################
#VEN Toggle Config
#Disable = 0x00
#Enable = 0x01
ENABLE_VEN_TOGGLE=0x00
###############################################################################
# Extension for Mifare reader enable
MIFARE_READER_ENABLE=0x01
###############################################################################
# Mifare Reader implementation
# 0: General implementation
# 1: Legacy implementation
LEGACY_MIFARE_READER=0
###############################################################################
# File name for Firmware
NXP_FW_NAME="libsn100u_fw.so"
###############################################################################
# System clock source selection configuration
#define CLK_SRC_XTAL 1
#define CLK_SRC_PLL 2
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration
#define CLK_FREQ_13MHZ 1
#define CLK_FREQ_19_2MHZ 2
#define CLK_FREQ_24MHZ 3
#define CLK_FREQ_26MHZ 4
#define CLK_FREQ_38_4MHZ 5
#define CLK_FREQ_52MHZ 6
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
#NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
# min value = 0x01 to max = 0x1F
#NXP_CLOCK_REQ_DELAY=0x16
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NFC forum profile settings
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
# NXP TVDD configurations settings
# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
# out of them only one can be configured at a time.
NXP_EXT_TVDD_CFG=0x02
###############################################################################
#config1:SLALM, 3.3V for both RM and CM
#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
###############################################################################
#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
NXP_EXT_TVDD_CFG_2={20, 02, 30, 01, A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 0F, 0F, 0F, 0F, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, 20, 07, 13, 07, 05, 13}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_1={
#}
###############################################################################
# By default, the LPCD shall be enabled.
# Please check the platform specific configuration and enable it.
# NXP_RF_CONF_BLK_1={
# 20, 02, 2E, 01,
# A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00,
# 83, 04,
# 00,
# C0, 00, C0, 00,
# 00, 01, 00, 01,
# A0, 00, A0, 00,
# 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00,
# 05,
# 7F, 00,
# 00, 01,00, 03
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_2={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_3={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_4={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Set configuration optimization decision setting
# Enable = 0x01
# Disable = 0x00
NXP_SET_CONFIG_ALWAYS=0x01
###############################################################################
# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
###############################################################################
# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
# to 0x00
#NXP_I2C_FRAGMENTATION_ENABLED=0x00
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# Low power tag detection LPTD for power reduction A068
NXP_CORE_CONF_EXTN={20, 02, 3A, 04,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
A0, 0A, 01, 20
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={ 20, 02, 37, 11,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
3E, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01,
68, 01, 01,
85, 01, 01
}
###############################################################################
#set autonomous mode
# disable autonomous 0x00
# enable autonomous 0x01
NXP_AUTONOMOUS_ENABLE=0x00
###############################################################################
#set Guard Timer
# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
NXP_GUARD_TIMER_VALUE=0x0F
###############################################################################
#Enable SWP full power mode when phone is power off
#NXP_SWP_FULL_PWR_ON=0x00
################################################################################
#This is used to configure UICC2 at boot time.
# UICC2 0x03
NXP_DEFAULT_UICC2_SELECT=0x03
###############################################################################
# CE when Screen state is locked
# This setting is for DEFAULT_AID_ROUTE,
# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
# Disable 0x00
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
###############################################################################
#Timeout in secs
NXP_SWP_RD_TAG_OP_TIMEOUT=20
###############################################################################
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_AID_ROUTE=0x01
###############################################################################
#Set the ISODEP (Mifare Desfire) route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_ISODEP_ROUTE=0x01
###############################################################################
#Set the Mifare CLT route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_MIFARE_CLT_ROUTE=0x01
###############################################################################
#Set the Felica CLT route Location :
#This settings will be used when application does not set this parameter
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_FELICA_CLT_ROUTE=0x01
###############################################################################
#Set the default AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_AID_PWR_STATE=0x39
###############################################################################
#Set the Mifare Desfire Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_DESFIRE_PWR_STATE=0x3B
###############################################################################
#Set the Mifare CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
###############################################################################
#Set the Felica CLT Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_FELICA_CLT_PWR_STATE=0x3B
###############################################################################
#Set the T4TNfcee AID Power state :
#This settings will be used when application does not set this parameter
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
###############################################################################
#Set the default Felica T3T System Code OffHost route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
# UICC2 0x03
DEFAULT_SYS_CODE_ROUTE=0x00
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
#AID_MATCHING_PLATFORM=0x01
###############################################################################
# P61 interface options
# SPI 0x02
NXP_P61_LS_DEFAULT_INTERFACE=0x02
###############################################################################
#CHINA_TIANJIN_RF_SETTING
#Enable 0x01
#Disable 0x00
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
###############################################################################
#SWP_SWITCH_TIMEOUT_SETTING
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
# Timeout in milliseconds, for example
# No Timeout 0x00
# 10 millisecond timeout 0x0A
#NXP_SWP_SWITCH_TIMEOUT=0x0A
###############################################################################
# Flashing Options Configurations
# FLASH_UPPER_VERSION 0x01
# FLASH_DIFFERENT_VERSION 0x02
# FLASH_ALWAYS 0x03
NXP_FLASH_CONFIG=0x02
###############################################################################
# P61 interface options for JCOP Download
# SPI 0x02
NXP_P61_JCOP_DEFAULT_INTERFACE=0x02
###############################################################################
# Option to perform LS update every boot
# Enable 0x01
# Disable 0x00
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Option to perform JCOP update every boot
# Enable 0x01
# Disable 0x00
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
###############################################################################
# Bail out mode
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
NFA_POLL_BAIL_OUT_MODE=0x00
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={C0, 80}
###############################################################################
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
PRESENCE_CHECK_ALGORITHM=2
###############################################################################
# Options to Fallback to alternative route
# Disable 0x00
# DH 0x01
# ESE 0x02
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
###############################################################################
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
#Enable/Disable block number checks for china transit use case
#Enable 0x01
#Disable 0x00
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
###################################################################################################
#This flags will enable different modes of Lx Debug based on bits of the Byte0 & Byte1
#Byte 0:
# |_________Bit Mask_______| Debug Mode
# b7|b6|b5|b4|b3|b2|b1|b0|
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
# | | | | |X | | | Enable Felica SystemCode
# | | | | | |X | | Enable Felica RF (all Felica CM events)
# | | | | | | |X | Enable L2 Events Card Emulation (ISO14443-3, Modulation detected, RF Field ON/OFF)
#Byte 1:
# Enable RSSI 0x01 Byte1 Byte0
# Disable RSSI 0x00 \__ __/
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0110 ==> L1 with RSSI
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
###############################################################################
#Enable NXP NCI runtime parser library
#Enable 0x01
#Disable 0x00
NXP_NCI_PARSER_LIBRARY=0x00
###############################################################################
# Timeout value in milliseconds for JCOP OS download to complete
OS_DOWNLOAD_TIMEOUT_VALUE=60000
###############################################################################
# Forcing HOST to listen for a selected protocol
# 0x00 : Disable Host Listen
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
HOST_LISTEN_TECH_MASK=0x07
###############################################################################
# Enable forward functionality
# Disable 0x00
# Enable 0x01
FORWARD_FUNCTIONALITY_ENABLE=0x01
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM1/SIM2)
OFF_HOST_ESE_PIPE_ID=0x16
OFF_HOST_SIM_PIPE_ID=0x0A
OFF_HOST_SIM2_PIPE_ID=0x23
###############################################################################
#Set the Felica T3T System Code Power state :
#This settings will be used when application does not set this parameter
#Update Power state as per NCI2.0
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen On lock
# bit pos 4 = Screen off unlock
# bit pos 5 = Screen Off lock
DEFAULT_SYS_CODE_PWR_STATE=0x00
###############################################################################
#Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x01
###############################################################################
#Maximum SMB transceive wait for response
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
###############################################################################
# Firmware file type
#.so file 0x01
#.bin file 0x02
NXP_FW_TYPE=0x01
############################################################################
# Extended APDU length for ISO_DEP
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
#########################################################################
# Support for Amendment I SEMS specification
# Support SEMS Amendment I 0x01
# Support NXP LS client 0x00
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
###############################################################################
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
#under android.hardware.secure_element
# The terminal name shall start from 1
# Assign terminal number to each interface based on system config
NXP_SPI_SE_TERMINAL_NUM="eSE1"
###############################################################################
# Assign terminal number to each interface based on system config
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
###############################################################################
# Assign terminal number to each interface based on system config
NXP_NFC_SE_TERMINAL_NUM="eSE2"
###############################################################################
#For static or dynamic dual UICC feature support
#Enable static dual uicc feature by setting value 0x00
#Enable dynamic dual uicc feature by setting value 0x01
NXP_DUAL_UICC_ENABLE=0x01
###############################################################################
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
# The value is as per the UM and in seconds
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
###############################################################################
#OffHost ESE route location for MultiSE
#ESE = 01
OFFHOST_ROUTE_ESE={01}
###############################################################################
#OffHost UICC route location for MultiSE
#UICC1 = 02
#UICC2 = 03
OFFHOST_ROUTE_UICC={02:03}
###############################################################################
#T4T NFCEE ENABLE
#bit pos 0 = T4T NFCEE Enable
#bit pos 6 = T4T NFCEE Contactless write enable
NXP_T4T_NFCEE_ENABLE=0x01
###############################################################################
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
NXP_RDR_REQ_GUARD_TIME=0
###############################################################################
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
#while switching back to NFC Forum mode
# 0 --> Disable MW workaround
# 1 --> Enable MW workaround
NXP_RDR_DISABLE_ENABLE_LPCD=0
###############################################################################
# Firmware patch format, Only 1 and 5 should be set
# 0 -> NFC Default
# 1 -> EMVCO Default
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
NFA_CONFIG_FORMAT=1
################################################################################
# This will enable power state required for GSMA testing.
# When this is enabled , then default AID route power state is added with this power state
# If any aid with power state 0 is added, then this power state is used.
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
# bit pos 3 = Screen off unlock
# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
#DEFUALT_GSMA_PWR_STATE=0x3B
#################################################################################
# Enable disconnect tag in screen off
# Disable 0x00
# Enable 0x01
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
#################################################################################

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#Target: SN4V
#MOTO: rhodep V1 20211201
#Vendor common
NFA_POLL_BAIL_OUT_MODE=0
PRESENCE_CHECK_ALGORITHM=5
NFA_PROPRIETARY_CFG={00, 81, 82, 80, 8A, 80, 70, 74, F4}
DEFAULT_OFFHOST_ROUTE=0x83
OFFHOST_ROUTE_ESE={82}
OFFHOST_ROUTE_UICC={83}
DEFAULT_NFCF_ROUTE=0x83
DEFAULT_SYS_CODE={FE:FF}
DEFAULT_ROUTE=0x83
OFF_HOST_SIM_PIPE_ID=0x06
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
DEFAULT_ISODEP_ROUTE=0x83
#LSI
DEFAULT_SIMSLOT=1
FW_CFG_CLK_SPEED=0x11
FW_BASE_ADDRESS=0x2000
WAKEUP_DELAY=20
FW_DIR_PATH="/vendor/firmware/"
FW_FILE_NAME="sec_s3nrn4v_firmware.bin"
RF_HW_DIR_PATH="/vendor/etc/"
RF_HW_FILE_NAME="sec_s3nrn4v_hwreg.bin"
RF_SW_DIR_PATH="/vendor/etc/"
RF_SW_FILE_NAME="sec_s3nrn4v_swreg.bin"
POWER_DRIVER="/dev/sec-nfc"
TRANS_DRIVER="/dev/sec-nfc"
TRACE_LEVEL=0
DATA_TRACE=0
SLEEP_TIMEOUT=1000
FW_UPDATE_MODE=0
# Cold reset
ESE_DELAY=0x7D0
CP_TRIGGER_TYPE=1
CP_DEFAULT_TYPE=1
COLDRESET_SUPPORT=1
AP_COLDRESET_ENABLE=1
CP_COLDRESET_ENABLE=1

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# ----------------------------------------------
# Test name: SN1X0_SPC
# Description: runs SPC
# Revision: 2.00
# Date: 27/07/2020
# Tool rev: 1.12 or later
# ----------------------------------------------
version
interval 200
reset 1
#// NCI CORE RESET CMD
send 20000100
receive
#// NCI CORE INIT CMD
send 2001020000
#// NCI CORE SETCONFIG CMD:
send 20020401850101
#// NCI SYSTEM ENABLE PROPRIETARY CMD
send 2F0200
#// READ OFFSET BEFORE SPC
send 20030301A017
#//SET Normal Polling
send 20022E01A0682A064060031900000000030400C009C00900010001A000A00003FA0000004C0014007D00057F0000010003
#// SET SPC 1RST STEP (SPC CALIBRATION)
#//send 2F3D0F3000E02E3251000000001D0000121F
#// COPY SPC CMD (2F3D0F3XXXXX) HERE
#//send 2F3D0F3000E02E3251760A28A27D0000121F
send 2F3D0F3000E02E3251A40C2EAA7D0000121F
#// send 2F3D0XXXXXXXXXXX
#// SPC CMD [PLL sweep] input clock 19.2MHz
send 2F3D7E3001C08C0466C08C0366C08C0266C08C0166C08C0066008D0466008D0366008D0266008D0166008D0066408D0466408D0366408D0266408D0166408D0066808D0466808D0366808D0266808D0166808D0066C08D0466C08D0366C08D0266C08D0166C08D0066008E0466008E0366008E0266008E0166008E0066408E0466
sleep 100
send 2F3D7E3002408E0366408E0266408E0166408E0066808E0466808E0366808E0266808E0166808E0066C08E0466C08E0366C08E0266C08E0166C08E0066008F0466008F0366008F0266008F0166008F0066408F0466408F0366408F0266408F0166408F0066808F0466808F0366808F0266808F0166808F0066C08F0466C08F0366
sleep 100
send 2F3D4E3003C08F0266C08F0166C08F0066009004660090036600900266009001660090006640900466409003664090026640900166409000668090046680900366809002668090016680900066C0900466
sleep 100
#// SPC CMD [PLL sweep] input clock 26MHz
#//send 2F3D7E300142A5046642A5016682A5036682A50066C2A5026602A6046602A6016642A6036642A6006682A60266C2A60466C2A6016602A7036602A7006642A7026682A7046682A70166C2A70366C2A7006602A8026642A8046642A8016682A8036682A80066C2A8026602A9046602A9016642A9036642A9006682A90266C2A90466
#//sleep 100
#//send 2F3D7E3002C2A9016602AA036602AA006642AA026682AA046682AA0166C2AA0366C2AA006602AB026642AB046642AB016682AB036682AB0066C2AB026602AC046602AC016642AC036642AC006682AC0266C2AC0466C2AC016602AD036602AD006642AD026682AD046682AD0166C2AD0366C2AD006602AE026642AE046642AE0166
#//sleep 100
#//send 2F3D4E300382AE036682AE0066C2AE026602AF046602AF016642AF036642AF006682AF0266C2AF0466C2AF016602B0036602B0006642B0026682B0046682B00166C2B00366C2B0006602B1026642B10466
#//sleep 100
#// SPC CMD [PLL sweep] input clock 27.12MHz
#//send 2F3D7E300142A3006682A30266C2A30466C2A3016602A4036602A4006642A4026682A4046682A40166C2A40366C2A4006602A5026642A5046642A5016682A5036682A50066C2A5026602A6046602A6016642A6036642A6006682A60266C2A60466C2A6016602A7036602A7006642A7026682A7046682A70166C2A70366C2A70066
#//sleep 100
#//send 2F3D7E300202A8026642A8046642A8016682A8036682A80066C2A8026602A9046602A9016642A9036642A9006682A90266C2A90466C2A9016602AA036602AA006642AA026682AA046682AA0166C2AA0366C2AA006602AB026642AB046642AB016682AB036682AB0066C2AB026602AC046602AC016642AC036642AC006682AC0266
#//sleep 100
#//send 2F3D4E3003C2AC0466C2AC016602AD036602AD006642AD026682AD046682AD0166C2AD0366C2AD006602AE026642AE046642AE016682AE036682AE0066C2AE026602AF046602AF016642AF036642AF0066
#//sleep 100
#// SPC CMD [PLL sweep] input clock 38.4MHz
#//send 2F3D7E3001C18C0466C18C0366C18C0266C18C0166C18C0066018D0466018D0366018D0266018D0166018D0066418D0466418D0366418D0266418D0166418D0066818D0466818D0366818D0266818D0166818D0066C18D0466C18D0366C18D0266C18D0166C18D0066018E0466018E0366018E0266018E0166018E0066418E0466
#//sleep 100
#//send 2F3D7E3002418E0366418E0266418E0166418E0066818E0466818E0366818E0266818E0166818E0066C18E0466C18E0366C18E0266C18E0166C18E0066018F0466018F0366018F0266018F0166018F0066418F0466418F0366418F0266418F0166418F0066818F0466818F0366818F0266818F0166818F0066C18F0466C18F0366
#//sleep 100
#//send 2F3D4E3003C18F0266C18F0166C18F0066019004660190036601900266019001660190006641900466419003664190026641900166419000668190046681900366819002668190016681900066C1900466
#//sleep 100
#// SPC START
send 2F3D0131
trigger 6F3D07
#//SET LPCD
send 20022E01A0682A064060031900000000820400C005C00900010001A000A00003FA0000004C0014007D00057F0000010003
#// READ OFFSET AFTER SPC
send 20030301A017

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<?xml version="1.0" encoding="utf-8" ?>
<!--
~ Copyright (C) 2019 Motorola Mobility LLC,
~ All Rights Reserved.
~ Motorola Mobility Confidential Restricted.
-->
<permissions>
<feature name="com.motorola.camera3.content.ai" />
</permissions>

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<?xml version="1.0" encoding="utf-8" ?>
<!--
~ Copyright (C) 2013-2020 Motorola Mobility LLC,
~ All Rights Reserved.
~ Motorola Mobility Confidential Restricted.
-->
<permissions>
<feature name="com.google.lens.feature.CAMERA_INTEGRATION" />
</permissions>

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<?xml version="1.0" encoding="utf-8" ?>
<!--
~ Copyright (C) 2021 Motorola Mobility LLC,
~ All Rights Reserved.
~ Motorola Mobility Confidential Restricted.
-->
<permissions>
<feature name="com.motorola.camera3.rhodep" />
</permissions>

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@ -0,0 +1,10 @@
<?xml version="1.0" encoding="utf-8" ?>
<!--
~ Copyright (C) 2013-2020 Motorola Mobility LLC,
~ All Rights Reserved.
~ Motorola Mobility Confidential Restricted.
-->
<permissions>
<feature name="com.motorola.camera3" />
</permissions>

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{
"config":{
"hw_platform": ["IDP","MTP"],
"soc_id": ["444","454", "507"]
},
"ak0991x_0":{
"owner": "sns_ak0991x",
".mag":{
"owner": "sns_ak0991x",
".config":{
"owner": "sns_ak0991x",
"is_dri":{ "type": "int", "ver": "0",
"data": "0"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
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}
}

View file

@ -0,0 +1,186 @@
{
"config":{
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"soc_id": ["454", "507"]
},
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}
}
}
}

View file

@ -0,0 +1,507 @@
{
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},
"dur":{ "type": "flt", "ver": "0",
"data": "7"
},
"quiet":{ "type": "flt", "ver": "0",
"data": "3"
},
"shock":{ "type": "flt", "ver": "0",
"data": "3"
},
"dur_sw":{ "type": "flt", "ver": "0",
"data": "7"
},
"quiet_sw":{ "type": "flt", "ver": "0",
"data": "11"
}
}
},
".placement":{
"owner": "lsm6dso",
"0":{ "type": "flt", "ver": "0",
"data": "0.1"
},
"1":{ "type": "flt", "ver": "0",
"data": "0.1"
},
"2":{ "type": "flt", "ver": "0",
"data": "0.1"
},
"3":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"4":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"5":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"6":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"7":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"8":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"9":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"10":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"11":{ "type": "flt", "ver": "0",
"data": "0.0"
}
}
}
}

View file

@ -0,0 +1,16 @@
{
"config":{
"hw_platform": ["MTP", "RCM", "Surf"],
"soc_id": [ "454", "507"]
},
"power":{
"owner": "power_manager",
".island":{
"owner": "power_manager",
"enable_island":{ "type": "int", "ver": "0",
"data": "1"
}
}
}
}

View file

@ -0,0 +1,334 @@
{
"config":{
"hw_platform": ["MTP", "QRD","Surf"],
"soc_id": ["434", "435", "459", "454", "507"]
},
"icm4x6xx_0":{
"owner": "icm4x6xx",
".accel":{
"owner": "icm4x6xx",
".config":{
"owner": "icm4x6xx",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "4"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
},
".gyro":{
"owner": "icm4x6xx",
".config":{
"owner": "icm4x6xx",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "7"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
},
".md":{
"owner": "icm4x6xx",
".config":{
"owner": "icm4x6xx",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
},
".freefall":{
"owner": "icm4x6xx",
".config":{
"owner": "icm4x6xx",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
},
".temp":{
"owner": "icm4x6xx",
".config":{
"owner": "icm4x6xx",
"is_dri":{ "type": "int", "ver": "0",
"data": "0"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "2"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
}
},
"icm4x6xx_0_platform":{
"owner": "icm4x6xx",
".config":{
"owner": "icm4x6xx",
"bus_type":{ "type": "int", "ver": "0",
"data": "3"
},
"bus_instance":{ "type": "int", "ver": "0",
"data": "1"
},
"slave_config":{ "type": "int", "ver": "0",
"data": "0x68"
},
"i3c_address":{ "type": "int", "ver": "0",
"data": "10"
},
"min_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "400"
},
"max_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "12500"
},
"reg_addr_type":{ "type": "int", "ver": "0",
"data": "0"
},
"dri_irq_num":{ "type": "int", "ver": "0",
"data": "95"
},
"irq_pull_type":{ "type": "int", "ver": "0",
"data": "0"
},
"irq_is_chip_pin":{ "type": "int", "ver": "0",
"data": "1"
},
"irq_drive_strength":{ "type": "int", "ver": "0",
"data": "0"
},
"irq_trigger_type":{ "type": "int", "ver": "0",
"data": "3"
},
"num_rail":{ "type": "int", "ver": "0",
"data": "1"
},
"rail_on_state":{ "type": "int", "ver": "0",
"data": "2"
},
"vddio_rail":{ "type": "str", "ver": "0",
"data": "/pmic/client/sensor_vddio"
},
"rigid_body_type":{ "type": "int", "ver": "0",
"data": "0"
}
},
".orient":{
"owner": "icm4x6xx",
"x":{ "type": "str", "ver": "0",
"data": "-x"
},
"y":{ "type": "str", "ver": "0",
"data": "+y"
},
"z":{ "type": "str", "ver": "0",
"data": "-z"
}
},
".gyro":{
"owner": "icm4x6xx",
".fac_cal":{
"owner": "icm4x6xx",
".corr_mat":{
"owner": "icm4x6xx",
"0_0":{ "type": "flt", "ver": "0",
"data": "1.0"
},
"0_1":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"0_2":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"1_0":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"1_1":{ "type": "flt", "ver": "0",
"data": "1.0"
},
"1_2":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"2_0":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"2_1":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"2_2":{ "type": "flt", "ver": "0",
"data": "1.0"
}
},
".bias":{
"owner": "icm4x6xx",
"x":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"y":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"z":{ "type": "flt", "ver": "0",
"data": "0.0"
}
}
}
},
".accel":{
"owner": "icm4x6xx",
".fac_cal":{
"owner": "icm4x6xx",
".corr_mat":{
"owner": "icm4x6xx",
"0_0":{ "type": "flt", "ver": "0",
"data": "1.0"
},
"0_1":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"0_2":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"1_0":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"1_1":{ "type": "flt", "ver": "0",
"data": "1.0"
},
"1_2":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"2_0":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"2_1":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"2_2":{ "type": "flt", "ver": "0",
"data": "1.0"
}
},
".bias":{
"owner": "icm4x6xx",
"x":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"y":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"z":{ "type": "flt", "ver": "0",
"data": "0.0"
}
}
}
},
".temp":{
"owner": "icm4x6xx",
".fac_cal":
{
"owner": "icm4x6xx",
".scale":{
"owner": "icm4x6xx",
"x":{ "type": "flt", "ver": "0",
"data": "1.0"
}
},
".bias":{
"owner": "icm4x6xx",
"x":{ "type": "flt", "ver": "0",
"data": "0.0"
}
}
}
},
".md":{
"owner": "icm4x6xx",
".config":{
"owner": "icm4x6xx",
"thresh":{ "type": "flt", "ver": "0",
"data": "0.6132"
},
"disable":{ "type": "int", "ver": "0",
"data": "0"
},
"win":{ "type": "flt", "ver": "0",
"data": "0.0"
}
}
},
".placement":{
"owner": "icm4x6xx",
"0":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"1":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"2":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"3":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"4":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"5":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"6":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"7":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"8":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"9":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"10":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"11":{ "type": "flt", "ver": "0",
"data": "0.0"
}
}
}
}

View file

@ -0,0 +1,165 @@
{
"config":{
"hw_platform": ["IDP","MTP"],
"soc_id": ["444","454", "507"]
},
"mmc56x3x_0":{
"owner": "sns_mmc56x3x",
".mag":{
"owner": "sns_mmc56x3x",
".config":{
"owner": "sns_mmc56x3x",
"is_dri":{ "type": "int", "ver": "0",
"data": "0"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
}
},
"mmc56x3x_0_platform":{
"owner": "sns_mmc56x3x",
".config":{
"owner": "sns_mmc56x3x",
"bus_type":{ "type": "int", "ver": "0",
"data": "0"
},
"bus_instance":{ "type": "int", "ver": "0",
"data": "2"
},
"slave_config":{ "type": "int", "ver": "0",
"data": "0x30"
},
"i3c_address":{ "type": "int", "ver": "0",
"data": "20"
},
"min_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "400"
},
"max_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "400"
},
"reg_addr_type":{ "type": "int", "ver": "0",
"data": "0"
},
"num_rail":{ "type": "int", "ver": "0",
"data": "1"
},
"rail_on_state":{ "type": "int", "ver": "0",
"data": "2"
},
"vddio_rail":{ "type": "str", "ver": "0",
"data": "/pmic/client/sensor_vddio"
},
"rigid_body_type":{ "type": "int", "ver": "0",
"data": "0"
}
},
".orient":{
"owner": "sns_mmc56x3x",
"x":{ "type": "str", "ver": "0",
"data": "-x"
},
"y":{ "type": "str", "ver": "0",
"data": "+y"
},
"z":{ "type": "str", "ver": "0",
"data": "-z"
}
},
".mag":{
"owner": "sns_mmc56x3x",
".fac_cal":{
"owner": "sns_mmc56x3x",
".corr_mat":{
"owner": "sns_mmc56x3x",
"0_0":{ "type": "flt", "ver": "0",
"data": "0.994472"
},
"0_1":{ "type": "flt", "ver": "0",
"data": "0.103335"
},
"0_2":{ "type": "flt", "ver": "0",
"data": "-0.0151685"
},
"1_0":{ "type": "flt", "ver": "0",
"data": "0.0922025"
},
"1_1":{ "type": "flt", "ver": "0",
"data": "0.9946685"
},
"1_2":{ "type": "flt", "ver": "0",
"data": "-0.0274975"
},
"2_0":{ "type": "flt", "ver": "0",
"data": "0.041299"
},
"2_1":{ "type": "flt", "ver": "0",
"data": "0.021829"
},
"2_2":{ "type": "flt", "ver": "0",
"data": "1.1053055"
}
},
".bias":{
"owner": "sns_mmc56x3x",
"x":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"y":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"z":{ "type": "flt", "ver": "0",
"data": "0.0"
}
}
}
},
".placement":{
"owner": "sns_mmc56x3x",
"0":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"1":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"2":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"3":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"4":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"5":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"6":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"7":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"8":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"9":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"10":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"11":{ "type": "flt", "ver": "0",
"data": "0.0"
}
}
}
}

View file

@ -0,0 +1,19 @@
{
"config":
{
"hw_platform": ["HDK", "MTP", "Dragon", "Surf", "IDP"],
"soc_id": ["361", "339", "365", "454", "507"]
},
"mot_camgest":{
"owner": "mot_camgest",
".params":{
"owner": "mot_camgest",
"y_orient_down_thres":{ "type": "flt", "ver": "0",
"data": "-4.25"
},
"y_orient_up_thres":{ "type": "flt", "ver": "0",
"data": "4.5"
}
}
}
}

View file

@ -0,0 +1,16 @@
{
"config": {
"hw_platform": [ "MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["291", "246", "305", "321", "336", "339", "340", "347", "341", "355", "356", "360", "361", "365", "366", "393", "394", "400",
"407", "417", "440", "415", "439", "416", "437", "444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "455", "456", "454", "507"]
},
"sns_amd": {
"owner": "sns_amd",
"param1": {"ver": "0","type": "flt","data": "0.06"
},
"param2": {"ver": "0","type": "flt","data": "0.5"
},
"sample_rate": {"ver": "0","type": "flt", "data": "10.0"
}
}
}

View file

@ -0,0 +1,11 @@
{
"config": {
"hw_platform": [ "MTP", "Dragon", "Surf", "QRD", "HDK"],
"soc_id": ["339", "340", "361", "415", "439", "456"]
},
"sns_amd": {
"owner": "sns_amd",
"enabled": {"ver": "0","type": "int", "data": "0"
}
}
}

View file

@ -0,0 +1,12 @@
{
"config": {
"hw_platform": [ "MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["291", "246", "305", "321", "336", "347", "341", "355", "360", "365", "366", "393", "394", "400", "407", "417", "440",
"416", "437", "444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "454", "507"]
},
"sns_amd": {
"owner": "sns_amd",
"enabled": {"ver": "0","type": "int", "data": "1"
}
}
}

View file

@ -0,0 +1,19 @@
{
"config":{
"hw_platform": ["MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["291", "246", "300", "301", "305", "321", "336", "339", "341", "347", "355", "356", "360", "361", "365", "366", "393", "394", "400",
"407", "416", "417", "437", "440", "415", "439", "444", "445", "420", "424", "443", "459", "441", "471", "455", "456", "454", "507"]
},
"sns_cm":{
"owner": "sns_cm",
"heap_size":{ "type": "int", "ver": "0",
"data": "1572864"
},
"max_batch_disabled":{ "type": "int", "ver": "0",
"data": "0"
},
"min_batch_period_thrshld_ms":{ "type": "int", "ver": "0",
"data": "10"
}
}
}

View file

@ -0,0 +1,379 @@
{
"config":
{
"hw_platform": ["MTP", "Dragon", "Surf", "QRD", "HDK", "IDP", "IOT"],
"soc_id": ["291", "246", "300", "301", "305", "321", "336", "339", "341", "347", "355", "356", "360", "361", "352", "365", "366", "393", "394", "400",
"407", "417", "440", "415", "439", "416", "437", "444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "455", "456", "454", "507"]
},
"sns_diag_config":
{
"owner":"diag_filter_sensor",
"qdss":
{
"type" : "int",
"ver" : "0",
"data" : "0"
}
},
"sns_diag_sensor_datatype":
{
"owner":"diag_filter_sensor",
"geomag_rv":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"game_rv":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"gravity":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"cm":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"accel":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"humidity":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"ambient_temperature":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"sensor_temperature":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"motion_detect":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"gyro":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"ultra_violet":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"pressure":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"mag":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"offbody_detect":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"thermopile":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"ambient_light":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"hall":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"proximity":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"rgb":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"test":
{
"type" : "int",
"ver" : "0",
"data" : "0"
},
"flush_test":
{
"type" : "int",
"ver" : "0",
"data" : "0"
},
"md_test":
{
"type" : "int",
"ver" : "0",
"data" : "0"
},
"da_test":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"amd":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"rmd":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"facing":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"gyro_cal":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"oem1":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"mag_cal":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"resampler":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"smd":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"basic_gestures":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"multishake":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"bring_to_ear":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"cmc":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"dpc":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"distance_bound":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"gyro_rot_matrix":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"fmv":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"rotv":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"pedometer":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"device_orient":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"tilt":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"tilt_to_wake":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"heart_rate":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"ppg":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"wrist_tilt_gesture":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"pedometer_wrist":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"data_acquisition_engine":
{
"type" : "int",
"ver" : "0",
"data" : "0"
},
"ccd_walk":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"ccd_ttw":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"ccd_hw":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"threshold":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"sar":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"radar":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"activity_recognition":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"dae_datalog":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"location":
{
"type" : "int",
"ver" : "0",
"data" : "1"
},
"step_detect":
{
"type" : "int",
"ver" : "0",
"data" : "1"
}
}
}

View file

@ -0,0 +1,49 @@
{
"config":
{
"hw_platform": ["MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["415", "439", "456"]
},
"sns_fmv_platform": {
"owner": "sns_fmv",
".config":{
"owner": "sns_fmv",
"accuracy_unknown": { "type": "int", "ver": "0",
"data": "30000"
},
"accuracy_abs_rest": { "type": "int", "ver": "0",
"data": "30000"
},
"accuracy_rel_rest": { "type": "int", "ver": "0",
"data": "30000"
},
"accuracy_motion": { "type": "int", "ver": "0",
"data": "30000"
},
"accuracy_fast_motion": { "type": "int", "ver": "0",
"data": "10000"
},
"gyro_gap_thresh": { "type": "int", "ver": "0",
"data": "500"
},
"mag_innov": { "type": "flt", "ver": "0",
"data": "9.0"
},
"mag_sample_gap_fac": { "type": "flt", "ver": "0",
"data": "1.0"
},
"tyro_thresh_for_zupt": { "type": "flt", "ver": "0",
"data": "0.001"
},
"amd_int_cfg_param1": { "type": "flt", "ver": "0",
"data": "0.000061"
},
"amd_int_cfg_param2": { "type": "flt", "ver": "0",
"data": "0.6"
},
"amd_int_cfg_param3": { "type": "flt", "ver": "0",
"data": "0.4"
}
}
}
}

View file

@ -0,0 +1,53 @@
{
"config":
{
"hw_platform": ["MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["291", "246", "300", "301", "305", "321", "336", "339", "341", "355", "356", "360", "361", "365", "366", "393", "394", "400", "407", "417",
"440", "444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "454", "507"]
},
"sns_fmv_platform": {
"owner": "sns_fmv",
".config":{
"owner": "sns_fmv",
"accuracy_unknown": { "type": "int", "ver": "0",
"data": "3000"
},
"accuracy_abs_rest": { "type": "int", "ver": "0",
"data": "250"
},
"accuracy_rel_rest": { "type": "int", "ver": "0",
"data": "1500"
},
"accuracy_motion": { "type": "int", "ver": "0",
"data": "3000"
},
"gyro_gap_thresh": { "type": "int", "ver": "0",
"data": "501"
},
"mag_innov": { "type": "flt", "ver": "0",
"data": "9.0"
},
"mag_sample_gap_fac": { "type": "flt", "ver": "0",
"data": "1.0"
},
"tyro_thresh_for_zupt": { "type": "flt", "ver": "0",
"data": "0.001"
},
"sensor_rpt_rate": { "type": "flt", "ver": "0",
"data": "1.0"
},
"def_sample_rate": { "type": "flt", "ver": "0",
"data": "5.0"
},
"amd_int_cfg_param1": { "type": "flt", "ver": "0",
"data": "0.06"
},
"amd_int_cfg_param2": { "type": "flt", "ver": "0",
"data": "0.5"
},
"amd_int_cfg_param5": { "type": "flt", "ver": "0",
"data": "0.16"
}
}
}
}

View file

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{
"config": {
"hw_platform": ["MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["291", "246", "300", "301", "305", "321", "336", "339", "341", "355", "356", "360", "361", "365", "366", "393", "394", "400", "407", "417",
"440", "415", "439", "416", "437", "444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "456", "454", "507"]
},
"sns_geomag_rv": {
"owner": "sns_geomag_rv",
".config": {
"owner": "sns_geomag_rv",
"gamerv_cfg_param1": {"type": "int","ver": "0","data": "300"
},
"gamerv_cfg_param2": {"type": "int","ver": "0","data": "300"
},
"fusion_min_samp_rate": {"type": "flt","ver": "0","data": "1.0"
},
"gamerv_def_rpt_rate": {"type": "flt","ver": "0","data": "1.0"
},
"gamerv_def_sample_rate": {"type": "flt","ver": "0","data": "5.0"
},
"amd_int_cfg_param1": {"type": "flt","ver": "0","data": "0.06"
},
"amd_int_cfg_param2": {"type": "flt","ver": "0","data": "0.5"
},
"game_rv_c_sys": {"type": "int","ver": "0","data": "0"
}
}
}
}

View file

@ -0,0 +1,25 @@
{
"config": {
"hw_platform": ["MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["291", "246", "300", "301", "305", "321", "336", "347", "339", "341", "355", "356", "360", "361", "365", "366", "393", "394", "400",
"407", "417", "440", "415", "439", "416", "437", "444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "455", "456", "454", "507"]
},
"sns_gyro_cal_config": {
"owner": "sns_gyro_cal",
"calibration_period": {"type": "int","ver": "0",
"data": "60"
},
"num_samples": {"type": "int","ver": "0",
"data": "64"
},
"variance_threshold": {"type": "flt","ver": "0",
"data": "0.00000085"
},
"sample_rate": {"type": "flt","ver": "0",
"data": "10.0"
},
"bias_threshold": {"type": "flt","ver": "0",
"data": "0.20"
}
}
}

View file

@ -0,0 +1,16 @@
{
"config": {
"hw_platform": ["MTP", "Dragon", "Surf", "HDK", "IDP", "QRD"],
"soc_id": ["339", "355", "356", "361", "365", "366", "394", "400", "407", "417", "440", "415", "439", "416", "437", "444", "445", "420",
"424", "443", "434", "435", "459", "441", "471", "456", "454", "507"]
},
"sns_mag_cal_config": {
"owner": "sns_mag_cal",
"anomaly_threshold": {"type": "flt","ver": "0",
"data": "200.0"
},
"sample_rate": { "type": "flt", "ver": "0",
"data": "25.0"
}
}
}

View file

@ -0,0 +1,25 @@
{
"config": {
"hw_platform": ["MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["291", "246", "300", "301", "305", "321", "336", "339", "341", "355", "356", "360", "361", "365", "366", "393", "394",
"400", "407", "417", "440", "415", "439", "416", "437", "444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "456", "454", "507"]
},
"sns_rmd": {
"owner": "sns_rmd",
"param4": {
"ver": "0", "type": "flt", "data": "0.2"
},
"param3": {
"ver": "0", "type": "flt", "data": "5"
},
"param2": {
"ver": "0", "type": "flt", "data": "0.2"
},
"param1": {
"ver": "0", "type": "flt", "data": "173"
},
"sample_rate": {
"ver": "0", "type": "flt", "data": "30.0"
}
}
}

View file

@ -0,0 +1,23 @@
{
"config":
{
"hw_platform": ["MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["291", "246", "300", "301", "305", "321", "336", "339", "341", "355", "356", "360", "361", "365", "366", "393", "394", "400",
"407", "417", "440", "415", "439", "416", "437","444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "456", "454", "507"]
},
"sns_rotv_platform": {
"owner": "sns_rotv",
".config":{
"owner": "sns_rotv",
"min_report_rate": {
"type": "flt", "ver": "0", "data": "1.0"
},
"coordinate_sys": {
"type": "int", "ver": "0", "data": "0"
},
"sample_rate": {
"type": "flt", "ver": "0", "data": "5.0"
}
}
}
}

View file

@ -0,0 +1,40 @@
{
"config": {
"hw_platform": ["MTP", "Dragon", "Surf", "QRD", "HDK", "IDP"],
"soc_id": ["291", "246", "300", "301", "305", "321", "336", "339", "341", "355", "356", "360", "361", "365", "366", "393", "347", "394", "400",
"407", "416", "417", "437", "440", "415", "439", "444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "456", "454", "507"]
},
"sns_smd": {
"owner": "sns_smd",
"sample_rate": {
"ver": "0", "type": "flt", "data": "10.0"
},
"accel_window_time": {
"ver": "0", "type": "int", "data": "5"
},
"detect_threshold": {
"ver": "0", "type": "flt", "data": "0.158113883"
},
"self_transition_prob_sm": {
"ver": "0", "type": "flt", "data": "0.9"
},
"variable_decision_latency": {
"ver": "0", "type": "int", "data": "1"
},
"max_latency": {
"ver": "0", "type": "int", "data": "10"
},
"step_count_thresh": {
"ver": "0", "type": "int", "data": "5"
},
"step_window_time": {
"ver": "0", "type": "int", "data": "3"
},
"eigen_thresh": {
"ver": "0", "type": "flt", "data": "6.0"
},
"accel_norm_std_thresh": {
"ver": "0", "type": "flt", "data": "2.0"
}
}
}

View file

@ -0,0 +1,12 @@
{
"config": {
"hw_platform": [ "MTP", "Dragon", "Surf", "HDK", "IDP", "QRD"],
"soc_id": ["291", "246", "305", "321", "336", "341", "355", "360", "365", "366", "393", "394", "400", "407", "417", "440", "444", "445", "420", "424", "443",
"434", "435", "459", "441", "471", "454", "507"]
},
"sns_tilt": {
"owner": "sns_tilt",
"enabled": {"ver": "0","type": "int", "data": "1"
}
}
}

View file

@ -0,0 +1,48 @@
{
"config": {
"hw_platform": [ "MTP", "Dragon", "Surf", "IDP", "QRD"
],
"soc_id": ["291", "246", "305", "321", "336", "339", "355", "356", "360", "361", "365", "366", "393", "394", "400", "407", "417", "440",
"415", "439", "444", "445", "420", "424", "443", "434", "435", "459", "441", "471", "456", "454", "507"
]
},
"sns_tilt_to_wake": {
"owner": "sns_tilt_to_wake",
"accel_sampling_rate":{"ver": "0","type": "flt",
"data": "25.0"
},
"filter_window_seconds":{"ver": "0","type": "flt",
"data": "0.16"
},
"accel_window_seconds":{"ver": "0","type": "flt",
"data": "1.1"
},
"accel_sub_window_seconds":{"ver": "0","type": "flt",
"data": "0.55"
},
"window_for_accel_stability_check_seconds":{"ver": "0","type": "flt",
"data": "0.16"
},
"min_delta_pitch_threshold_deg":{"ver": "0","type": "flt",
"data": "45.0"
},
"min_pitch_threshold_deg":{"ver": "0","type": "flt",
"data": "40.0"
},
"min_abs_delta_z_threshold_deg":{"ver": "0","type": "flt",
"data": "10.0"
},
"max_roll_threshold_deg":{"ver": "0","type": "flt",
"data": "25.0"
},
"max_accel_spread_threshold":{"ver": "0","type": "flt",
"data": "4.8"
},
"max_accel_norm_deviation_from_G_threshold":{"ver": "0","type": "flt",
"data": "2.7"
},
"max_pitch_threshold_deg":{"ver": "0","type": "flt",
"data": "200.0"
}
}
}

View file

@ -0,0 +1,29 @@
{
"config": {
"hw_platform": [
"MTP", "Dragon", "Surf", "QRD" ],
"soc_id": [
"300", "301" ]
},
"sns_wrist_pedo": {
"owner": "sns_wrist_pedo",
"default_disable": {
"ver": "0", "type": "int", "data": "0"
},
"sample_rate": {
"ver": "0", "type": "flt", "data": "20.0"
},
"step_count_threshold": {
"ver": "0", "type": "int", "data": "0"
},
"step_threshold": {
"ver": "0", "type": "flt", "data": "10.1"
},
"swing_threshold": {
"ver": "0", "type": "flt", "data": "10.5"
},
"step_prob_threshold": {
"ver": "0", "type": "flt", "data": "0.49"
}
}
}

View file

@ -0,0 +1,313 @@
{
"config": {
"hw_platform": ["HDK", "MTP", "Dragon", "Surf", "IDP"],
"soc_id": ["361", "339", "365", "454", "507"]
},
"stk3a5x_0":{
"owner": "sns_stk3a5x",
".ambient_light":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
},
".proximity":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
}
},
"stk3a5x_0_platform":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"bus_type":{ "type": "int", "ver": "0",
"data": "0"
},
"bus_instance":{ "type": "int", "ver": "0",
"data": "2"
},
"slave_config":{ "type": "int", "ver": "0",
"data": "70"
},
"min_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "400"
},
"max_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "400"
},
"reg_addr_type":{ "type": "int", "ver": "0",
"data": "0"
},
"dri_irq_num":{ "type": "int", "ver": "0",
"data": "98"
},
"irq_pull_type":{ "type": "int", "ver": "0",
"data": "3"
},
"irq_is_chip_pin":{ "type": "int", "ver": "0",
"data": "1"
},
"irq_drive_strength":{ "type": "int", "ver": "0",
"data": "0"
},
"irq_trigger_type":{ "type": "int", "ver": "0",
"data": "1"
},
"num_rail":{ "type": "int", "ver": "0",
"data": "2"
},
"rail_on_state":{ "type": "int", "ver": "0",
"data": "2"
},
"vdd_rail":{ "type": "str", "ver": "0",
"data": "/see/rail/eLDO"
},
"vddio_rail":{ "type": "str", "ver": "0",
"data": "/pmic/client/sensor_vddio"
},
"rigid_body_type":{ "type": "int", "ver": "0",
"data": "0"
}
},
".als":{
"owner": "sns_stk3a5x",
".fac_cal":{
"owner": "sns_stk3a5x",
"scale":{ "type": "flt", "ver": "0",
"data": "500.0"
},
"bias":{ "type": "flt", "ver": "0",
"data": "5000.0"
},
"target_lux":{ "type": "flt", "ver": "0",
"data": "500.0"
},
"default_scale":{ "type": "flt", "ver": "0",
"data": "500.0"
}
}
},
".ps":{
"owner": "sns_stk3a5x",
".fac_cal":{
"owner": "sns_stk3a5x",
"near_threshold":{ "type": "flt", "ver": "0",
"data": "8200.0"
},
"far_threshold":{ "type": "flt", "ver": "0",
"data": "8000.0"
},
"ctir_config":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"cover":{ "type": "flt", "ver": "0",
"data": "1200.0"
},
"uncover":{ "type": "flt", "ver": "0",
"data": "200.0"
},
"default_near_threshold":{ "type": "flt", "ver": "0",
"data": "8200.0"
},
"default_far_threshold":{ "type": "flt", "ver": "0",
"data": "8000.0"
},
"default_factor":{ "type": "flt", "ver": "0",
"data": "1000.0"
},
"delta2":{ "type": "flt", "ver": "0",
"data": "550.0"
},
"delta3":{ "type": "flt", "ver": "0",
"data": "750.0"
},
"factor":{ "type": "flt", "ver": "0",
"data": "1000.0"
},
"high_coeff":{ "type": "flt", "ver": "0",
"data": "0.82"
},
"low_coeff":{ "type": "flt", "ver": "0",
"data": "0.35"
},
"default_cover":{ "type": "flt", "ver": "0",
"data": "1200.0"
},
"default_uncover":{ "type": "flt", "ver": "0",
"data": "200.0"
},
"min_delta":{ "type": "flt", "ver": "0",
"data": "0.0"
}
},
".variable":{
"owner": "sns_stk3a5x",
"pLowTh":{ "type": "flt", "ver": "0",
"data": "400.0"
},
"pHighTh":{ "type": "flt", "ver": "0",
"data": "1000.0"
},
"WTime":{ "type": "int", "ver": "0",
"data": "127"
},
"high_coeff":{ "type": "flt", "ver": "0",
"data": "1.85"
},
"low_coeff":{ "type": "flt", "ver": "0",
"data": "0.8"
},
"pUseOilAlgo":{ "type": "int", "ver": "0",
"data": "0"
}
},
".algo":{
"owner": "sns_stk3a5x",
"SMUDGE_NT":{ "type": "int", "ver": "0",
"data": "200"
},
"SMUDGE_FT":{ "type": "int", "ver": "0",
"data": "200"
},
"SMUDGE_DIFF":{ "type": "int", "ver": "0",
"data": "10000"
}
}
}
},
"stk3a5x_0_private":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"wait":{ "type": "int", "ver": "0",
"data": "32"
},
"prst_ps":{ "type": "int", "ver": "0",
"data": "1"
},
"gain_ps":{ "type": "int", "ver": "0",
"data": "3"
},
"gain_ps_dx16":{ "type": "int", "ver": "0",
"data": "1"
},
"it_ps":{ "type": "int", "ver": "0",
"data": "2"
},
"irdr_led":{ "type": "int", "ver": "0",
"data": "8"
},
"prst_als":{ "type": "int", "ver": "0",
"data": "0"
},
"gain_als":{ "type": "int", "ver": "0",
"data": "3"
},
"gain_als_dx128":{ "type": "int", "ver": "0",
"data": "0"
},
"gain_c":{ "type": "int", "ver": "0",
"data": "3"
},
"gain_c_dx128":{ "type": "int", "ver": "0",
"data": "0"
},
"it_als":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps0":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps1":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps2":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps3":{ "type": "int", "ver": "0",
"data": "1"
},
"pUseOilAlgo":{ "type": "int", "ver": "0",
"data": "1"
}
},
".als_coefficient":{
"owner": "sns_stk3a5x",
"als_offset":{ "type": "int", "ver": "0",
"data": "5"
},
"ratio_c":{ "type": "int", "ver": "0",
"data": "1"
},
"ratio_sun":{ "type": "int", "ver": "0",
"data": "30"
},
"ratio_d":{ "type": "int", "ver": "0",
"data": "70"
},
"ratio_a":{ "type": "int", "ver": "0",
"data": "135"
},
"ratio_h":{ "type": "int", "ver": "0",
"data": "250"
},
"window_c":{ "type": "flt", "ver": "0",
"data": "1.02"
},
"window_sun":{ "type": "flt", "ver": "0",
"data": "0.172"
},
"window_d":{ "type": "flt", "ver": "0",
"data": "0.114"
},
"window_a":{ "type": "flt", "ver": "0",
"data": "0.043"
},
"window_h":{ "type": "flt", "ver": "0",
"data": "0.01725"
},
"min_c_data":{ "type": "int", "ver": "0",
"data": "50"
},
"min_g_data":{ "type": "int", "ver": "0",
"data": "20"
},
"max_als_data":{ "type": "int", "ver": "0",
"data": "64000"
},
"min_als_data":{ "type": "int", "ver": "0",
"data": "1500"
},
"flag_opt":{ "type": "int", "ver": "0",
"data": "3"
}
}
}
}

View file

@ -0,0 +1,314 @@
{
"config": {
"hw_platform": ["HDK", "MTP", "Dragon", "Surf", "IDP"],
"soc_id": ["361", "339", "365", "454", "507"],
"ro.vendor.hw.revision": ["dvt1"]
},
"stk3a5x_0":{
"owner": "sns_stk3a5x",
".ambient_light":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
},
".proximity":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
}
},
"stk3a5x_0_platform":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"bus_type":{ "type": "int", "ver": "0",
"data": "0"
},
"bus_instance":{ "type": "int", "ver": "0",
"data": "2"
},
"slave_config":{ "type": "int", "ver": "0",
"data": "70"
},
"min_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "400"
},
"max_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "400"
},
"reg_addr_type":{ "type": "int", "ver": "0",
"data": "0"
},
"dri_irq_num":{ "type": "int", "ver": "0",
"data": "98"
},
"irq_pull_type":{ "type": "int", "ver": "0",
"data": "3"
},
"irq_is_chip_pin":{ "type": "int", "ver": "0",
"data": "1"
},
"irq_drive_strength":{ "type": "int", "ver": "0",
"data": "0"
},
"irq_trigger_type":{ "type": "int", "ver": "0",
"data": "1"
},
"num_rail":{ "type": "int", "ver": "0",
"data": "2"
},
"rail_on_state":{ "type": "int", "ver": "0",
"data": "2"
},
"vdd_rail":{ "type": "str", "ver": "0",
"data": "/see/rail/eLDO"
},
"vddio_rail":{ "type": "str", "ver": "0",
"data": "/pmic/client/sensor_vddio"
},
"rigid_body_type":{ "type": "int", "ver": "0",
"data": "0"
}
},
".als":{
"owner": "sns_stk3a5x",
".fac_cal":{
"owner": "sns_stk3a5x",
"scale":{ "type": "flt", "ver": "0",
"data": "500.0"
},
"bias":{ "type": "flt", "ver": "0",
"data": "5000.0"
},
"target_lux":{ "type": "flt", "ver": "0",
"data": "500.0"
},
"default_scale":{ "type": "flt", "ver": "0",
"data": "500.0"
}
}
},
".ps":{
"owner": "sns_stk3a5x",
".fac_cal":{
"owner": "sns_stk3a5x",
"near_threshold":{ "type": "flt", "ver": "0",
"data": "8200.0"
},
"far_threshold":{ "type": "flt", "ver": "0",
"data": "8000.0"
},
"ctir_config":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"cover":{ "type": "flt", "ver": "0",
"data": "1200.0"
},
"uncover":{ "type": "flt", "ver": "0",
"data": "200.0"
},
"default_near_threshold":{ "type": "flt", "ver": "0",
"data": "8200.0"
},
"default_far_threshold":{ "type": "flt", "ver": "0",
"data": "8000.0"
},
"default_factor":{ "type": "flt", "ver": "0",
"data": "1000.0"
},
"delta2":{ "type": "flt", "ver": "0",
"data": "550.0"
},
"delta3":{ "type": "flt", "ver": "0",
"data": "750.0"
},
"factor":{ "type": "flt", "ver": "0",
"data": "1000.0"
},
"high_coeff":{ "type": "flt", "ver": "0",
"data": "0.41"
},
"low_coeff":{ "type": "flt", "ver": "0",
"data": "0.175"
},
"default_cover":{ "type": "flt", "ver": "0",
"data": "1200.0"
},
"default_uncover":{ "type": "flt", "ver": "0",
"data": "200.0"
},
"min_delta":{ "type": "flt", "ver": "0",
"data": "0.0"
}
},
".variable":{
"owner": "sns_stk3a5x",
"pLowTh":{ "type": "flt", "ver": "0",
"data": "400.0"
},
"pHighTh":{ "type": "flt", "ver": "0",
"data": "1000.0"
},
"WTime":{ "type": "int", "ver": "0",
"data": "127"
},
"high_coeff":{ "type": "flt", "ver": "0",
"data": "0.925"
},
"low_coeff":{ "type": "flt", "ver": "0",
"data": "0.4"
},
"pUseOilAlgo":{ "type": "int", "ver": "0",
"data": "0"
}
},
".algo":{
"owner": "sns_stk3a5x",
"SMUDGE_NT":{ "type": "int", "ver": "0",
"data": "200"
},
"SMUDGE_FT":{ "type": "int", "ver": "0",
"data": "200"
},
"SMUDGE_DIFF":{ "type": "int", "ver": "0",
"data": "10000"
}
}
}
},
"stk3a5x_0_private":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"wait":{ "type": "int", "ver": "0",
"data": "32"
},
"prst_ps":{ "type": "int", "ver": "0",
"data": "1"
},
"gain_ps":{ "type": "int", "ver": "0",
"data": "3"
},
"gain_ps_dx16":{ "type": "int", "ver": "0",
"data": "1"
},
"it_ps":{ "type": "int", "ver": "0",
"data": "2"
},
"irdr_led":{ "type": "int", "ver": "0",
"data": "8"
},
"prst_als":{ "type": "int", "ver": "0",
"data": "0"
},
"gain_als":{ "type": "int", "ver": "0",
"data": "3"
},
"gain_als_dx128":{ "type": "int", "ver": "0",
"data": "0"
},
"gain_c":{ "type": "int", "ver": "0",
"data": "3"
},
"gain_c_dx128":{ "type": "int", "ver": "0",
"data": "0"
},
"it_als":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps0":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps1":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps2":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps3":{ "type": "int", "ver": "0",
"data": "1"
},
"pUseOilAlgo":{ "type": "int", "ver": "0",
"data": "1"
}
},
".als_coefficient":{
"owner": "sns_stk3a5x",
"als_offset":{ "type": "int", "ver": "0",
"data": "5"
},
"ratio_c":{ "type": "int", "ver": "0",
"data": "1"
},
"ratio_sun":{ "type": "int", "ver": "0",
"data": "30"
},
"ratio_d":{ "type": "int", "ver": "0",
"data": "70"
},
"ratio_a":{ "type": "int", "ver": "0",
"data": "135"
},
"ratio_h":{ "type": "int", "ver": "0",
"data": "210"
},
"window_c":{ "type": "flt", "ver": "0",
"data": "4.08"
},
"window_sun":{ "type": "flt", "ver": "0",
"data": "0.688"
},
"window_d":{ "type": "flt", "ver": "0",
"data": "0.456"
},
"window_a":{ "type": "flt", "ver": "0",
"data": "0.172"
},
"window_h":{ "type": "flt", "ver": "0",
"data": "0.0672"
},
"min_c_data":{ "type": "int", "ver": "0",
"data": "50"
},
"min_g_data":{ "type": "int", "ver": "0",
"data": "20"
},
"max_als_data":{ "type": "int", "ver": "0",
"data": "64000"
},
"min_als_data":{ "type": "int", "ver": "0",
"data": "1500"
},
"flag_opt":{ "type": "int", "ver": "0",
"data": "3"
}
}
}
}

View file

@ -0,0 +1,314 @@
{
"config": {
"hw_platform": ["HDK", "MTP", "Dragon", "Surf", "IDP"],
"soc_id": ["361", "339", "365", "454", "507"],
"ro.vendor.hw.revision": ["dvt2"]
},
"stk3a5x_0":{
"owner": "sns_stk3a5x",
".ambient_light":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
},
".proximity":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"is_dri":{ "type": "int", "ver": "0",
"data": "1"
},
"hw_id":{ "type": "int", "ver": "0",
"data": "0"
},
"res_idx":{ "type": "int", "ver": "0",
"data": "0"
},
"sync_stream":{ "type": "int", "ver": "0",
"data": "0"
}
}
}
},
"stk3a5x_0_platform":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"bus_type":{ "type": "int", "ver": "0",
"data": "0"
},
"bus_instance":{ "type": "int", "ver": "0",
"data": "2"
},
"slave_config":{ "type": "int", "ver": "0",
"data": "70"
},
"min_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "400"
},
"max_bus_speed_khz":{ "type": "int", "ver": "0",
"data": "400"
},
"reg_addr_type":{ "type": "int", "ver": "0",
"data": "0"
},
"dri_irq_num":{ "type": "int", "ver": "0",
"data": "98"
},
"irq_pull_type":{ "type": "int", "ver": "0",
"data": "3"
},
"irq_is_chip_pin":{ "type": "int", "ver": "0",
"data": "1"
},
"irq_drive_strength":{ "type": "int", "ver": "0",
"data": "0"
},
"irq_trigger_type":{ "type": "int", "ver": "0",
"data": "1"
},
"num_rail":{ "type": "int", "ver": "0",
"data": "2"
},
"rail_on_state":{ "type": "int", "ver": "0",
"data": "2"
},
"vdd_rail":{ "type": "str", "ver": "0",
"data": "/see/rail/eLDO"
},
"vddio_rail":{ "type": "str", "ver": "0",
"data": "/pmic/client/sensor_vddio"
},
"rigid_body_type":{ "type": "int", "ver": "0",
"data": "0"
}
},
".als":{
"owner": "sns_stk3a5x",
".fac_cal":{
"owner": "sns_stk3a5x",
"scale":{ "type": "flt", "ver": "0",
"data": "500.0"
},
"bias":{ "type": "flt", "ver": "0",
"data": "5000.0"
},
"target_lux":{ "type": "flt", "ver": "0",
"data": "500.0"
},
"default_scale":{ "type": "flt", "ver": "0",
"data": "500.0"
}
}
},
".ps":{
"owner": "sns_stk3a5x",
".fac_cal":{
"owner": "sns_stk3a5x",
"near_threshold":{ "type": "flt", "ver": "0",
"data": "8200.0"
},
"far_threshold":{ "type": "flt", "ver": "0",
"data": "8000.0"
},
"ctir_config":{ "type": "flt", "ver": "0",
"data": "0.0"
},
"cover":{ "type": "flt", "ver": "0",
"data": "1200.0"
},
"uncover":{ "type": "flt", "ver": "0",
"data": "200.0"
},
"default_near_threshold":{ "type": "flt", "ver": "0",
"data": "8200.0"
},
"default_far_threshold":{ "type": "flt", "ver": "0",
"data": "8000.0"
},
"default_factor":{ "type": "flt", "ver": "0",
"data": "1000.0"
},
"delta2":{ "type": "flt", "ver": "0",
"data": "550.0"
},
"delta3":{ "type": "flt", "ver": "0",
"data": "750.0"
},
"factor":{ "type": "flt", "ver": "0",
"data": "1000.0"
},
"high_coeff":{ "type": "flt", "ver": "0",
"data": "0.41"
},
"low_coeff":{ "type": "flt", "ver": "0",
"data": "0.175"
},
"default_cover":{ "type": "flt", "ver": "0",
"data": "1200.0"
},
"default_uncover":{ "type": "flt", "ver": "0",
"data": "200.0"
},
"min_delta":{ "type": "flt", "ver": "0",
"data": "0.0"
}
},
".variable":{
"owner": "sns_stk3a5x",
"pLowTh":{ "type": "flt", "ver": "0",
"data": "400.0"
},
"pHighTh":{ "type": "flt", "ver": "0",
"data": "1000.0"
},
"WTime":{ "type": "int", "ver": "0",
"data": "127"
},
"high_coeff":{ "type": "flt", "ver": "0",
"data": "0.925"
},
"low_coeff":{ "type": "flt", "ver": "0",
"data": "0.4"
},
"pUseOilAlgo":{ "type": "int", "ver": "0",
"data": "0"
}
},
".algo":{
"owner": "sns_stk3a5x",
"SMUDGE_NT":{ "type": "int", "ver": "0",
"data": "200"
},
"SMUDGE_FT":{ "type": "int", "ver": "0",
"data": "200"
},
"SMUDGE_DIFF":{ "type": "int", "ver": "0",
"data": "10000"
}
}
}
},
"stk3a5x_0_private":{
"owner": "sns_stk3a5x",
".config":{
"owner": "sns_stk3a5x",
"wait":{ "type": "int", "ver": "0",
"data": "32"
},
"prst_ps":{ "type": "int", "ver": "0",
"data": "1"
},
"gain_ps":{ "type": "int", "ver": "0",
"data": "3"
},
"gain_ps_dx16":{ "type": "int", "ver": "0",
"data": "1"
},
"it_ps":{ "type": "int", "ver": "0",
"data": "2"
},
"irdr_led":{ "type": "int", "ver": "0",
"data": "8"
},
"prst_als":{ "type": "int", "ver": "0",
"data": "0"
},
"gain_als":{ "type": "int", "ver": "0",
"data": "3"
},
"gain_als_dx128":{ "type": "int", "ver": "0",
"data": "0"
},
"gain_c":{ "type": "int", "ver": "0",
"data": "3"
},
"gain_c_dx128":{ "type": "int", "ver": "0",
"data": "0"
},
"it_als":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps0":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps1":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps2":{ "type": "int", "ver": "0",
"data": "1"
},
"ps_ps3":{ "type": "int", "ver": "0",
"data": "1"
},
"pUseOilAlgo":{ "type": "int", "ver": "0",
"data": "1"
}
},
".als_coefficient":{
"owner": "sns_stk3a5x",
"als_offset":{ "type": "int", "ver": "0",
"data": "5"
},
"ratio_c":{ "type": "int", "ver": "0",
"data": "1"
},
"ratio_sun":{ "type": "int", "ver": "0",
"data": "30"
},
"ratio_d":{ "type": "int", "ver": "0",
"data": "70"
},
"ratio_a":{ "type": "int", "ver": "0",
"data": "135"
},
"ratio_h":{ "type": "int", "ver": "0",
"data": "210"
},
"window_c":{ "type": "flt", "ver": "0",
"data": "1.02"
},
"window_sun":{ "type": "flt", "ver": "0",
"data": "0.172"
},
"window_d":{ "type": "flt", "ver": "0",
"data": "0.114"
},
"window_a":{ "type": "flt", "ver": "0",
"data": "0.043"
},
"window_h":{ "type": "flt", "ver": "0",
"data": "0.0168"
},
"min_c_data":{ "type": "int", "ver": "0",
"data": "50"
},
"min_g_data":{ "type": "int", "ver": "0",
"data": "20"
},
"max_als_data":{ "type": "int", "ver": "0",
"data": "64000"
},
"min_als_data":{ "type": "int", "ver": "0",
"data": "1500"
},
"flag_opt":{ "type": "int", "ver": "0",
"data": "3"
}
}
}
}

Some files were not shown because too many files have changed in this diff Show more