2211 lines
38 KiB
Text
2211 lines
38 KiB
Text
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|
&tlmm {
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||
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_active: qupv3_se0_i2c_active {
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mux {
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pins = "gpio20", "gpio21";
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function = "qup0_se0";
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};
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config {
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pins = "gpio20", "gpio21";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
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mux {
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pins = "gpio20", "gpio21";
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function = "gpio";
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};
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config {
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pins = "gpio20", "gpio21";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se0_spi_pins: qupv3_se0_spi_pins {
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qupv3_se0_spi_active: qupv3_se0_spi_active {
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mux {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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function = "qup0_se0";
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};
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config {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
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mux {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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function = "gpio";
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};
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config {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
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qupv3_se1_i2c_active: qupv3_se1_i2c_active {
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mux {
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pins = "gpio24", "gpio25";
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function = "qup0_se1";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio24", "gpio25";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_spi_pins: qupv3_se1_spi_pins {
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qupv3_se1_spi_active: qupv3_se1_spi_active {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "qup0_se1";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
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qupv3_se2_i2c_active: qupv3_se2_i2c_active {
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mux {
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pins = "gpio36", "gpio37";
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function = "qup0_se2";
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};
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config {
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pins = "gpio36", "gpio37";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
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mux {
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pins = "gpio36", "gpio37";
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function = "gpio";
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};
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config {
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pins = "gpio36", "gpio37";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se2_spi_pins: qupv3_se2_spi_pins {
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qupv3_se2_spi_active: qupv3_se2_spi_active {
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mux {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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function = "qup0_se2";
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};
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config {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
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mux {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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function = "gpio";
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};
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config {
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||
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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drive-strength = <2>;
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||
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bias-disable;
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};
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};
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};
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qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
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qupv3_se3_i2c_active: qupv3_se3_i2c_active {
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mux {
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pins = "gpio28", "gpio29";
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function = "qup0_se3";
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};
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config {
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pins = "gpio28", "gpio29";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
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mux {
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pins = "gpio28", "gpio29";
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function = "gpio";
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};
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config {
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||
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pins = "gpio28", "gpio29";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se3_spi_pins: qupv3_se3_spi_pins {
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qupv3_se3_spi_active: qupv3_se3_spi_active {
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mux {
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pins = "gpio28", "gpio29",
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"gpio30", "gpio31";
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function = "qup0_se3";
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};
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config {
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||
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pins = "gpio28", "gpio29",
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"gpio30", "gpio31";
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||
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drive-strength = <6>;
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||
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bias-disable;
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||
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};
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};
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qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
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||
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mux {
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||
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pins = "gpio28", "gpio29",
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||
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"gpio30", "gpio31";
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function = "gpio";
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||
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};
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||
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||
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config {
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||
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pins = "gpio28", "gpio29",
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"gpio30", "gpio31";
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||
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drive-strength = <2>;
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||
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bias-disable;
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||
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};
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||
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};
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||
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};
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||
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||
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qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
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qupv3_se4_i2c_active: qupv3_se4_i2c_active {
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||
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mux {
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||
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pins = "gpio32", "gpio33";
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||
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function = "qup0_se4";
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||
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};
|
||
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||
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config {
|
||
|
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pins = "gpio32", "gpio33";
|
||
|
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drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
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};
|
||
|
|
};
|
||
|
|
|
||
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qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
|
||
|
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mux {
|
||
|
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pins = "gpio32", "gpio33";
|
||
|
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function = "gpio";
|
||
|
|
};
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||
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||
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config {
|
||
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pins = "gpio32", "gpio33";
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||
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drive-strength = <2>;
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||
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bias-disable;
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||
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};
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||
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|
};
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||
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};
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qupv3_se4_spi_pins: qupv3_se4_spi_pins {
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qupv3_se4_spi_active: qupv3_se4_spi_active {
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||
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mux {
|
||
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
|
||
|
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function = "qup0_se4";
|
||
|
|
};
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||
|
|
|
||
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config {
|
||
|
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pins = "gpio32", "gpio33",
|
||
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"gpio34", "gpio35";
|
||
|
|
drive-strength = <6>;
|
||
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bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
||
|
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mux {
|
||
|
|
pins = "gpio32", "gpio33",
|
||
|
|
"gpio34", "gpio35";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio32", "gpio33",
|
||
|
|
"gpio34", "gpio35";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
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|
||
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qupv3_se4_2uart_pins: qupv3_se4_2uart_pins {
|
||
|
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qupv3_se4_2uart_active: qupv3_se4_2uart_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio34", "gpio35";
|
||
|
|
function = "qup0_se4";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio34", "gpio35";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_2uart_sleep: qupv3_se4_2uart_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio34", "gpio35";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio34", "gpio35";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
|
||
|
|
qupv3_se5_i2c_active: qupv3_se5_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio36", "gpio37";
|
||
|
|
function = "qup0_se5";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio36", "gpio37";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio36", "gpio37";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio36", "gpio37";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
||
|
|
qupv3_se5_spi_active: qupv3_se5_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio36", "gpio37",
|
||
|
|
"gpio38", "gpio39";
|
||
|
|
function = "qup0_se5";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio36", "gpio37",
|
||
|
|
"gpio38", "gpio39";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio36", "gpio37",
|
||
|
|
"gpio38", "gpio39";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio36", "gpio37",
|
||
|
|
"gpio38", "gpio39";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_2uart_pins: qupv3_se5_2uart_pins {
|
||
|
|
qupv3_se5_2uart_active: qupv3_se5_2uart_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio38", "gpio39";
|
||
|
|
function = "qup0_se5";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio38", "gpio39";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_2uart_sleep: qupv3_se5_2uart_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio38", "gpio39";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio38", "gpio39";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
|
||
|
|
qupv3_se7_i2c_active: qupv3_se7_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio40", "gpio41";
|
||
|
|
function = "qup1_se0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio40", "gpio41";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio40", "gpio41";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio40", "gpio41";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_spi_pins: qupv3_se7_spi_pins {
|
||
|
|
qupv3_se7_spi_active: qupv3_se7_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio40", "gpio41",
|
||
|
|
"gpio42", "gpio43";
|
||
|
|
function = "qup1_se0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio40", "gpio41",
|
||
|
|
"gpio42", "gpio43";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio40", "gpio41",
|
||
|
|
"gpio42", "gpio43";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio40", "gpio41",
|
||
|
|
"gpio42", "gpio43";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
|
||
|
|
qupv3_se8_i2c_active: qupv3_se8_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio42", "gpio43";
|
||
|
|
function = "qup1_se1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio42", "gpio43";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio42", "gpio43";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio42", "gpio43";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_spi_pins: qupv3_se8_spi_pins {
|
||
|
|
qupv3_se8_spi_active: qupv3_se8_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio42", "gpio43",
|
||
|
|
"gpio40", "gpio41";
|
||
|
|
function = "qup1_se1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio42", "gpio43",
|
||
|
|
"gpio40", "gpio41";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio42", "gpio43",
|
||
|
|
"gpio40", "gpio41";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio42", "gpio43",
|
||
|
|
"gpio40", "gpio41";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
|
||
|
|
qupv3_se9_i2c_active: qupv3_se9_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio46", "gpio47";
|
||
|
|
function = "qup1_se2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio46", "gpio47";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio46", "gpio47";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio46", "gpio47";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
|
||
|
|
qupv3_se9_spi_active: qupv3_se9_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio46", "gpio47",
|
||
|
|
"gpio44", "gpio45";
|
||
|
|
function = "qup1_se2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio46", "gpio47",
|
||
|
|
"gpio44", "gpio45";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio46", "gpio47",
|
||
|
|
"gpio44", "gpio45";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio46", "gpio47",
|
||
|
|
"gpio44", "gpio45";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_2uart_pins: qupv3_se9_2uart_pins {
|
||
|
|
qupv3_se9_2uart_active: qupv3_se9_2uart_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
function = "qup1_se2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_2uart_sleep: qupv3_se9_2uart_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
|
||
|
|
qupv3_se10_i2c_active: qupv3_se10_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
function = "qup1_se3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_spi_pins: qupv3_se10_spi_pins {
|
||
|
|
qupv3_se10_spi_active: qupv3_se10_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44", "gpio45",
|
||
|
|
"gpio46", "gpio47";
|
||
|
|
function = "qup1_se3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44", "gpio45",
|
||
|
|
"gpio46", "gpio47";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44", "gpio45",
|
||
|
|
"gpio46", "gpio47";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44", "gpio45",
|
||
|
|
"gpio46", "gpio47";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_2uart_pins: qupv3_se10_2uart_pins {
|
||
|
|
qupv3_se10_2uart_active: qupv3_se10_2uart_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio46", "gpio47";
|
||
|
|
function = "qup1_se3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio46", "gpio47";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio46", "gpio47";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio46", "gpio47";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
|
||
|
|
qupv3_se11_i2c_active: qupv3_se11_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio48", "gpio49";
|
||
|
|
function = "qup1_se4";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio48", "gpio49";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio48", "gpio49";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio48", "gpio49";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_pins: qupv3_se11_spi_pins {
|
||
|
|
qupv3_se11_spi_active: qupv3_se11_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio48", "gpio49",
|
||
|
|
"gpio50", "gpio51";
|
||
|
|
function = "qup1_se4";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio48", "gpio49",
|
||
|
|
"gpio50", "gpio51";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio48", "gpio49",
|
||
|
|
"gpio50", "gpio51";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio48", "gpio49",
|
||
|
|
"gpio50", "gpio51";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
|
||
|
|
qupv3_se12_i2c_active: qupv3_se12_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio52", "gpio53";
|
||
|
|
function = "qup1_se5";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio52", "gpio53";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio52", "gpio53";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio52", "gpio53";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_pins: qupv3_se12_spi_pins {
|
||
|
|
qupv3_se12_spi_active: qupv3_se12_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio52", "gpio53",
|
||
|
|
"gpio54", "gpio55";
|
||
|
|
function = "qup1_se5";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio52", "gpio53",
|
||
|
|
"gpio54", "gpio55";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio52", "gpio53",
|
||
|
|
"gpio54", "gpio55";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio52", "gpio53",
|
||
|
|
"gpio54", "gpio55";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_2uart_pins: qupv3_se12_2uart_pins {
|
||
|
|
qupv3_se12_2uart_active: qupv3_se12_2uart_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio54", "gpio55";
|
||
|
|
function = "qup1_se5";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio54", "gpio55";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_2uart_sleep: qupv3_se12_2uart_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio54", "gpio55";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio54", "gpio55";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
|
||
|
|
qupv3_se13_i2c_active: qupv3_se13_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio56", "gpio57";
|
||
|
|
function = "qup1_se6";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio56", "gpio57";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio56", "gpio57";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio56", "gpio57";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
|
||
|
|
qupv3_se14_i2c_active: qupv3_se14_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio80", "gpio81";
|
||
|
|
function = "qup2_se0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio80", "gpio81";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio80", "gpio81";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio80", "gpio81";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_pins: qupv3_se14_spi_pins {
|
||
|
|
qupv3_se14_spi_active: qupv3_se14_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio80", "gpio81",
|
||
|
|
"gpio82", "gpio83";
|
||
|
|
function = "qup2_se0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio80", "gpio81",
|
||
|
|
"gpio82", "gpio83";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio80", "gpio81",
|
||
|
|
"gpio82", "gpio83";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio80", "gpio81",
|
||
|
|
"gpio82", "gpio83";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
|
||
|
|
qupv3_se15_i2c_active: qupv3_se15_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio84", "gpio85";
|
||
|
|
function = "qup2_se1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio84", "gpio85";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio84", "gpio85";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio84", "gpio85";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_pins: qupv3_se15_spi_pins {
|
||
|
|
qupv3_se15_spi_active: qupv3_se15_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio84", "gpio85",
|
||
|
|
"gpio99", "gpio100";
|
||
|
|
function = "qup2_se1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio84", "gpio85",
|
||
|
|
"gpio99", "gpio100";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio84", "gpio85",
|
||
|
|
"gpio99", "gpio100";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio84", "gpio85",
|
||
|
|
"gpio99", "gpio100";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se16_i2c_pins: qupv3_se16_i2c_pins {
|
||
|
|
qupv3_se16_i2c_active: qupv3_se16_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio86", "gpio87";
|
||
|
|
function = "qup2_se2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio86", "gpio87";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se16_i2c_sleep: qupv3_se16_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio86", "gpio87";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio86", "gpio87";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se16_spi_pins: qupv3_se16_spi_pins {
|
||
|
|
qupv3_se16_spi_active: qupv3_se16_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio86", "gpio87",
|
||
|
|
"gpio88", "gpio89";
|
||
|
|
function = "qup2_se2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio86", "gpio87",
|
||
|
|
"gpio88", "gpio89";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se16_spi_sleep: qupv3_se16_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio86", "gpio87",
|
||
|
|
"gpio88", "gpio89";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio86", "gpio87",
|
||
|
|
"gpio88", "gpio89";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_i2c_pins: qupv3_se17_i2c_pins {
|
||
|
|
qupv3_se17_i2c_active: qupv3_se17_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio91", "gpio92";
|
||
|
|
function = "qup2_se3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio91", "gpio92";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_i2c_sleep: qupv3_se17_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio91", "gpio92";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio91", "gpio92";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_spi_pins: qupv3_se17_spi_pins {
|
||
|
|
qupv3_se17_spi_active: qupv3_se17_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio91", "gpio92",
|
||
|
|
"gpio93", "gpio94";
|
||
|
|
function = "qup2_se3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio91", "gpio92",
|
||
|
|
"gpio93", "gpio94";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_spi_sleep: qupv3_se17_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio91", "gpio92",
|
||
|
|
"gpio93", "gpio94";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio91", "gpio92",
|
||
|
|
"gpio93", "gpio94";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_4uart_pins: qupv3_se17_4uart_pins {
|
||
|
|
qupv3_se17_default_cts: qupv3_se17_default_cts {
|
||
|
|
mux {
|
||
|
|
pins = "gpio91";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio91";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_default_rtsrx: qupv3_se17_default_rtsrx {
|
||
|
|
mux {
|
||
|
|
pins = "gpio92", "gpio94";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio92", "gpio94";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_default_tx: qupv3_se17_default_tx {
|
||
|
|
mux {
|
||
|
|
pins = "gpio93";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio93";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_ctsrx: qupv3_se17_ctsrx {
|
||
|
|
mux {
|
||
|
|
pins = "gpio91", "gpio94";
|
||
|
|
function = "qup2_se3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio91", "gpio94";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_rts: qupv3_se17_rts {
|
||
|
|
mux {
|
||
|
|
pins = "gpio92";
|
||
|
|
function = "qup2_se3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio92";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se17_tx: qupv3_se17_tx {
|
||
|
|
mux {
|
||
|
|
pins = "gpio93";
|
||
|
|
function = "qup2_se3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio93";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se18_i2c_pins: qupv3_se18_i2c_pins {
|
||
|
|
qupv3_se18_i2c_active: qupv3_se18_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio95", "gpio96";
|
||
|
|
function = "qup2_se4";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio95", "gpio96";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se18_i2c_sleep: qupv3_se18_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio95", "gpio96";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio95", "gpio96";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se18_spi_pins: qupv3_se18_spi_pins {
|
||
|
|
qupv3_se18_spi_active: qupv3_se18_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio95", "gpio96",
|
||
|
|
"gpio97", "gpio98";
|
||
|
|
function = "qup2_se4";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio95", "gpio96",
|
||
|
|
"gpio97", "gpio98";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se18_spi_sleep: qupv3_se18_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio95", "gpio96",
|
||
|
|
"gpio97", "gpio98";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio95", "gpio96",
|
||
|
|
"gpio97", "gpio98";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se19_i2c_pins: qupv3_se19_i2c_pins {
|
||
|
|
qupv3_se19_i2c_active: qupv3_se19_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio99", "gpio100";
|
||
|
|
function = "qup2_se5";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio99", "gpio100";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se19_i2c_sleep: qupv3_se19_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio99", "gpio100";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio99", "gpio100";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se19_spi_pins: qupv3_se19_spi_pins {
|
||
|
|
qupv3_se19_spi_active: qupv3_se19_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio99", "gpio100",
|
||
|
|
"gpio84", "gpio95";
|
||
|
|
function = "qup2_se5";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio99", "gpio100",
|
||
|
|
"gpio84", "gpio95";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se19_spi_sleep: qupv3_se19_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio99", "gpio100",
|
||
|
|
"gpio84", "gpio95";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio99", "gpio100",
|
||
|
|
"gpio84", "gpio95";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se20_i2c_pins: qupv3_se20_i2c_pins {
|
||
|
|
qupv3_se20_i2c_active: qupv3_se20_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio97", "gpio98";
|
||
|
|
function = "qup2_se6";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio97", "gpio98";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se20_i2c_sleep: qupv3_se20_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio97", "gpio98";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio97", "gpio98";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se20_spi_pins: qupv3_se20_spi_pins {
|
||
|
|
qupv3_se20_spi_active: qupv3_se20_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio97", "gpio98",
|
||
|
|
"gpio95", "gpio96";
|
||
|
|
function = "qup2_se6";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio97", "gpio98",
|
||
|
|
"gpio95", "gpio96";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se20_spi_sleep: qupv3_se20_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio97", "gpio98",
|
||
|
|
"gpio95", "gpio96";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio97", "gpio98",
|
||
|
|
"gpio95", "gpio96";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se21_i2c_pins: qupv3_se21_i2c_pins {
|
||
|
|
qupv3_se21_i2c_active: qupv3_se21_i2c_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio13", "gpio14";
|
||
|
|
function = "qup3_se0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio13", "gpio14";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se21_i2c_sleep: qupv3_se21_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio13", "gpio14";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio13", "gpio14";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se21_spi_pins: qupv3_se21_spi_pins {
|
||
|
|
qupv3_se21_spi_active: qupv3_se21_spi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio13", "gpio14",
|
||
|
|
"gpio15", "gpio16";
|
||
|
|
function = "qup3_se0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio13", "gpio14",
|
||
|
|
"gpio15", "gpio16";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se21_spi_sleep: qupv3_se21_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio13", "gpio14",
|
||
|
|
"gpio15", "gpio16";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio13", "gpio14",
|
||
|
|
"gpio15", "gpio16";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pcie0 {
|
||
|
|
pcie0_perst_default: pcie0_perst_default {
|
||
|
|
mux {
|
||
|
|
pins = "gpio2";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio2";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pcie0_clkreq_default: pcie0_clkreq_default {
|
||
|
|
mux {
|
||
|
|
pins = "gpio1";
|
||
|
|
function = "pcie0_clkreq";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio1";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pcie0_wake_default: pcie0_wake_default {
|
||
|
|
mux {
|
||
|
|
pins = "gpio0";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio0";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pcie0_clkreq_sleep: pcie0_clkreq_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio1";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio1";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pcie1 {
|
||
|
|
pcie1_perst_default: pcie1_perst_default {
|
||
|
|
mux {
|
||
|
|
pins = "gpio4";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio4";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pcie1_clkreq_default: pcie1_clkreq_default {
|
||
|
|
mux {
|
||
|
|
pins = "gpio3";
|
||
|
|
function = "pcie1_clkreq";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio3";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pcie1_wake_default: pcie1_wake_default {
|
||
|
|
mux {
|
||
|
|
pins = "gpio5";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio5";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pcie1_clkreq_sleep: pcie1_clkreq_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio3";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio3";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sec_tdm_sck {
|
||
|
|
sec_tdm_sck_sleep: sec_tdm_sck_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio106";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio106";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sec_tdm_sck_active: sec_tdm_sck_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio106";
|
||
|
|
function = "mi2s1_sck";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio106";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sec_tdm_ws {
|
||
|
|
sec_tdm_ws_sleep: sec_tdm_ws_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio107";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio107";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sec_tdm_ws_active: sec_tdm_ws_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio107";
|
||
|
|
function = "mi2s1_ws";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio107";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sec_tdm_din {
|
||
|
|
sec_tdm_din_sleep: sec_tdm_din_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio108";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio108";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sec_tdm_din_active: sec_tdm_din_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio108";
|
||
|
|
function = "mi2s1_data0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio108";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sec_tdm_dout {
|
||
|
|
sec_tdm_dout_sleep: sec_tdm_dout_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio109";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio109";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sec_tdm_dout_active: sec_tdm_dout_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio109";
|
||
|
|
function = "mi2s1_data1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio109";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tert_tdm_sck {
|
||
|
|
tert_tdm_sck_sleep: tert_tdm_sck_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio110";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio110";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tert_tdm_sck_active: tert_tdm_sck_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio110";
|
||
|
|
function = "mi2s2_sck";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio110";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tert_tdm_ws {
|
||
|
|
tert_tdm_ws_sleep: tert_tdm_ws_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio111";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio111";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tert_tdm_ws_active: tert_tdm_ws_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio111";
|
||
|
|
function = "mi2s2_ws";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio111";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tert_tdm_din {
|
||
|
|
tert_tdm_din_sleep: tert_tdm_din_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio112";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio112";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tert_tdm_din_active: tert_tdm_din_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio112";
|
||
|
|
function = "mi2s2_data0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio112";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tert_tdm_dout {
|
||
|
|
tert_tdm_dout_sleep: tert_tdm_dout_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio113";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio113";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tert_tdm_dout_active: tert_tdm_dout_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio113";
|
||
|
|
function = "mi2s2_data1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio113";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs0_i2s_sck {
|
||
|
|
hs0_i2s_sck_sleep: hs0_i2s_sck_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio114";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio114";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs0_i2s_sck_active: hs0_i2s_sck_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio114";
|
||
|
|
function = "hs0_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio114";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs0_i2s_ws {
|
||
|
|
hs0_i2s_ws_sleep: hs0_i2s_ws_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio115";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio115";
|
||
|
|
drive-strength = <2>; /* 8 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs0_i2s_ws_active: hs0_i2s_ws_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio115";
|
||
|
|
function = "hs0_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio115";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs0_i2s_data0 {
|
||
|
|
hs0_i2s_data0_sleep: hs0_i2s_data0_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio116";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio116";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs0_i2s_data0_active: hs0_i2s_data0_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio116";
|
||
|
|
function = "hs0_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio116";
|
||
|
|
drive-strength = <8>; /* 2 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs0_i2s_data1 {
|
||
|
|
hs0_i2s_data1_sleep: hs0_i2s_data1_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio117";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio117";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs0_i2s_data1_active: hs0_i2s_data1_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio117";
|
||
|
|
function = "hs0_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio117";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs1_i2s_sck {
|
||
|
|
hs1_i2s_sck_sleep: hs1_i2s_sck_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio118";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio118";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs1_i2s_sck_active: hs1_i2s_sck_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio118";
|
||
|
|
function = "hs1_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio118";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs1_i2s_ws {
|
||
|
|
hs1_i2s_ws_sleep: hs1_i2s_ws_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio119";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio119";
|
||
|
|
drive-strength = <2>; /* 8 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs1_i2s_ws_active: hs1_i2s_ws_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio119";
|
||
|
|
function = "hs1_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio119";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs1_i2s_data0 {
|
||
|
|
hs1_i2s_data0_sleep: hs1_i2s_data0_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio120";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio120";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs1_i2s_data0_active: hs1_i2s_data0_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio120";
|
||
|
|
function = "hs1_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio120";
|
||
|
|
drive-strength = <8>; /* 2 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs1_i2s_data1 {
|
||
|
|
hs1_i2s_data1_sleep: hs1_i2s_data1_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio121";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio121";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs1_i2s_data1_active: hs1_i2s_data1_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio121";
|
||
|
|
function = "hs1_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio121";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs2_i2s_sck {
|
||
|
|
hs2_i2s_sck_sleep: hs2_i2s_sck_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio122";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio122";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs2_i2s_sck_active: hs2_i2s_sck_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio122";
|
||
|
|
function = "hs2_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio122";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs2_i2s_ws {
|
||
|
|
hs2_i2s_ws_sleep: hs2_i2s_ws_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio123";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio123";
|
||
|
|
drive-strength = <2>; /* 8 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs2_i2s_ws_active: hs2_i2s_ws_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio123";
|
||
|
|
function = "hs2_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio123";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs2_i2s_data0 {
|
||
|
|
hs2_i2s_data0_sleep: hs2_i2s_data0_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio124";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio124";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs2_i2s_data0_active: hs2_i2s_data0_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio124";
|
||
|
|
function = "hs2_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio124";
|
||
|
|
drive-strength = <8>; /* 2 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs2_i2s_data1 {
|
||
|
|
hs2_i2s_data1_sleep: hs2_i2s_data1_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio125";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio125";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hs2_i2s_data1_active: hs2_i2s_data1_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio125";
|
||
|
|
function = "hs2_mi2s";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio125";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
audio_internal_mclk1 {
|
||
|
|
audio_internal_mclk1_sleep: audio_internal_mclk1_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio105";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio105";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
audio_internal_mclk1_active: audio_internal_mclk1_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio105";
|
||
|
|
function = "mi2s_mclk0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio105";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
emac {
|
||
|
|
emac_mdc: emac_mdc {
|
||
|
|
mux {
|
||
|
|
pins = "gpio8";
|
||
|
|
function = "emac0_mdc";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio8";
|
||
|
|
bias-pull-up;
|
||
|
|
drive-strength = <16>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
emac_mdio: emac_mdio {
|
||
|
|
mux {
|
||
|
|
pins = "gpio9";
|
||
|
|
function = "emac0_mdio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio9";
|
||
|
|
bias-pull-up;
|
||
|
|
drive-strength = <16>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|