47 lines
1 KiB
Text
47 lines
1 KiB
Text
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#include <dt-bindings/clock/qcom,gcc-sdxbaagha.h>
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&soc {
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usb0: hsusb@a600000 {
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compatible = "qcom,dwc-usb3-msm";
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reg = <0xa600000 0x100000>;
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reg-names = "core_base";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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USB3_GDSC-supply = <&gcc_usb20_gdsc>;
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clocks = <&gcc GCC_USB20_MASTER_CLK>,
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<&gcc GCC_SYS_NOC_USB_SF_AXI_CLK>,
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<&gcc GCC_USB20_SLEEP_CLK>,
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<&gcc GCC_USB20_MOCK_UTMI_CLK>;
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clock-names = "core_clk", "iface_clk", "sleep_clk", "utmi_clk";
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resets = <&gcc GCC_USB20_BCR>;
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reset-names = "core_reset";
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pwr_event_irq";
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qcom,core-clk-rate = <60000000>;
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dwc3@a600000 {
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compatible = "snps,dwc3";
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reg = <0xa600000 0xd93c>;
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interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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snps,disable-clk-gating;
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snps,has-lpm-erratum;
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snps,hird-threshold = /bits/ 8 <0x0>;
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snps,is-utmi-l1-suspend;
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snps,dis-u1-entry-quirk;
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snps,dis-u2-entry-quirk;
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maximum-speed = "high-speed";
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dr_mode = "otg";
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usb-role-switch;
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};
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};
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};
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