39 lines
1.1 KiB
C
39 lines
1.1 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_LEMANS_H
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#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_LEMANS_H
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/* VIDEO_CC clocks */
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#define VIDEO_PLL0 0
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#define VIDEO_PLL1 1
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#define VIDEO_CC_AHB_CLK 2
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#define VIDEO_CC_AHB_CLK_SRC 3
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#define VIDEO_CC_MVS0_CLK 4
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#define VIDEO_CC_MVS0_CLK_SRC 5
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#define VIDEO_CC_MVS0_DIV_CLK_SRC 6
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#define VIDEO_CC_MVS0C_CLK 7
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#define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC 8
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#define VIDEO_CC_MVS1_CLK 9
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#define VIDEO_CC_MVS1_CLK_SRC 10
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#define VIDEO_CC_MVS1_DIV_CLK_SRC 11
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#define VIDEO_CC_MVS1C_CLK 12
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#define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC 13
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#define VIDEO_CC_SLEEP_CLK 14
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#define VIDEO_CC_SLEEP_CLK_SRC 15
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#define VIDEO_CC_XO_CLK 16
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#define VIDEO_CC_XO_CLK_SRC 17
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/* VIDEO_CC resets */
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#define CVP_VIDEO_CC_INTERFACE_BCR 0
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#define CVP_VIDEO_CC_MVS0_BCR 1
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#define CVP_VIDEO_CC_MVS0C_BCR 2
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#define CVP_VIDEO_CC_MVS1_BCR 3
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#define CVP_VIDEO_CC_MVS1C_BCR 4
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#define VIDEO_CC_MVS0C_CLK_ARES 5
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#define VIDEO_CC_MVS1C_CLK_ARES 6
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#endif
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