2062 lines
33 KiB
Text
2062 lines
33 KiB
Text
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&tlmm {
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qupv3_se7_2uart_pins: qupv3_se7_2uart_pins {
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qupv3_se7_2uart_tx_active: qupv3_se7_2uart_tx_active {
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mux {
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pins = "gpio134";
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function = "qup0_se7_l2";
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};
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config {
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pins = "gpio134";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se7_2uart_rx_active: qupv3_se7_2uart_rx_active {
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mux {
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pins = "gpio135";
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function = "qup0_se7_l3";
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};
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config {
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pins = "gpio135";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se7_2uart_sleep: qupv3_se7_2uart_sleep {
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mux {
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pins = "gpio134", "gpio135";
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function = "gpio";
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};
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config {
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pins = "gpio134", "gpio135";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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tsc_etu_pps_pins: tsc_etu_tod_pps_pins {
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etu_tod_pps_active: etu_tod_pps_active {
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mux {
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pins = "gpio48";
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function = "tod_pps_in";
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};
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config {
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pins = "gpio48";
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drive-strength= <2>;
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bias-disable;
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};
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};
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etu_gps_pps_active: etu_gps_pps_active {
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mux {
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pins = "gpio49";
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function = "gps_pps_in";
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};
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config {
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pins = "gpio49";
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drive-strength= <2>;
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bias-disable;
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};
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};
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etu_pps_sleep: etu_pps_sleep {
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mux {
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pins = "gpio48", "gpio49";
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function = "gpio";
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};
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config {
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pins = "gpio48", "gpio49";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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sdc1_on: sdc1_on {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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rclk {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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};
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sdc1_off: sdc1_off {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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rclk {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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};
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pcie_ep {
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pcie_ep_clkreq_default: pcie_ep_clkreq_default {
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mux {
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pins = "gpio99";
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function = "pcie_clkreq";
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};
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config {
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pins = "gpio99";
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drive-strength = <2>;
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bias-disable;
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};
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};
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pcie_ep_perst_default: pcie_ep_perst_default {
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mux {
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pins = "gpio98";
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function = "gpio";
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};
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config {
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pins = "gpio98";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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pcie_ep_wake_default: pcie_ep_wake_default {
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mux {
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pins = "gpio100";
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function = "gpio";
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};
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config {
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pins = "gpio100";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se0_4uart_pins: qupv3_se0_4uart_pins {
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qupv3_se0_default_cts: qupv3_se0_default_cts {
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mux {
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pins = "gpio6";
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function = "gpio";
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};
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config {
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pins = "gpio6";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se0_default_rts: qupv3_se0_default_rts {
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mux {
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pins = "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio7";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se0_default_tx: qupv3_se0_default_tx {
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mux {
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pins = "gpio8";
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function = "gpio";
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};
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config {
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pins = "gpio8";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_default_rx: qupv3_se0_default_rx {
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mux {
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pins = "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio9";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se0_cts: qupv3_se0_cts {
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mux {
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pins = "gpio6";
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function = "qup0_se0_l0";
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};
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config {
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pins = "gpio6";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se0_rts: qupv3_se0_rts {
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mux {
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pins = "gpio7";
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function = "qup0_se0_l1";
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};
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config {
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pins = "gpio7";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se0_tx: qupv3_se0_tx {
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mux {
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pins = "gpio8";
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function = "qup0_se0_l2";
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};
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config {
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pins = "gpio8";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_rx: qupv3_se0_rx {
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mux {
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pins = "gpio9";
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function = "qup0_se0_l3";
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};
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config {
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pins = "gpio9";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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qupv3_se8_4uart_pins: qupv3_se8_4uart_pins {
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qupv3_se8_default_cts: qupv3_se8_default_cts {
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mux {
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pins = "gpio18";
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function = "gpio";
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};
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config {
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pins = "gpio18";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se8_default_rts: qupv3_se8_default_rts {
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mux {
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pins = "gpio19";
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function = "gpio";
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};
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config {
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pins = "gpio19";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se8_default_tx: qupv3_se8_default_tx {
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mux {
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pins = "gpio20";
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function = "gpio";
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};
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config {
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pins = "gpio20";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se8_default_rx: qupv3_se8_default_rx {
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mux {
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pins = "gpio21";
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function = "gpio";
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};
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config {
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pins = "gpio21";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se8_cts: qupv3_se8_cts {
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mux {
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pins = "gpio18";
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function = "qup1_se0_l0";
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};
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config {
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pins = "gpio18";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se8_rts: qupv3_se8_rts {
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mux {
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pins = "gpio19";
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function = "qup1_se0_l1";
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};
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config {
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pins = "gpio19";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se8_tx: qupv3_se8_tx {
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mux {
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pins = "gpio20";
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function = "qup1_se0_l2";
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};
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config {
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pins = "gpio20";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se8_rx: qupv3_se8_rx {
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mux {
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pins = "gpio21";
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function = "qup1_se0_l3";
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};
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config {
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pins = "gpio21";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
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qupv3_se8_i2c_sda_active: qupv3_se8_i2c_sda_active {
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mux {
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||
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pins = "gpio18";
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function = "qup1_se0_l0";
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};
|
||
|
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|
||
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config {
|
||
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pins = "gpio18";
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||
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drive-strength = <2>;
|
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bias-pull-up;
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||
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};
|
||
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};
|
||
|
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|
||
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qupv3_se8_i2c_scl_active: qupv3_se8_i2c_scl_active {
|
||
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mux {
|
||
|
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pins = "gpio19";
|
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function = "qup1_se0_l1";
|
||
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};
|
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|
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|
||
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config {
|
||
|
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pins = "gpio19";
|
||
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drive-strength = <2>;
|
||
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bias-pull-up;
|
||
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};
|
||
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};
|
||
|
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|
||
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qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
|
||
|
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mux {
|
||
|
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pins = "gpio18", "gpio19";
|
||
|
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function = "gpio";
|
||
|
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};
|
||
|
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|
||
|
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config {
|
||
|
|
pins = "gpio18", "gpio19";
|
||
|
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drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
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};
|
||
|
|
};
|
||
|
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};
|
||
|
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|
||
|
|
qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
|
||
|
|
qupv3_se1_i2c_sda_active: qupv3_se1_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio10";
|
||
|
|
function = "qup0_se1_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio10";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se1_i2c_scl_active: qupv3_se1_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio11";
|
||
|
|
function = "qup0_se1_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio11";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio10", "gpio11";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio10", "gpio11";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se1_spi_pins: qupv3_se1_spi_pins {
|
||
|
|
qupv3_se1_spi_miso_active: qupv3_se1_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio10";
|
||
|
|
function = "qup0_se1_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio10";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se1_spi_mosi_active: qupv3_se1_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio11";
|
||
|
|
function = "qup0_se1_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio11";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se1_spi_clk_active: qupv3_se1_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio12";
|
||
|
|
function = "qup0_se1_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio12";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se1_spi_cs_active: qupv3_se1_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio13";
|
||
|
|
function = "qup0_se1_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio13";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio10", "gpio11",
|
||
|
|
"gpio12", "gpio13";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio10", "gpio11",
|
||
|
|
"gpio12", "gpio13";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
|
||
|
|
qupv3_se2_i2c_sda_active: qupv3_se2_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio12";
|
||
|
|
function = "qup0_se2_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio12";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_i2c_scl_active: qupv3_se2_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio13";
|
||
|
|
function = "qup0_se2_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio13";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio12", "gpio13";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio12", "gpio13";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_pins: qupv3_se2_spi_pins {
|
||
|
|
qupv3_se2_spi_miso_active: qupv3_se2_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio12";
|
||
|
|
function = "qup0_se2_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio12";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_mosi_active: qupv3_se2_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio13";
|
||
|
|
function = "qup0_se2_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio13";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_clk_active: qupv3_se2_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio10";
|
||
|
|
function = "qup0_se2_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio10";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_cs_active: qupv3_se2_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio11";
|
||
|
|
function = "qup0_se2_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio11";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio12", "gpio13",
|
||
|
|
"gpio10", "gpio11";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio12", "gpio13",
|
||
|
|
"gpio10", "gpio11";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
|
||
|
|
qupv3_se3_i2c_sda_active: qupv3_se3_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio14";
|
||
|
|
function = "qup0_se3_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio14";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_i2c_scl_active: qupv3_se3_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio15";
|
||
|
|
function = "qup0_se3_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio15";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio14", "gpio15";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio14", "gpio15";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_pins: qupv3_se3_spi_pins {
|
||
|
|
qupv3_se3_spi_miso_active: qupv3_se3_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio14";
|
||
|
|
function = "qup0_se3_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio14";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_mosi_active: qupv3_se3_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio15";
|
||
|
|
function = "qup0_se3_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio15";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_clk_active: qupv3_se3_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio16";
|
||
|
|
function = "qup0_se3_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio16";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_cs_active: qupv3_se3_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio17";
|
||
|
|
function = "qup0_se3_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio17";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio14", "gpio15",
|
||
|
|
"gpio16", "gpio17";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio14", "gpio15",
|
||
|
|
"gpio16", "gpio17";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
|
||
|
|
qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio16";
|
||
|
|
function = "qup0_se4_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio16";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio17";
|
||
|
|
function = "qup0_se4_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio17";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio16", "gpio17";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio16", "gpio17";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_pins: qupv3_se4_spi_pins {
|
||
|
|
qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio16";
|
||
|
|
function = "qup0_se4_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio16";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio17";
|
||
|
|
function = "qup0_se4_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio17";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_clk_active: qupv3_se4_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio14";
|
||
|
|
function = "qup0_se4_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio14";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_cs_active: qupv3_se4_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio15";
|
||
|
|
function = "qup0_se4_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio15";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio16", "gpio17",
|
||
|
|
"gpio14", "gpio15";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio16", "gpio17",
|
||
|
|
"gpio14", "gpio15";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
|
||
|
|
qupv3_se5_i2c_sda_active: qupv3_se5_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio130";
|
||
|
|
function = "qup0_se5_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio130";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_i2c_scl_active: qupv3_se5_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio131";
|
||
|
|
function = "qup0_se5_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio131";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio130", "gpio131";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio130", "gpio131";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
||
|
|
qupv3_se5_spi_miso_active: qupv3_se5_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio130";
|
||
|
|
function = "qup0_se5_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio130";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_spi_mosi_active: qupv3_se5_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio131";
|
||
|
|
function = "qup0_se5_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio131";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_spi_clk_active: qupv3_se5_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio132";
|
||
|
|
function = "qup1_se5_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio132";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_spi_cs_active: qupv3_se5_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio133";
|
||
|
|
function = "qup0_se5_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio133";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio130", "gpio131",
|
||
|
|
"gpio132", "gpio133";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio130", "gpio131",
|
||
|
|
"gpio132", "gpio133";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
|
||
|
|
qupv3_se6_i2c_sda_active: qupv3_se6_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio132";
|
||
|
|
function = "qup0_se6_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio132";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_i2c_scl_active: qupv3_se6_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio133";
|
||
|
|
function = "qup0_se6_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio133";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio132", "gpio133";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio132", "gpio133";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
||
|
|
qupv3_se6_spi_miso_active: qupv3_se6_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio132";
|
||
|
|
function = "qup0_se6_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio132";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_mosi_active: qupv3_se6_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio133";
|
||
|
|
function = "qup0_se6_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio133";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_clk_active: qupv3_se6_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio130";
|
||
|
|
function = "qup0_se6_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio130";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_cs_active: qupv3_se6_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio131";
|
||
|
|
function = "qup0_se6_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio131";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio132", "gpio133",
|
||
|
|
"gpio130", "gpio131";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio132", "gpio133",
|
||
|
|
"gpio130", "gpio131";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
|
||
|
|
qupv3_se9_i2c_sda_active: qupv3_se9_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio22";
|
||
|
|
function = "qup1_se1_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio22";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_i2c_scl_active: qupv3_se9_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio23";
|
||
|
|
function = "qup1_se1_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio23";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio22", "gpio23";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio22", "gpio23";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
|
||
|
|
qupv3_se9_spi_miso_active: qupv3_se9_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio22";
|
||
|
|
function = "qup1_se1_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio22";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_mosi_active: qupv3_se9_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio23";
|
||
|
|
function = "qup1_se1_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio23";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_clk_active: qupv3_se9_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio24";
|
||
|
|
function = "qup1_se1_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio24";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_cs_active: qupv3_se9_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio25";
|
||
|
|
function = "qup1_se1_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio25";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio22", "gpio23",
|
||
|
|
"gpio24", "gpio25";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio22", "gpio23",
|
||
|
|
"gpio24", "gpio25";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
|
||
|
|
qupv3_se10_i2c_sda_active: qupv3_se10_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio24";
|
||
|
|
function = "qup1_se2_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio24";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_i2c_scl_active: qupv3_se10_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio25";
|
||
|
|
function = "qup1_se2_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio25";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio24", "gpio25";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio24", "gpio25";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_spi_pins: qupv3_se10_spi_pins {
|
||
|
|
qupv3_se10_spi_miso_active: qupv3_se10_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio24";
|
||
|
|
function = "qup1_se2_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio24";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_spi_mosi_active: qupv3_se10_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio25";
|
||
|
|
function = "qup1_se2_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio25";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_spi_clk_active: qupv3_se10_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio22";
|
||
|
|
function = "qup1_se2_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio22";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_spi_cs_active: qupv3_se10_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio23";
|
||
|
|
function = "qup1_se1_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio23";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio24", "gpio25",
|
||
|
|
"gpio22", "gpio23";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio24", "gpio25",
|
||
|
|
"gpio22", "gpio23";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
|
||
|
|
qupv3_se11_i2c_sda_active: qupv3_se11_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio26";
|
||
|
|
function = "qup1_se3_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio26";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_i2c_scl_active: qupv3_se11_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio27";
|
||
|
|
function = "qup1_se3_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio27";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio26", "gpio27";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio26", "gpio27";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_pins: qupv3_se11_spi_pins {
|
||
|
|
qupv3_se11_spi_miso_active: qupv3_se11_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio26";
|
||
|
|
function = "qup1_se3_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio26";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_mosi_active: qupv3_se11_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio27";
|
||
|
|
function = "qup1_se3_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio27";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_clk_active: qupv3_se11_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28";
|
||
|
|
function = "qup1_se3_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_cs_active: qupv3_se11_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio29";
|
||
|
|
function = "qup1_se3_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio29";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio26", "gpio27",
|
||
|
|
"gpio28", "gpio29";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio26", "gpio27",
|
||
|
|
"gpio28", "gpio29";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
|
||
|
|
qupv3_se12_i2c_sda_active: qupv3_se12_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28";
|
||
|
|
function = "qup1_se4_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_i2c_scl_active: qupv3_se12_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio29";
|
||
|
|
function = "qup1_se4_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio29";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28", "gpio29";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28", "gpio29";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_pins: qupv3_se12_spi_pins {
|
||
|
|
qupv3_se12_spi_miso_active: qupv3_se12_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28";
|
||
|
|
function = "qup1_se4_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_mosi_active: qupv3_se12_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio29";
|
||
|
|
function = "qup1_se4_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio29";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_clk_active: qupv3_se12_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio26";
|
||
|
|
function = "qup1_se4_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio26";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_cs_active: qupv3_se12_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio27";
|
||
|
|
function = "qup1_se4_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio27";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28", "gpio29",
|
||
|
|
"gpio26", "gpio27";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28", "gpio29",
|
||
|
|
"gpio26", "gpio27";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
|
||
|
|
qupv3_se13_i2c_sda_active: qupv3_se13_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio30";
|
||
|
|
function = "qup1_se5_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio30";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_i2c_scl_active: qupv3_se13_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio31";
|
||
|
|
function = "qup1_se5_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio31";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio30", "gpio31";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio30", "gpio31";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_pins: qupv3_se13_spi_pins {
|
||
|
|
qupv3_se13_spi_miso_active: qupv3_se13_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio30";
|
||
|
|
function = "qup1_se5_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio30";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_mosi_active: qupv3_se13_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio31";
|
||
|
|
function = "qup1_se5_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio31";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_clk_active: qupv3_se13_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio32";
|
||
|
|
function = "qup1_se5_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio32";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_cs_active: qupv3_se13_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio33";
|
||
|
|
function = "qup1_se5_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio33";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio30", "gpio31",
|
||
|
|
"gpio32", "gpio33";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio30", "gpio31",
|
||
|
|
"gpio32", "gpio33";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_4uart_pins: qupv3_se13_4uart_pins {
|
||
|
|
qupv3_se13_default_cts: qupv3_se13_default_cts {
|
||
|
|
mux {
|
||
|
|
pins = "gpio30";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio30";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_default_rts: qupv3_se13_default_rts {
|
||
|
|
mux {
|
||
|
|
pins = "gpio31";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio31";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_default_tx: qupv3_se13_default_tx {
|
||
|
|
mux {
|
||
|
|
pins = "gpio32";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio32";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_default_rx: qupv3_se13_default_rx {
|
||
|
|
mux {
|
||
|
|
pins = "gpio33";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio33";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_cts: qupv3_se13_cts {
|
||
|
|
mux {
|
||
|
|
pins = "gpio30";
|
||
|
|
function = "qup1_se5_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio30";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_rts: qupv3_se13_rts {
|
||
|
|
mux {
|
||
|
|
pins = "gpio31";
|
||
|
|
function = "qup1_se5_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio31";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_tx: qupv3_se13_tx {
|
||
|
|
mux {
|
||
|
|
pins = "gpio32";
|
||
|
|
function = "qup1_se5_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio32";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_rx: qupv3_se13_rx {
|
||
|
|
mux {
|
||
|
|
pins = "gpio33";
|
||
|
|
function = "qup1_se5_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio33";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
|
||
|
|
qupv3_se14_i2c_sda_active: qupv3_se14_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio34";
|
||
|
|
function = "qup1_se6_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio34";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_i2c_scl_active: qupv3_se14_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio35";
|
||
|
|
function = "qup1_se6_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio35";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio34", "gpio35";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio34", "gpio35";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_pins: qupv3_se14_spi_pins {
|
||
|
|
qupv3_se14_spi_miso_active: qupv3_se14_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio34";
|
||
|
|
function = "qup1_se6_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio34";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_mosi_active: qupv3_se14_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio35";
|
||
|
|
function = "qup1_se6_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio35";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_clk_active: qupv3_se14_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio36";
|
||
|
|
function = "qup1_se6_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio36";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_cs_0_active: qupv3_se14_spi_cs_0_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio37";
|
||
|
|
function = "qup1_se6_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio37";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_cs_1_active: qupv3_se14_spi_cs_1_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio38";
|
||
|
|
function = "qup1_se6_l4";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio38";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio34", "gpio35", "gpio36",
|
||
|
|
"gpio37", "gpio38";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio34", "gpio35", "gpio36",
|
||
|
|
"gpio37", "gpio38";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
|
||
|
|
qupv3_se15_i2c_sda_active: qupv3_se15_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio40";
|
||
|
|
function = "qup1_se7_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio40";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_i2c_scl_active: qupv3_se15_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio41";
|
||
|
|
function = "qup1_se7_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio41";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio40", "gpio41";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio40", "gpio41";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_pins: qupv3_se15_spi_pins {
|
||
|
|
qupv3_se15_spi_miso_active: qupv3_se15_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio40";
|
||
|
|
function = "qup1_se7_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio40";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_mosi_active: qupv3_se15_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio41";
|
||
|
|
function = "qup1_se7_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio41";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_clk_active: qupv3_se15_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio30";
|
||
|
|
function = "qup1_se7_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio30";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_cs_active: qupv3_se15_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio31";
|
||
|
|
function = "qup1_se7_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio31";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio40", "gpio41",
|
||
|
|
"gpio30", "gpio31";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio40", "gpio41",
|
||
|
|
"gpio30", "gpio31";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
usb_id_det_default: usb_id_det_default {
|
||
|
|
mux {
|
||
|
|
pins = "gpio42";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio42";
|
||
|
|
input-enable;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
usb_vbus_boost_default: usb_vbus_boost_default {
|
||
|
|
mux {
|
||
|
|
pins = "gpio43";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio43";
|
||
|
|
output-low;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
aw_phy_ldo16_default_pins: aw_phy_ldo16_default_pins {
|
||
|
|
aw_phy_ldo16_default_active: aw_phy_ldo16_default_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio46";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio46";
|
||
|
|
input-enable;
|
||
|
|
drive-strength = <16>;
|
||
|
|
output-high;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c_slave_pins: i2c_slave_pins {
|
||
|
|
i2c_slave_sda_active: i2c_slave_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio132";
|
||
|
|
function = "smb_dat";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio132";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c_slave_scl_active: i2c_slave_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio133";
|
||
|
|
function = "smb_clk";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio133";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c_slave_sleep: i2c_slave_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio132", "gpio133";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio132", "gpio133";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|