2006 lines
32 KiB
Text
2006 lines
32 KiB
Text
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&soc {
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tlmm: pinctrl@f000000 {
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compatible = "qcom,crow-pinctrl";
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reg = <0x0F000000 0x1000000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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qcom,gpios-reserved = <24 25 26 27 111 112>;
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wakeup-parent = <&pdc>;
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sdc2_on: sdc2_on {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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sd-cd {
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pins = "gpio9";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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sdc2_off: sdc2_off {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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sd-cd {
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pins = "gpio9";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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};
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};
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&tlmm {
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qupv3_se5_2uart_pins: qupv3_se5_2uart_pins {
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qupv3_se5_2uart_tx_active: qupv3_se5_2uart_tx_active {
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mux {
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pins = "gpio22";
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function = "qup0_se5_l2";
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};
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config {
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pins = "gpio22";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se5_2uart_rx_active: qupv3_se5_2uart_rx_active {
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mux {
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pins = "gpio23";
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function = "qup0_se5_l3";
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};
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config {
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pins = "gpio23";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se5_2uart_sleep: qupv3_se5_2uart_sleep {
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mux {
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pins = "gpio22", "gpio23";
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function = "gpio";
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};
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config {
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pins = "gpio22", "gpio23";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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qupv3_se10_4uart_pins: qupv3_se10_4uart_pins {
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qupv3_se10_default_cts: qupv3_se10_default_cts {
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mux {
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pins = "gpio40";
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function = "gpio";
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};
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config {
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pins = "gpio40";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se10_default_rts: qupv3_se10_default_rts {
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mux {
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pins = "gpio41";
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function = "gpio";
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};
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config {
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pins = "gpio41";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se10_default_tx: qupv3_se10_default_tx {
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mux {
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pins = "gpio42";
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function = "gpio";
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};
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config {
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pins = "gpio42";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se10_default_rx: qupv3_se10_default_rx {
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mux {
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pins = "gpio43";
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function = "gpio";
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};
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config {
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pins = "gpio43";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se10_cts: qupv3_se10_cts {
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mux {
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pins = "gpio40";
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function = "qup1_se2_l0";
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};
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config {
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pins = "gpio40";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se10_rts: qupv3_se10_rts {
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mux {
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pins = "gpio41";
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function = "qup1_se2_l1";
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};
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config {
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pins = "gpio41";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se10_tx: qupv3_se10_tx {
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mux {
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pins = "gpio42";
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function = "qup1_se2_l2";
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};
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config {
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pins = "gpio42";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se10_rx: qupv3_se10_rx {
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mux {
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pins = "gpio43";
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function = "qup1_se2_l3";
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};
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config {
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pins = "gpio43";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_sda_active: qupv3_se0_i2c_sda_active {
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mux {
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pins = "gpio0";
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function = "qup0_se0_l0";
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};
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config {
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pins = "gpio0";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_i2c_scl_active: qupv3_se0_i2c_scl_active {
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mux {
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pins = "gpio1";
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function = "qup0_se0_l1 ";
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};
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config {
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pins = "gpio1";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se0_spi_pins: qupv3_se0_spi_pins {
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qupv3_se0_spi_miso_active: qupv3_se0_spi_miso_active {
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mux {
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pins = "gpio0";
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function = "qup0_se0_l0";
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};
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config {
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pins = "gpio0";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_mosi_active: qupv3_se0_spi_mosi_active {
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mux {
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pins = "gpio1";
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function = "qup0_se0_l1";
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};
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config {
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pins = "gpio1";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_clk_active: qupv3_se0_spi_clk_active {
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mux {
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pins = "gpio2";
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function = "qup0_se0_l2";
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};
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config {
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pins = "gpio2";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_cs_active: qupv3_se0_spi_cs_active {
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mux {
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pins = "gpio3";
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function = "qup0_se0_l3";
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};
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config {
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pins = "gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
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mux {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
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qupv3_se1_i2c_sda_active: qupv3_se1_i2c_sda_active {
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mux {
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pins = "gpio4";
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function = "qup0_se1_l0";
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};
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config {
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pins = "gpio4";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se1_i2c_scl_active: qupv3_se1_i2c_scl_active {
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mux {
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pins = "gpio5";
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function = "qup0_se1_l1";
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};
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config {
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pins = "gpio5";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio4", "gpio5";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_spi_pins: qupv3_se1_spi_pins {
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qupv3_se1_spi_miso_active: qupv3_se1_spi_miso_active {
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mux {
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pins = "gpio4";
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function = "qup0_se1_l0";
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};
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config {
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pins = "gpio4";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_mosi_active: qupv3_se1_spi_mosi_active {
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mux {
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pins = "gpio5";
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function = "qup0_se1_l1";
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};
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config {
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pins = "gpio5";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_clk_active: qupv3_se1_spi_clk_active {
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mux {
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pins = "gpio6";
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function = "qup0_se1_l2";
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};
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config {
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pins = "gpio6";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_cs_active: qupv3_se1_spi_cs_active {
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mux {
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pins = "gpio7";
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function = "qup0_se1_l3";
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};
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config {
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pins = "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
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mux {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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function = "gpio";
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};
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config {
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||
|
|
pins = "gpio4", "gpio5",
|
||
|
|
"gpio6", "gpio7";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
|
||
|
|
qupv3_se2_i2c_sda_active: qupv3_se2_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio8";
|
||
|
|
function = "qup0_se2_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio8";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_i2c_scl_active: qupv3_se2_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio9";
|
||
|
|
function = "qup0_se2_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio9";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio8", "gpio9";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio8", "gpio9";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_pins: qupv3_se2_spi_pins {
|
||
|
|
qupv3_se2_spi_miso_active: qupv3_se2_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio8";
|
||
|
|
function = "qup0_se2_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio8";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_mosi_active: qupv3_se2_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio9";
|
||
|
|
function = "qup0_se2_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio9";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_clk_active: qupv3_se2_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio10";
|
||
|
|
function = "qup0_se2_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio10";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_cs_active: qupv3_se2_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio11";
|
||
|
|
function = "qup0_se2_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio11";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio8", "gpio9",
|
||
|
|
"gpio10", "gpio11";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio8", "gpio9",
|
||
|
|
"gpio10", "gpio11";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
|
||
|
|
qupv3_se3_i2c_sda_active: qupv3_se3_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio12";
|
||
|
|
function = "qup0_se3_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio12";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_i2c_scl_active: qupv3_se3_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio13";
|
||
|
|
function = "qup0_se3_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio13";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio12", "gpio13";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio12", "gpio13";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_pins: qupv3_se3_spi_pins {
|
||
|
|
qupv3_se3_spi_miso_active: qupv3_se3_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio12";
|
||
|
|
function = "qup0_se3_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio12";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_mosi_active: qupv3_se3_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio13";
|
||
|
|
function = "qup0_se3_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio13";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_clk_active: qupv3_se3_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio14";
|
||
|
|
function = "qup0_se3_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio14";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_cs_active: qupv3_se3_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio15";
|
||
|
|
function = "qup0_se3_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio15";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio12", "gpio13",
|
||
|
|
"gpio14", "gpio15";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio12", "gpio13",
|
||
|
|
"gpio14", "gpio15";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
|
||
|
|
qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio16";
|
||
|
|
function = "qup0_se4_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio16";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio17";
|
||
|
|
function = "qup0_se4_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio17";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio16", "gpio17";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio16", "gpio17";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_pins: qupv3_se4_spi_pins {
|
||
|
|
qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio16";
|
||
|
|
function = "qup0_se4_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio16";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio17";
|
||
|
|
function = "qup0_se4_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio17";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_clk_active: qupv3_se4_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio18";
|
||
|
|
function = "qup0_se4_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio18";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_cs_active: qupv3_se4_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio19";
|
||
|
|
function = "qup0_se4_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio19";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio16", "gpio17",
|
||
|
|
"gpio18", "gpio19";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio16", "gpio17",
|
||
|
|
"gpio18", "gpio19";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
|
||
|
|
qupv3_se6_i2c_sda_active: qupv3_se6_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio24";
|
||
|
|
function = "qup0_se6_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio24";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_i2c_scl_active: qupv3_se6_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio25";
|
||
|
|
function = "qup0_se6_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio25";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio24", "gpio25";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio24", "gpio25";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
||
|
|
qupv3_se6_spi_miso_active: qupv3_se6_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio24";
|
||
|
|
function = "qup0_se6_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio24";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_mosi_active: qupv3_se6_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio25";
|
||
|
|
function = "qup0_se6_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio25";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_clk_active: qupv3_se6_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio26";
|
||
|
|
function = "qup0_se6_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio26";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_cs_active: qupv3_se6_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio27";
|
||
|
|
function = "qup0_se6_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio27";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio24", "gpio25",
|
||
|
|
"gpio26", "gpio27";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio24", "gpio25",
|
||
|
|
"gpio26", "gpio27";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
|
||
|
|
qupv3_se7_i2c_sda_active: qupv3_se7_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28";
|
||
|
|
function = "qup0_se7_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_i2c_scl_active: qupv3_se7_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio29";
|
||
|
|
function = "qup0_se7_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio29";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28", "gpio29";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28", "gpio29";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_spi_pins: qupv3_se7_spi_pins {
|
||
|
|
qupv3_se7_spi_miso_active: qupv3_se7_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28";
|
||
|
|
function = "qup0_se7_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_spi_mosi_active: qupv3_se7_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio29";
|
||
|
|
function = "qup0_se7_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio29";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_spi_clk_active: qupv3_se7_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio30";
|
||
|
|
function = "qup0_se7_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio30";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_spi_cs_active: qupv3_se7_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio31";
|
||
|
|
function = "qup0_se7_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio31";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28", "gpio29",
|
||
|
|
"gpio30", "gpio31";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28", "gpio29",
|
||
|
|
"gpio30", "gpio31";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
|
||
|
|
qupv3_se8_i2c_sda_active: qupv3_se8_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio32";
|
||
|
|
function = "qup1_se0_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio32";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_i2c_scl_active: qupv3_se8_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio33";
|
||
|
|
function = "qup1_se0_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio33";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio32", "gpio33";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio32", "gpio33";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_spi_pins: qupv3_se8_spi_pins {
|
||
|
|
qupv3_se8_spi_miso_active: qupv3_se8_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio32";
|
||
|
|
function = "qup1_se0_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio32";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_spi_mosi_active: qupv3_se8_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio33";
|
||
|
|
function = "qup1_se0_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio33";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_spi_clk_active: qupv3_se8_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio34";
|
||
|
|
function = "qup1_se0_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio34";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_spi_cs_active: qupv3_se8_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio35";
|
||
|
|
function = "qup1_se0_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio35";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio32", "gpio33",
|
||
|
|
"gpio34", "gpio35";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio32", "gpio33",
|
||
|
|
"gpio34", "gpio35";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
|
||
|
|
qupv3_se9_i2c_sda_active: qupv3_se9_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio36";
|
||
|
|
function = "qup1_se1_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio36";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_i2c_scl_active: qupv3_se9_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio37";
|
||
|
|
function = "qup1_se1_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio37";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio36", "gpio37";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio36", "gpio37";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
|
||
|
|
qupv3_se9_spi_miso_active: qupv3_se9_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio36";
|
||
|
|
function = "qup1_se1_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio36";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_mosi_active: qupv3_se9_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio37";
|
||
|
|
function = "qup1_se1_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio37";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_clk_active: qupv3_se9_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio38";
|
||
|
|
function = "qup1_se1_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio38";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_cs_active: qupv3_se9_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio39";
|
||
|
|
function = "qup1_se1_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio39";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio36", "gpio37",
|
||
|
|
"gpio38", "gpio39";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio36", "gpio37",
|
||
|
|
"gpio38", "gpio39";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
|
||
|
|
qupv3_se11_i2c_sda_active: qupv3_se11_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44";
|
||
|
|
function = "qup1_se3_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_i2c_scl_active: qupv3_se11_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio45";
|
||
|
|
function = "qup1_se3_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio45";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44", "gpio45";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_pins: qupv3_se11_spi_pins {
|
||
|
|
qupv3_se11_spi_miso_active: qupv3_se11_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44";
|
||
|
|
function = "qup1_se3_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_mosi_active: qupv3_se11_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio45";
|
||
|
|
function = "qup1_se3_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio45";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_clk_active: qupv3_se11_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio46";
|
||
|
|
function = "qup1_se2_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio46";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_cs_active: qupv3_se11_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio47";
|
||
|
|
function = "qup1_se3_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio47";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio44", "gpio45",
|
||
|
|
"gpio46", "gpio47";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio44", "gpio45",
|
||
|
|
"gpio46", "gpio47";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
|
||
|
|
qupv3_se12_i2c_sda_active: qupv3_se12_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio48";
|
||
|
|
function = "qup1_se4_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio48";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_i2c_scl_active: qupv3_se12_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio49";
|
||
|
|
function = "qup1_se4_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio49";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio48", "gpio49";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio48", "gpio49";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_pins: qupv3_se12_spi_pins {
|
||
|
|
qupv3_se12_spi_miso_active: qupv3_se12_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio48";
|
||
|
|
function = "qup1_se4_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio48";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_mosi_active: qupv3_se12_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio49";
|
||
|
|
function = "qup1_se4_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio49";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_clk_active: qupv3_se12_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio50";
|
||
|
|
function = "qup1_se4_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio50";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_cs_active: qupv3_se12_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio51";
|
||
|
|
function = "qup1_se4_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio51";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio48", "gpio49",
|
||
|
|
"gpio50", "gpio51";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio48", "gpio49",
|
||
|
|
"gpio50", "gpio51";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
|
||
|
|
qupv3_se13_i2c_sda_active: qupv3_se13_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio52";
|
||
|
|
function = "qup1_se5_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio52";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_i2c_scl_active: qupv3_se13_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio53";
|
||
|
|
function = "qup1_se5_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio53";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio52", "gpio53";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio52", "gpio53";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_pins: qupv3_se13_spi_pins {
|
||
|
|
qupv3_se13_spi_miso_active: qupv3_se13_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio52";
|
||
|
|
function = "qup1_se5_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio52";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_mosi_active: qupv3_se13_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio53";
|
||
|
|
function = "qup1_se5_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio53";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_clk_active: qupv3_se13_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio54";
|
||
|
|
function = "qup1_se5_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio54";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_cs_active: qupv3_se13_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio55";
|
||
|
|
function = "qup1_se5_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio55";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio52", "gpio53",
|
||
|
|
"gpio54", "gpio55";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio52", "gpio53",
|
||
|
|
"gpio54", "gpio55";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
|
||
|
|
qupv3_se14_i2c_sda_active: qupv3_se14_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio56";
|
||
|
|
function = "qup1_se6_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio56";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_i2c_scl_active: qupv3_se14_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio57";
|
||
|
|
function = "qup1_se5_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio57";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio56", "gpio57";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio56", "gpio57";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_pins: qupv3_se14_spi_pins {
|
||
|
|
qupv3_se14_spi_miso_active: qupv3_se14_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio56";
|
||
|
|
function = "qup1_se6_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio56";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_mosi_active: qupv3_se14_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio57";
|
||
|
|
function = "qup1_se5_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio57";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_clk_active: qupv3_se14_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio58";
|
||
|
|
function = "qup1_se5_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio58";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_cs_active: qupv3_se14_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio59";
|
||
|
|
function = "qup1_se5_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio59";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio56", "gpio57",
|
||
|
|
"gpio58", "gpio59";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio56", "gpio57",
|
||
|
|
"gpio58", "gpio59";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
|
||
|
|
qupv3_se15_i2c_sda_active: qupv3_se15_i2c_sda_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio128";
|
||
|
|
function = "qup1_se7_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio128";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_i2c_scl_active: qupv3_se15_i2c_scl_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio129";
|
||
|
|
function = "qup1_se7_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio129";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio128", "gpio129";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio128", "gpio129";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_pins: qupv3_se15_spi_pins {
|
||
|
|
qupv3_se15_spi_miso_active: qupv3_se15_spi_miso_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio128";
|
||
|
|
function = "qup1_se7_l0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio128";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_mosi_active: qupv3_se15_spi_mosi_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio129";
|
||
|
|
function = "qup1_se7_l1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio129";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_clk_active: qupv3_se15_spi_clk_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio130";
|
||
|
|
function = "qup1_se5_l2";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio130";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_cs_active: qupv3_se15_spi_cs_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio131";
|
||
|
|
function = "qup1_se5_l3";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio131";
|
||
|
|
drive-strength = <6>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio128", "gpio129",
|
||
|
|
"gpio130", "gpio131";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio128", "gpio129",
|
||
|
|
"gpio130", "gpio131";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
/* touchscreen pins */
|
||
|
|
pmx_ts_active {
|
||
|
|
ts_active: ts_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28", "gpio21";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28", "gpio21";
|
||
|
|
drive-strength = <8>;
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pmx_ts_reset_suspend {
|
||
|
|
ts_reset_suspend: ts_reset_suspend {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pmx_ts_int_suspend {
|
||
|
|
ts_int_suspend: ts_int_suspend {
|
||
|
|
mux {
|
||
|
|
pins = "gpio21";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio21";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pmx_ts_release {
|
||
|
|
ts_release: ts_release {
|
||
|
|
mux {
|
||
|
|
pins = "gpio28", "gpio21";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio28", "gpio21";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s0_sck {
|
||
|
|
i2s0_sck_sleep: i2s0_sck_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio60";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio60";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s0_sck_active: i2s0_sck_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio60";
|
||
|
|
function = "i2s0_sck";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio60";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s0_ws {
|
||
|
|
i2s0_ws_sleep: i2s0_ws_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio61";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio61";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s0_ws_active: i2s0_ws_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio61";
|
||
|
|
function = "i2s0_ws";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio61";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s0_sd0 {
|
||
|
|
i2s0_sd0_sleep: i2s0_sd0_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio62";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio62";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s0_sd0_active: i2s0_sd0_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio62";
|
||
|
|
function = "i2s0_data0";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio62";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s0_sd1 {
|
||
|
|
i2s0_sd1_sleep: i2s0_sd1_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio63";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio63";
|
||
|
|
drive-strength = <2>; /* 2 mA */
|
||
|
|
bias-pull-down; /* PULL DOWN */
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s0_sd1_active: i2s0_sd1_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio63";
|
||
|
|
function = "i2s0_data1";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio63";
|
||
|
|
drive-strength = <8>; /* 8 mA */
|
||
|
|
bias-disable; /* NO PULL */
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
/* WCD reset pin */
|
||
|
|
wcd_reset_active: wcd_reset_active {
|
||
|
|
mux {
|
||
|
|
pins = "gpio54";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio54";
|
||
|
|
drive-strength = <16>;
|
||
|
|
output-high;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
wcd_reset_sleep: wcd_reset_sleep {
|
||
|
|
mux {
|
||
|
|
pins = "gpio54";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio54";
|
||
|
|
drive-strength = <16>;
|
||
|
|
bias-disable;
|
||
|
|
output-low;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
usb_phy_ps: usb_phy_ps {
|
||
|
|
usb3phy_portselect_default: usb3phy_portselect_default {
|
||
|
|
mux {
|
||
|
|
pins = "gpio83";
|
||
|
|
function = "usb0_phy_ps";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio83";
|
||
|
|
bias-pull-down;
|
||
|
|
drive-strength = <2>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
usb3phy_portselect_gpio: usb3phy_portselect_gpio {
|
||
|
|
mux {
|
||
|
|
pins = "gpio83";
|
||
|
|
function = "gpio";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio83";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-pull-down;
|
||
|
|
input-enable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
trigout_a: trigout_a {
|
||
|
|
mux {
|
||
|
|
pins = "gpio91";
|
||
|
|
function = "qdss_cti";
|
||
|
|
};
|
||
|
|
|
||
|
|
config {
|
||
|
|
pins = "gpio91";
|
||
|
|
drive-strength = <2>;
|
||
|
|
bias-disable;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|