4500 lines
84 KiB
Text
4500 lines
84 KiB
Text
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&soc {
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audio_etm0 {
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compatible = "qcom,coresight-remote-etm";
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coresight-name = "coresight-audio-etm0";
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qcom,inst-id = <5>;
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atid = <40 41>;
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out-ports {
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port {
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audio_etm0_out_funnel_lpass_lpi: endpoint {
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remote-endpoint =
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<&funnel_lpass_lpi_in_audio_etm0>;
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};
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};
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};
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};
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tpdm_lpass_lpi: tpdm_lpass_lpi {
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compatible = "qcom,coresight-dummy";
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coresight-name = "coresight-tpdm-lpass-lpi";
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qcom,dummy-source;
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atid = <26>;
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out-ports {
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port {
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tpdm_lpass_lpi_1_out_funnel_lpass_lpi: endpoint {
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remote-endpoint =
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<&funnel_lpass_lpi_in_tpdm_lpass_lpi_1>;
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};
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};
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};
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};
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lpass_stm: lpass_stm {
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compatible = "qcom,coresight-dummy";
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coresight-name = "coresight-lpass-stm";
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qcom,dummy-source;
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atid = <25>;
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out-ports {
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port {
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lpass_stm_out_funnel_lpass_lpi_1: endpoint {
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remote-endpoint =
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<&funnel_lpass_lpi_1_in_lpass_stm>;
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};
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};
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};
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};
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tpdm_swao_prio_0: tpdm@10b09000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10b09000 0x1000>;
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reg-names = "tpdm-base";
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atid = <71>;
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coresight-name = "coresight-tpdm-swao-prio-0";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_swao_prio_0_out_tpda_aoss_0: endpoint {
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remote-endpoint =
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<&tpda_aoss_0_in_tpdm_swao_prio_0>;
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};
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};
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};
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};
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tpdm_swao_prio_1: tpdm@10b0a000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10b0a000 0x1000>;
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reg-names = "tpdm-base";
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atid = <71>;
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coresight-name = "coresight-tpdm-swao-prio-1";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_swao_prio_1_out_tpda_aoss_1: endpoint {
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remote-endpoint =
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<&tpda_aoss_1_in_tpdm_swao_prio_1>;
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};
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};
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};
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};
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tpdm_swao_prio_2: tpdm@10b0b000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10b0b000 0x1000>;
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reg-names = "tpdm-base";
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atid = <71>;
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coresight-name = "coresight-tpdm-swao-prio-2";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_swao_prio_2_out_tpda_aoss_2: endpoint {
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remote-endpoint =
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<&tpda_aoss_2_in_tpdm_swao_prio_2>;
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};
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};
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};
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};
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tpdm_swao_prio_3: tpdm@10b0c000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10b0c000 0x1000>;
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reg-names = "tpdm-base";
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atid = <71>;
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coresight-name = "coresight-tpdm-swao-prio-3";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_swao_prio_3_out_tpda_aoss_3: endpoint {
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remote-endpoint =
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<&tpda_aoss_3_in_tpdm_swao_prio_3>;
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};
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};
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};
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};
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tpdm_lpass: tpdm@10844000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10844000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-lpass";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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atid = <78>;
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out-ports {
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port {
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tpdm_lpass_out_funnel_lpass: endpoint {
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remote-endpoint =
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<&funnel_lpass_in_tpdm_lpass>;
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};
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};
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};
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};
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tpdm_ddr_ch02: tpdm@10d20000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10d20000 0x1000>;
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reg-names = "tpdm-base";
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coresight-name = "coresight-tpdm-ddr-ch02";
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atid = <78>;
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_ddr_ch02_out_funnel_ddr_ch02: endpoint {
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remote-endpoint =
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<&funnel_ddr_ch02_in_tpdm_ddr_ch02>;
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};
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};
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};
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};
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tpdm_ddr_ch13: tpdm@10d30000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10d30000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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coresight-name = "coresight-tpdm-ddr-ch13";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_ddr_ch13_out_funnel_ddr_ch13: endpoint {
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remote-endpoint =
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<&funnel_ddr_ch13_in_tpdm_ddr_ch13>;
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};
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};
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};
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};
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tpdm_ddr: tpdm@10d00000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10d00000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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coresight-name = "coresight-tpdm-ddr";
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status = "disabled";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_ddr_dl0_0_out_funnel_ddr_dl0: endpoint {
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remote-endpoint =
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<&funnel_ddr_dl0_in_tpdm_ddr_dl0_0>;
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};
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};
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};
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};
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tpdm_shrm: tpdm@10d01000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10d01000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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status = "disabled";
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coresight-name = "coresight-tpdm-shrm";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_ddr_dl0_1_out_funnel_ddr_dl0: endpoint {
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remote-endpoint =
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<&funnel_ddr_dl0_in_tpdm_ddr_dl0_1>;
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};
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};
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};
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};
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tpdm_video: tpdm@10830000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10830000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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coresight-name = "coresight-tpdm-video";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_video_out_funnel_video: endpoint {
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remote-endpoint =
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<&funnel_video_in_tpdm_video>;
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};
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};
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};
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};
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tpdm_mdss: tpdm@10c60000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10c60000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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coresight-name = "coresight-tpdm-mdss";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_mdss_out_funnel_multimedia: endpoint {
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remote-endpoint =
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<&funnel_multimedia_in_tpdm_mdss>;
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};
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};
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};
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};
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tpdm_mm: tpdm@10c08000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10c08000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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coresight-name = "coresight-tpdm-mm";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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tpdm_dlmm_out_funnel_multimedia: endpoint {
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remote-endpoint =
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<&funnel_multimedia_in_tpdm_dlmm>;
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};
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};
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};
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};
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tpdm_rdpm: tpdm@10c38000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
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reg = <0x10c38000 0x1000>;
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reg-names = "tpdm-base";
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atid = <78>;
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coresight-name = "coresight-tpdm-rdpm";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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|
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out-ports {
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port {
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tpdm_dlwt0_out_funnel_dl_west: endpoint {
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remote-endpoint =
|
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<&funnel_dl_west_in_tpdm_dlwt0>;
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||
|
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};
|
||
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};
|
||
|
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};
|
||
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};
|
||
|
|
|
||
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tpdm_rdpm_mx: tpdm@10c39000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb968>;
|
||
|
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reg = <0x10c39000 0x1000>;
|
||
|
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reg-names = "tpdm-base";
|
||
|
|
|
||
|
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atid = <78>;
|
||
|
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coresight-name = "coresight-tpdm-rdpm-mx";
|
||
|
|
|
||
|
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clocks = <&aoss_qmp>;
|
||
|
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clock-names = "apb_pclk";
|
||
|
|
|
||
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out-ports {
|
||
|
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port {
|
||
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tpdm_dlwt1_out_funnel_dl_west: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
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<&funnel_dl_west_in_tpdm_dlwt1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
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};
|
||
|
|
|
||
|
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tpdm_turing: tpdm@10980000 {
|
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|
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compatible = "arm,primecell";
|
||
|
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arm,primecell-periphid = <0x000bb968>;
|
||
|
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reg = <0x10980000 0x1000>;
|
||
|
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reg-names = "tpdm-base";
|
||
|
|
|
||
|
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coresight-name = "coresight-tpdm-turing";
|
||
|
|
|
||
|
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atid = <78>;
|
||
|
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clocks = <&aoss_qmp>;
|
||
|
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clock-names = "apb_pclk";
|
||
|
|
|
||
|
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out-ports {
|
||
|
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port {
|
||
|
|
tpdm_turing_out_funnel_turing: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
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<&funnel_turing_in_tpdm_turing>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_turing_llm: tpdm_turing_llm {
|
||
|
|
compatible = "qcom,coresight-dummy";
|
||
|
|
coresight-name = "coresight-tpdm-turing-llm";
|
||
|
|
qcom,dummy-source;
|
||
|
|
|
||
|
|
atid = <78>;
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_turing_llm_out_funnel_turing: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_turing_in_tpdm_turing_llm>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_gpu: tpdm@10900000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10900000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpdm-gpu";
|
||
|
|
atid = <78>;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_gpu_out_funnel_gfx_dl: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_gfx_dl_in_tpdm_gpu>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_prng: tpdm@10841000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10841000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpdm-prng";
|
||
|
|
|
||
|
|
atid = <78>;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_prng_out_tpda_dl_center_19: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_19_in_tpdm_prng>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_qm: tpdm@109d0000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x109d0000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <78>;
|
||
|
|
coresight-name = "coresight-tpdm-qm";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_qm_out_tpda_dl_center_20: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_20_in_tpdm_qm>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_gcc: tpdm@1082c000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x1082c000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <78>;
|
||
|
|
coresight-name = "coresight-tpdm-gcc";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_gcc_out_tpda_dl_center_21: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_21_in_tpdm_gcc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_vsense: tpdm@10840000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10840000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <78>;
|
||
|
|
coresight-name = "coresight-tpdm-vsense";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_vsense_out_tpda_dl_center_22: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_22_in_tpdm_vsense>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_ipa: tpdm@10c22000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10c22000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <78>;
|
||
|
|
coresight-name = "coresight-tpdm-ipa";
|
||
|
|
status = "disabled";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_ipa_out_tpda_dl_center_23: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_23_in_tpdm_ipa>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_dlct: tpdm@10c28000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10c28000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <78>;
|
||
|
|
coresight-name = "coresight-tpdm-dlct";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_dlct_out_tpda_dl_center_26: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_26_in_tpdm_dlct>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_ipcc: tpdm@10c29000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10c29000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <78>;
|
||
|
|
coresight-name = "coresight-tpdm-ipcc";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_ipcc_out_tpda_dl_center_27: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_27_in_tpdm_ipcc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_swao_1: tpdm@10b0d000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10b0d000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <71>;
|
||
|
|
coresight-name = "coresight-tpdm-swao-1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_swao_out_tpda_aoss_4: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_aoss_4_in_tpdm_swao>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
snoc: snoc {
|
||
|
|
compatible = "qcom,coresight-dummy";
|
||
|
|
coresight-name = "coresight-snoc";
|
||
|
|
qcom,dummy-source;
|
||
|
|
|
||
|
|
atid = <125>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
snoc_out_funnel_in0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in0_in_snoc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_spdm: tpdm@1000f000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x1000f000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <65>;
|
||
|
|
coresight-name = "coresight-tpdm-spdm";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_spdm_out_tpda_qdss_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_qdss_1_in_tpdm_spdm>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
stm: stm@10002000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb962>;
|
||
|
|
reg = <0x10002000 0x1000>,
|
||
|
|
<0x16280000 0x180000>;
|
||
|
|
reg-names = "stm-base", "stm-stimulus-base";
|
||
|
|
|
||
|
|
atid = <16>;
|
||
|
|
coresight-name = "coresight-stm";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
stm_out_funnel_in0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in0_in_stm>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_dcc: tpdm@10003000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10003000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <65>;
|
||
|
|
coresight-name = "coresight-tpdm-dcc";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
qcom,hw-enable-check;
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_dcc_out_tpda_qdss_0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_qdss_0_in_tpdm_dcc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
tpdm_ufs: tpdm@10c23000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10c23000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <75>;
|
||
|
|
coresight-name = "coresight-tpdm-ufs";
|
||
|
|
status = "disabled";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_ufs_out_tpda_dl_south: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_south_in_tpdm_ufs>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
turing_etm0: turing_etm0 {
|
||
|
|
compatible = "qcom,coresight-remote-etm";
|
||
|
|
|
||
|
|
coresight-name = "coresight-turing-etm0";
|
||
|
|
qcom,inst-id = <13>;
|
||
|
|
|
||
|
|
atid = <38 39>;
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
turing_etm0_out_funnel_turing_dup: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_turing_dup_in_turing_etm0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_spss: tpdm@10880000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10880000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <70>;
|
||
|
|
coresight-name = "coresight-tpdm-spss";
|
||
|
|
status = "disabled";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_spss_out_tpda_spss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_spss_in_tpdm_spss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_spss: tpda@10882000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
reg = <0x10882000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpda-spss";
|
||
|
|
status = "disabled";
|
||
|
|
|
||
|
|
qcom,tpda-atid = <70>;
|
||
|
|
qcom,cmb-elem-size = <0 32>;
|
||
|
|
qcom,dsb-elem-size = <0 32>;
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpda_spss_out_funnel_spss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_spss_in_tpda_spss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
tpda_spss_in_tpdm_spss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_spss_out_tpda_spss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_dl_south: tpdm@109c0000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x109c0000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <75>;
|
||
|
|
coresight-name = "coresight-tpdm-dl-south";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_dl_south_out_tpda_dl_south_2: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_south_2_in_tpdm_dl_south>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_dl_north: tpdm@10ac0000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10ac0000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <97>;
|
||
|
|
coresight-name = "coresight-tpdm-dl-north";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_dl_north_out_tpda_dl_north_2: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_north_2_in_tpdm_dl_north>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_llm_silver: tpdm@138a0000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x138a0000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <66>;
|
||
|
|
coresight-name = "coresight-tpdm-llm-silver";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_llm_silver_out_tpda_apss_0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_apss_0_in_tpdm_llm_silver>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_llm_gold: tpdm@138b0000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x138b0000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <66>;
|
||
|
|
coresight-name = "coresight-tpdm-llm-gold";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_llm_gold_out_tpda_apss_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_apss_1_in_tpdm_llm_gold>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_apss_llm: tpdm@138c0000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x138c0000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <66>;
|
||
|
|
coresight-name = "coresight-tpdm-apss-llm";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_apss_llm_out_tpda_apss_2: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_apss_2_in_tpdm_apss_llm>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_actpm: tpdm@13860000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x13860000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <66>;
|
||
|
|
coresight-name = "coresight-tpdm-actpm";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_apss0_out_tpda_apss_3: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_apss_3_in_tpdm_apss0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_apss: tpdm@13861000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x13861000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <66>;
|
||
|
|
coresight-name = "coresight-tpdm-apss";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_apps1_out_tpda_apss_4: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_apss_4_in_tpdm_apps1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_modem_0: tpdm@10800000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10800000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <67>;
|
||
|
|
coresight-name = "coresight-tpdm-modem-0";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_modem_0_out_tpda_modem_0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_modem_0_in_tpdm_modem_0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_modem_1: tpdm@10801000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10801000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
atid = <67>;
|
||
|
|
coresight-name = "coresight-tpdm-modem-1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_modem_1_out_tpda_modem_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_modem_1_in_tpdm_modem_1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
modem_etm0 {
|
||
|
|
compatible = "qcom,coresight-remote-etm";
|
||
|
|
|
||
|
|
coresight-name = "coresight-modem-etm0";
|
||
|
|
qcom,inst-id = <2>;
|
||
|
|
|
||
|
|
atid = <36 37>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
modem_etm0_out_funnel_modem_q6_dup: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_modem_q6_dup_in_modem_etm0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
modem2_etm0 {
|
||
|
|
compatible = "qcom,coresight-remote-etm";
|
||
|
|
|
||
|
|
coresight-name = "coresight-modem2-etm0";
|
||
|
|
qcom,inst-id = <11>;
|
||
|
|
|
||
|
|
atid = <39>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
modem2_etm0_out_funnel_modem: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_modem_in_modem2_etm0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
modem_diag: modem_diag {
|
||
|
|
compatible = "qcom,coresight-dummy";
|
||
|
|
coresight-name = "coresight-modem-diag";
|
||
|
|
qcom,dummy-source;
|
||
|
|
|
||
|
|
atid = <50>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
modem_diag_out_funnel_modem_q6: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_modem_q6_in_modem_diag>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_sdcc2: tpdm@10c20000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10c20000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
atid = <97>;
|
||
|
|
coresight-name = "coresight-tpdm-sdcc-2";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_sdcc2_out_tpda_dl_north_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_north_1_in_tpdm_sdcc2>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_sdcc4: tpdm@10c21000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10c21000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
atid = <75>;
|
||
|
|
coresight-name = "coresight-tpdm-sdcc-4";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_sdcc4_out_tpda_dl_south_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_south_1_in_tpdm_sdcc4>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_tmess_prng: tpdm@10cc9000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10cc9000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <85>;
|
||
|
|
coresight-name = "coresight-tpdm-tmess-prng";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_tmess_prng_out_tpda_tmess_0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_tmess_0_in_tpdm_tmess_prng>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_tmess_0: tpdm@10cc0000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10cc0000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <85>;
|
||
|
|
coresight-name = "coresight-tpdm-tmess-0";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_tmess0_out_tpda_tmess: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_tmess_in_tpdm_tmess0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_tmess_1: tpdm@10cc1000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10cc1000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <85>;
|
||
|
|
coresight-name = "coresight-tpdm-tmess-1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
qcom,hw-enable-check;
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_tmess1_out_tpda_tmess: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_tmess_in_tpdm_tmess1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_lpicc: tpdm_lpicc {
|
||
|
|
compatible = "qcom,coresight-dummy";
|
||
|
|
coresight-name = "coresight-tpdm-lpicc";
|
||
|
|
qcom,dummy-source;
|
||
|
|
|
||
|
|
atid = <27>;
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_lpicc_out_funnel_ddr_lpi: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_lpi_in_tpdm_lpicc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_llcc_0: tpdm@10d40000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10d40000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <99>;
|
||
|
|
coresight-name = "coresight-tpdm-llcc-0";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_llcc0_out_tpda_ddr_llcc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_ddr_llcc_in_tpdm_llcc0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_llcc_1: tpdm@10d41000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10d41000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <99>;
|
||
|
|
coresight-name = "coresight-tpdm-llcc-1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_llcc1_out_tpda_ddr_llcc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_ddr_llcc_in_tpdm_llcc1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_llcc_2: tpdm@10d42000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10d42000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <99>;
|
||
|
|
coresight-name = "coresight-tpdm-llcc-2";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_llcc2_out_tpda_ddr_llcc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_ddr_llcc_in_tpdm_llcc2>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpdm_llcc_3: tpdm@10d43000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb968>;
|
||
|
|
reg = <0x10d43000 0x1000>;
|
||
|
|
reg-names = "tpdm-base";
|
||
|
|
|
||
|
|
atid = <99>;
|
||
|
|
coresight-name = "coresight-tpdm-llcc-3";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpdm_llcc3_out_tpda_ddr_llcc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_ddr_llcc_in_tpdm_llcc3>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_ddr_llcc: tpda@10d09000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
|
||
|
|
reg = <0x10d09000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
|
||
|
|
qcom,tpda-atid = <99>;
|
||
|
|
|
||
|
|
qcom,cmb-elem-size = <0 32>,
|
||
|
|
<1 32>,
|
||
|
|
<2 32>,
|
||
|
|
<3 32>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpda-ddr-llcc";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
tpda_ddr_llcc_in_tpdm_llcc0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_llcc0_out_tpda_ddr_llcc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
tpda_ddr_llcc_in_tpdm_llcc1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_llcc1_out_tpda_ddr_llcc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
tpda_ddr_llcc_in_tpdm_llcc2: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_llcc2_out_tpda_ddr_llcc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
tpda_ddr_llcc_in_tpdm_llcc3: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_llcc3_out_tpda_ddr_llcc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tpda_ddr_llcc_out_funnel_ddr_dl1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl1_in_tpda_ddr_llcc>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_ddr_lpi: funnel@10b23000 {
|
||
|
|
compatible = "arm,coresight-static-funnel";
|
||
|
|
coresight-name = "coresight-funnel-ddr-lpi";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_ddr_lpi_in_tpdm_lpicc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_lpicc_out_funnel_ddr_lpi>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_ddr_lpi_out_funnel_aoss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_aoss_in_funnel_ddr_lpi>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_lpass_lpi_1: funnel@10b50000 {
|
||
|
|
compatible = "arm,coresight-static-funnel";
|
||
|
|
coresight-name = "coresight-funnel-lpass_lpi_1";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_lpass_lpi_1_in_lpass_stm: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&lpass_stm_out_funnel_lpass_lpi_1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_lpass_lpi_in_tpdm_lpass_lpi_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_lpass_lpi_1_out_funnel_lpass_lpi>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_lpass_lpi_1_out_funnel_lpass_lpi_0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_lpass_lpi_0_in_funnel_lpass_lpi_1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_lpass_lpi_0: funnel@10b44000 {
|
||
|
|
compatible = "arm,coresight-static-funnel";
|
||
|
|
coresight-name = "coresight-funnel-lpass_lpi_0";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_lpass_lpi_in_audio_etm0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&audio_etm0_out_funnel_lpass_lpi>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@7 {
|
||
|
|
reg = <7>;
|
||
|
|
funnel_lpass_lpi_0_in_funnel_lpass_lpi_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_lpass_lpi_1_out_funnel_lpass_lpi_0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_lpass_lpi_out_funnel_aoss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_aoss_in_funnel_lpass_lpi>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_gfx: funnel@10963000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10963000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-gfx";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_gfx_out_funnel_gfx_dl: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_gfx_dl_in_funnel_gfx>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_gfx_dl: funnel@10902000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10902000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-gfx_dl";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_gfx_dl_in_tpdm_gpu: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_gpu_out_funnel_gfx_dl>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_gfx_dl_in_funnel_gfx: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_gfx_out_funnel_gfx_dl>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_gfx_dl_out_tpda_dl_center_17: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_17_in_funnel_gfx_dl>;
|
||
|
|
source = <&tpdm_gpu>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_gfx_dl_out_funnel_dl_center: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_center_in_funnel_gfx_dl>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_video: funnel@10832000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10832000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-video";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
funnel_video_in_tpdm_video: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_video_out_funnel_video>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_video_out_funnel_multimedia: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_multimedia_in_funnel_video>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_multimedia: funnel@10c0a000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10c0a000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-multimedia";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_multimedia_in_funnel_video: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_video_out_funnel_multimedia>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_multimedia_in_tpdm_mdss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_mdss_out_funnel_multimedia>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
funnel_multimedia_in_tpdm_dlmm: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_dlmm_out_funnel_multimedia>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_multimedia_out_funnel_dl_west: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_west_in_funnel_multimedia>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_lpass: funnel@10846000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10846000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-lpass";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
funnel_lpass_in_tpdm_lpass: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_lpass_out_funnel_lpass>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_lpass_out_tpda_dl_center_4: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_4_in_funnel_lpass>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_ddr_ch02: funnel@10d22000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10d22000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-ddr_ch02";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
funnel_ddr_ch02_in_tpdm_ddr_ch02: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_ddr_ch02_out_funnel_ddr_ch02>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_ddr_ch02_out_funnel_ddr_dl0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl0_in_funnel_ddr_ch02>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_ddr_ch13: funnel@10d32000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10d32000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-ddr_ch13";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
funnel_ddr_ch13_in_tpdm_ddr_ch13: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_ddr_ch13_out_funnel_ddr_ch13>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_ddr_ch13_out_funnel_ddr_dl0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl0_in_funnel_ddr_ch13>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
gladiator: gladiator {
|
||
|
|
compatible = "qcom,coresight-dummy";
|
||
|
|
coresight-name = "coresight-gladiator";
|
||
|
|
qcom,dummy-source;
|
||
|
|
|
||
|
|
atid = <96>;
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
gladiator_out_funnel_ddr_dl1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl1_in_gladiator>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_ddr_dl1: funnel@10d0a000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10d0a000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-ddr_dl1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_ddr_dl1_in_tpda_ddr_llcc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_ddr_llcc_out_funnel_ddr_dl1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
funnel_ddr_dl1_in_gladiator: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&gladiator_out_funnel_ddr_dl1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_ddr_dl1_out_funnel_ddr_dl0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl0_in_funnel_ddr_dl1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_ddr_dl0: funnel@10d03000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10d03000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-ddr_dl0";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_ddr_dl0_in_funnel_ddr_ch13: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_ch13_out_funnel_ddr_dl0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_ddr_dl0_in_funnel_ddr_ch02: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_ch02_out_funnel_ddr_dl0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
funnel_ddr_dl0_in_tpdm_ddr_dl0_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_ddr_dl0_1_out_funnel_ddr_dl0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
funnel_ddr_dl0_in_tpdm_ddr_dl0_0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_ddr_dl0_0_out_funnel_ddr_dl0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
funnel_ddr_dl0_in_funnel_ddr_dl1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl1_out_funnel_ddr_dl0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_ddr_dl0_out_tpda_dl_center_5: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_5_in_funnel_ddr_dl0>;
|
||
|
|
source = <&tpdm_ddr_ch02>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_ddr_dl0_out_tpda_dl_center_6: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_6_in_funnel_ddr_dl0>;
|
||
|
|
source = <&tpdm_ddr_ch13>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
funnel_ddr_dl0_out_tpda_dl_center_7: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_7_in_funnel_ddr_dl0>;
|
||
|
|
source = <&tpdm_ddr>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
funnel_ddr_dl0_out_tpda_dl_center_8: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_8_in_funnel_ddr_dl0>;
|
||
|
|
source = <&tpdm_shrm>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
funnel_ddr_dl0_out_funnel_dl_center: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_center_in_funnel_ddr_dl0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_turing_dup: funnel@10984000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10984000 0x1000>,
|
||
|
|
<0x10983000 0x1000>;
|
||
|
|
reg-names = "funnel-base-dummy", "funnel-base-real";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-turing_dup";
|
||
|
|
|
||
|
|
qcom,duplicate-funnel;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
funnel_turing_dup_in_turing_etm0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&turing_etm0_out_funnel_turing_dup>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_turing_dup_out_funnel_turing: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_turing_in_funnel_turing_dup>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_turing: funnel@10983000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10983000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-turing";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_turing_in_tpdm_turing: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_turing_out_funnel_turing>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_turing_in_tpdm_turing_llm: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_turing_llm_out_funnel_turing>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@5 {
|
||
|
|
reg = <5>;
|
||
|
|
funnel_turing_in_funnel_turing_dup: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_turing_dup_out_funnel_turing>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_turing_out_tpda_dl_center_15: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_15_in_funnel_turing>;
|
||
|
|
source = <&tpdm_turing>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_turing_out_tpda_dl_center_16: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_16_in_funnel_turing>;
|
||
|
|
source = <&tpdm_turing_llm>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
funnel_turing_out_funnel_dl_center: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_center_in_funnel_turing>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_spss: funnel@10883000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10883000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-spss";
|
||
|
|
status = "disabled";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
funnel_spss_in_tpda_spss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_spss_out_funnel_spss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_spss_out_funnel_dl_north: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_north_in_funnel_spss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_dl_west: funnel@10c3a000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10c3a000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-dl_west";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_dl_west_in_funnel_multimedia: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_multimedia_out_funnel_dl_west>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_dl_west_in_tpdm_dlwt0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_dlwt0_out_funnel_dl_west>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
funnel_dl_west_in_tpdm_dlwt1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_dlwt1_out_funnel_dl_west>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_dl_west_out_tpda_dl_center_9: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_9_in_funnel_dl_west>;
|
||
|
|
source = <&tpdm_video>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_dl_west_out_tpda_dl_center_10: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_10_in_funnel_dl_west>;
|
||
|
|
source = <&tpdm_mdss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
funnel_dl_west_out_tpda_dl_center_12: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_12_in_funnel_dl_west>;
|
||
|
|
source = <&tpdm_mm>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
funnel_dl_west_out_tpda_dl_center_13: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_13_in_funnel_dl_west>;
|
||
|
|
source = <&tpdm_rdpm>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
funnel_dl_west_out_tpda_dl_center_14: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_14_in_funnel_dl_west>;
|
||
|
|
source = <&tpdm_rdpm_mx>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_dl_south: tpda@109c1000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
|
||
|
|
reg = <0x109c1000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
|
||
|
|
qcom,tpda-atid = <75>;
|
||
|
|
|
||
|
|
qcom,dsb-elem-size = <4 32>;
|
||
|
|
qcom,cmb-elem-size = <1 32>,
|
||
|
|
<2 32>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpda-dl_south";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
tpda_dl_south_1_in_tpdm_sdcc4: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_sdcc4_out_tpda_dl_south_1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
tpda_dl_south_in_tpdm_ufs: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_ufs_out_tpda_dl_south>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
tpda_dl_south_2_in_tpdm_dl_south: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_dl_south_out_tpda_dl_south_2>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
|
||
|
|
port {
|
||
|
|
tpda_dl_south_out_funnel_dl_south: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_south_in_tpda_dl_south>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_dl_south: funnel@109c2000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x109c2000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-dl_south";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
funnel_dl_south_in_tpda_dl_south: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_south_out_funnel_dl_south>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_dl_south_out_funnel_in1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in1_in_funnel_dl_south>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_tmess: tpda@10cc4000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
|
||
|
|
reg = <0x10cc4000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
|
||
|
|
qcom,cmb-elem-size = <0 32>,
|
||
|
|
<1 32>,
|
||
|
|
<2 32>;
|
||
|
|
|
||
|
|
qcom,tpda-atid = <85>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpda-tmess";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
tpda_tmess_in_tpdm_tmess1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_tmess1_out_tpda_tmess>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
tpda_tmess_0_in_tpdm_tmess_prng: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_tmess_prng_out_tpda_tmess_0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
tpda_tmess_in_tpdm_tmess0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_tmess0_out_tpda_tmess>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
|
||
|
|
port {
|
||
|
|
tpda_tmess_out_funnel_tmess: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_tmess_in_tpda_tmess>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_tmess: funnel@10cc5000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10cc5000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-tmess";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
funnel_tmess_in_tpda_tmess: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_tmess_out_funnel_tmess>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_tmess_out_funnel_dl_north: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_north_in_funnel_tmess>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_dl_north: tpda@10ac1000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
|
||
|
|
reg = <0x10ac1000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
|
||
|
|
qcom,tpda-atid = <97>;
|
||
|
|
qcom,dsb-elem-size = <2 32>;
|
||
|
|
qcom,cmb-elem-size = <1 32>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpda-dl_north";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
tpda_dl_north_1_in_tpdm_sdcc2: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_sdcc2_out_tpda_dl_north_1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
tpda_dl_north_2_in_tpdm_dl_north: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_dl_north_out_tpda_dl_north_2>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
|
||
|
|
port {
|
||
|
|
tpda_dl_north_out_funnel_dl_north: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_north_in_tpda_dl_north>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_dl_north: funnel@10ac2000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10ac2000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-dl_north";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_dl_north_in_tpda_dl_north: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_north_out_funnel_dl_north>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
funnel_dl_north_in_funnel_spss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_spss_out_funnel_dl_north>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@5 {
|
||
|
|
reg = <5>;
|
||
|
|
funnel_dl_north_in_funnel_tmess: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_tmess_out_funnel_dl_north>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_dl_north_out_funnel_in1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in1_in_funnel_dl_north>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_modem: tpda@10803000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
|
||
|
|
reg = <0x10803000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
qcom,tpda-atid = <67>;
|
||
|
|
|
||
|
|
qcom,dsb-elem-size = <0 32>;
|
||
|
|
qcom,cmb-elem-size = <0 64>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpda-modem";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
tpda_modem_0_in_tpdm_modem_0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_modem_0_out_tpda_modem_0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
tpda_modem_1_in_tpdm_modem_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_modem_1_out_tpda_modem_1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
|
||
|
|
port {
|
||
|
|
tpda_modem_out_funnel_modem: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_modem_in_tpda_modem>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_modem_q6_dup: funnel@1080d000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x1080d000 0x1000>,
|
||
|
|
<0x1080c000 0x1000>;
|
||
|
|
reg-names = "funnel-base-dummy", "funnel-base-real";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-modem_q6_dup";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
qcom,duplicate-funnel;
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_modem_q6_dup_in_modem_etm0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&modem_etm0_out_funnel_modem_q6_dup>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_modem_q6_dup_out_funnel_modem_q6: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_modem_q6_in_funnel_modem_q6_dup>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_modem_q6: funnel@1080c000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x1080c000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-modem_q6";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_modem_q6_in_funnel_modem_q6_dup: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_modem_q6_dup_out_funnel_modem_q6>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
funnel_modem_q6_in_modem_diag: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&modem_diag_out_funnel_modem_q6>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_modem_q6_out_funnel_modem: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_modem_in_funnel_modem_q6>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_modem: funnel@10804000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10804000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-modem";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_modem_in_modem2_etm0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&modem2_etm0_out_funnel_modem>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_modem_in_tpda_modem: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_modem_out_funnel_modem>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
funnel_modem_in_funnel_modem_q6: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_modem_q6_out_funnel_modem>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_modem_out_funnel_in1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in1_in_funnel_modem>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_apss: tpda@13863000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
|
||
|
|
reg = <0x13863000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
|
||
|
|
qcom,tpda-atid = <66>;
|
||
|
|
|
||
|
|
qcom,dsb-elem-size = <2 32>,
|
||
|
|
<4 32>;
|
||
|
|
qcom,cmb-elem-size = <0 32>,
|
||
|
|
<1 32>,
|
||
|
|
<3 64>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpda-apss";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
tpda_apss_0_in_tpdm_llm_silver: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_llm_silver_out_tpda_apss_0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
tpda_apss_1_in_tpdm_llm_gold: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_llm_gold_out_tpda_apss_1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
tpda_apss_3_in_tpdm_apss0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_apss0_out_tpda_apss_3>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
tpda_apss_2_in_tpdm_apss_llm: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_apss_llm_out_tpda_apss_2>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
tpda_apss_4_in_tpdm_apps1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_apps1_out_tpda_apss_4>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
|
||
|
|
port {
|
||
|
|
tpda_apss_out_funnel_apss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_apss_in_tpda_apss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_apss: funnel@13810000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x13810000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-apss";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_apss_in_funnel_ete: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ete_out_funnel_apss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
funnel_apss_in_tpda_apss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_apss_out_funnel_apss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_apss_out_funnel_in1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in1_in_funnel_apss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_dl_center: tpda@10c2b000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
|
||
|
|
reg = <0x10c2b000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
|
||
|
|
qcom,tpda-atid = <78>;
|
||
|
|
|
||
|
|
qcom,dsb-elem-size = <5 32>,
|
||
|
|
<6 32>,
|
||
|
|
<7 32>,
|
||
|
|
<9 32>,
|
||
|
|
<10 32>,
|
||
|
|
<12 32>,
|
||
|
|
<15 32>,
|
||
|
|
<17 32>,
|
||
|
|
<20 32>,
|
||
|
|
<21 32>,
|
||
|
|
<25 32>,
|
||
|
|
<26 32>;
|
||
|
|
|
||
|
|
qcom,cmb-elem-size = <7 32>,
|
||
|
|
<8 32>,
|
||
|
|
<10 32>,
|
||
|
|
<13 64>,
|
||
|
|
<14 64>,
|
||
|
|
<16 32>,
|
||
|
|
<19 64>,
|
||
|
|
<22 32>,
|
||
|
|
<23 32>,
|
||
|
|
<27 64>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpda-dl_center";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@a {
|
||
|
|
reg = <10>;
|
||
|
|
tpda_dl_center_10_in_funnel_dl_west: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_west_out_tpda_dl_center_10>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@d {
|
||
|
|
reg = <13>;
|
||
|
|
tpda_dl_center_13_in_funnel_dl_west: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_west_out_tpda_dl_center_13>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@c {
|
||
|
|
reg = <12>;
|
||
|
|
tpda_dl_center_12_in_funnel_dl_west: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_west_out_tpda_dl_center_12>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@f {
|
||
|
|
reg = <15>;
|
||
|
|
tpda_dl_center_15_in_funnel_turing: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_turing_out_tpda_dl_center_15>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@e {
|
||
|
|
reg = <14>;
|
||
|
|
tpda_dl_center_14_in_funnel_dl_west: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_west_out_tpda_dl_center_14>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@11 {
|
||
|
|
reg = <17>;
|
||
|
|
tpda_dl_center_17_in_funnel_gfx_dl: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_gfx_dl_out_tpda_dl_center_17>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@10 {
|
||
|
|
reg = <16>;
|
||
|
|
tpda_dl_center_16_in_funnel_turing: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_turing_out_tpda_dl_center_16>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@13 {
|
||
|
|
reg = <19>;
|
||
|
|
tpda_dl_center_19_in_tpdm_prng: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_prng_out_tpda_dl_center_19>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@17 {
|
||
|
|
reg = <23>;
|
||
|
|
tpda_dl_center_23_in_tpdm_ipa: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_ipa_out_tpda_dl_center_23>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@16 {
|
||
|
|
reg = <22>;
|
||
|
|
tpda_dl_center_22_in_tpdm_vsense: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_vsense_out_tpda_dl_center_22>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1a {
|
||
|
|
reg = <26>;
|
||
|
|
tpda_dl_center_26_in_tpdm_dlct: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_dlct_out_tpda_dl_center_26>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@14 {
|
||
|
|
reg = <20>;
|
||
|
|
tpda_dl_center_20_in_tpdm_qm: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_qm_out_tpda_dl_center_20>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1b {
|
||
|
|
reg = <27>;
|
||
|
|
tpda_dl_center_27_in_tpdm_ipcc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_ipcc_out_tpda_dl_center_27>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@5 {
|
||
|
|
reg = <5>;
|
||
|
|
tpda_dl_center_5_in_funnel_ddr_dl0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl0_out_tpda_dl_center_5>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
tpda_dl_center_4_in_funnel_lpass: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_lpass_out_tpda_dl_center_4>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@7 {
|
||
|
|
reg = <7>;
|
||
|
|
tpda_dl_center_7_in_funnel_ddr_dl0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl0_out_tpda_dl_center_7>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@6 {
|
||
|
|
reg = <6>;
|
||
|
|
tpda_dl_center_6_in_funnel_ddr_dl0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl0_out_tpda_dl_center_6>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@9 {
|
||
|
|
reg = <9>;
|
||
|
|
tpda_dl_center_9_in_funnel_dl_west: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_west_out_tpda_dl_center_9>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@8 {
|
||
|
|
reg = <8>;
|
||
|
|
tpda_dl_center_8_in_funnel_ddr_dl0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl0_out_tpda_dl_center_8>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@15 {
|
||
|
|
reg = <21>;
|
||
|
|
tpda_dl_center_21_in_tpdm_gcc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_gcc_out_tpda_dl_center_21>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
|
||
|
|
port {
|
||
|
|
tpda_dl_center_out_funnel_dl_center: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_center_in_tpda_dl_center>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_dl_center: funnel@10c2c000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10c2c000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-dl_center";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_dl_center_in_tpda_dl_center: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_dl_center_out_funnel_dl_center>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
funnel_dl_center_in_funnel_ddr_dl0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_dl0_out_funnel_dl_center>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@6 {
|
||
|
|
reg = <6>;
|
||
|
|
funnel_dl_center_in_funnel_turing: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_turing_out_funnel_dl_center>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@7 {
|
||
|
|
reg = <7>;
|
||
|
|
funnel_dl_center_in_funnel_gfx_dl: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_gfx_dl_out_funnel_dl_center>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_dl_center_out_funnel_in1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in1_in_funnel_dl_center>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_qdss: tpda@10004000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
|
||
|
|
reg = <0x10004000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
|
||
|
|
qcom,tpda-atid = <65>;
|
||
|
|
coresight-name = "coresight-tpda-qdss";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
tpda_qdss_1_in_tpdm_spdm: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_spdm_out_tpda_qdss_1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
tpda_qdss_0_in_tpdm_dcc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_dcc_out_tpda_qdss_0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
|
||
|
|
port {
|
||
|
|
tpda_qdss_out_funnel_in0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in0_in_tpda_qdss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_in0: funnel@10041000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10041000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-in0";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_in0_in_snoc: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&snoc_out_funnel_in0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@7 {
|
||
|
|
reg = <7>;
|
||
|
|
funnel_in0_in_stm: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&stm_out_funnel_in0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@6 {
|
||
|
|
reg = <6>;
|
||
|
|
funnel_in0_in_tpda_qdss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_qdss_out_funnel_in0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_in0_out_funnel_qdss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_qdss_in_funnel_in0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_in1: funnel@10042000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10042000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-in1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_in1_in_funnel_dl_south: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_south_out_funnel_in1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_in1_in_funnel_dl_north: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_north_out_funnel_in1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
funnel_in1_in_funnel_apss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_apss_out_funnel_in1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@5 {
|
||
|
|
reg = <5>;
|
||
|
|
funnel_in1_in_funnel_modem: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_modem_out_funnel_in1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@6 {
|
||
|
|
reg = <6>;
|
||
|
|
funnel_in1_in_funnel_dl_center: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_dl_center_out_funnel_in1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_in1_out_funnel_qdss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_qdss_in_funnel_in1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_qdss: funnel@10045000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10045000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-qdss";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_qdss_in_funnel_in1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in1_out_funnel_qdss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_qdss_in_funnel_in0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_in0_out_funnel_qdss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_qdss_out_funnel_aoss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_aoss_in_funnel_qdss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tpda_aoss: tpda@10b08000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb969>;
|
||
|
|
|
||
|
|
reg = <0x10b08000 0x1000>;
|
||
|
|
reg-names = "tpda-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-tpda-aoss";
|
||
|
|
|
||
|
|
qcom,tpda-atid = <71>;
|
||
|
|
|
||
|
|
qcom,cmb-elem-size = <0 64>,
|
||
|
|
<1 64>,
|
||
|
|
<2 64>,
|
||
|
|
<3 64>;
|
||
|
|
|
||
|
|
qcom,dsb-elem-size = <4 32>;
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
tpda_aoss_0_in_tpdm_swao_prio_0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_swao_prio_0_out_tpda_aoss_0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
tpda_aoss_1_in_tpdm_swao_prio_1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_swao_prio_1_out_tpda_aoss_1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
tpda_aoss_2_in_tpdm_swao_prio_2: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_swao_prio_2_out_tpda_aoss_2>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
tpda_aoss_3_in_tpdm_swao_prio_3: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_swao_prio_3_out_tpda_aoss_3>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
tpda_aoss_4_in_tpdm_swao: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpdm_swao_out_tpda_aoss_4>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
|
||
|
|
port {
|
||
|
|
tpda_aoss_out_funnel_aoss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_aoss_in_tpda_aoss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_aoss: funnel@10b04000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb908>;
|
||
|
|
|
||
|
|
reg = <0x10b04000 0x1000>;
|
||
|
|
reg-names = "funnel-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-funnel-aoss";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
funnel_aoss_in_funnel_ddr_lpi: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_ddr_lpi_out_funnel_aoss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@5 {
|
||
|
|
reg = <5>;
|
||
|
|
funnel_aoss_in_funnel_lpass_lpi: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_lpass_lpi_out_funnel_aoss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@7 {
|
||
|
|
reg = <7>;
|
||
|
|
funnel_aoss_in_funnel_qdss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_qdss_out_funnel_aoss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@6 {
|
||
|
|
reg = <6>;
|
||
|
|
funnel_aoss_in_tpda_aoss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tpda_aoss_out_funnel_aoss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_aoss_out_tmc_etf: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tmc_etf_in_funnel_aoss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
dummy_eud: dummy_sink {
|
||
|
|
compatible = "qcom,coresight-dummy";
|
||
|
|
|
||
|
|
coresight-name = "coresight-eud";
|
||
|
|
|
||
|
|
qcom,dummy-sink;
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
eud_in_replicator_swao: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&replicator_swao_out_eud>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tmc_etf: tmc@10b05000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb961>;
|
||
|
|
reg = <0x10b05000 0x1000>;
|
||
|
|
reg-names = "tmc-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-tmc-etf";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
tmc_etf_in_funnel_aoss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_aoss_out_tmc_etf>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
tmc_etf_out_replicator_swao: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&replicator_swao_in_tmc_etf>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
replicator_swao: replicator@10b06000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb909>;
|
||
|
|
reg = <0x10b06000 0x1000>;
|
||
|
|
reg-names = "replicator-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-replicator_swao";
|
||
|
|
|
||
|
|
qcom,replicator-loses-context;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
replicator_swao_in_tmc_etf: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tmc_etf_out_replicator_swao>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
replicator_swao_out_replicator_qdss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&replicator_qdss_in_replicator_swao>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
replicator_swao_out_eud: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&eud_in_replicator_swao>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
replicator_qdss: replicator@10046000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb909>;
|
||
|
|
reg = <0x10046000 0x1000>;
|
||
|
|
reg-names = "replicator-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-replicator_qdss";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
replicator_qdss_in_replicator_swao: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&replicator_swao_out_replicator_qdss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
replicator_qdss_out_replicator_etr: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&replicator_etr_in_replicator_qdss>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
replicator_etr: replicator@1004e000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb909>;
|
||
|
|
reg = <0x1004e000 0x1000>;
|
||
|
|
reg-names = "replicator-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-replicator_etr";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
replicator_etr_in_replicator_qdss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&replicator_qdss_out_replicator_etr>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
replicator_etr_out_tmc_etr: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tmc_etr_in_replicator_etr>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
replicator_etr_out_tmc_etr1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&tmc_etr1_in_replicator_etr>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tmc_etr: tmc@10048000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb961>;
|
||
|
|
reg = <0x10048000 0x1000>,
|
||
|
|
<0x10064000 0x16000>;
|
||
|
|
reg-names = "tmc-base", "bam-base";
|
||
|
|
|
||
|
|
qcom,iommu-dma = "bypass";
|
||
|
|
iommus = <&apps_smmu 0x04c0 0x0020>;
|
||
|
|
|
||
|
|
qcom,iommu-dma-addr-pool = <0x0 0xffc00000>;
|
||
|
|
|
||
|
|
qcom,mem_support;
|
||
|
|
qcom,sw-usb;
|
||
|
|
dma-coherent;
|
||
|
|
coresight-name = "coresight-tmc-etr";
|
||
|
|
|
||
|
|
coresight-csr = <&csr>;
|
||
|
|
csr-atid-offset = <0xf8>;
|
||
|
|
csr-irqctrl-offset = <0x6c>;
|
||
|
|
byte-cntr-name = "byte-cntr";
|
||
|
|
byte-cntr-class-name = "coresight-tmc-etr-stream";
|
||
|
|
|
||
|
|
interrupts = <GIC_SPI 270 IRQ_TYPE_EDGE_RISING>;
|
||
|
|
interrupt-names = "byte-cntr-irq";
|
||
|
|
|
||
|
|
arm,scatter-gather;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
tmc_etr_in_replicator_etr: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&replicator_etr_out_tmc_etr>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tmc_etr1: tmc@1004f000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb961>;
|
||
|
|
reg = <0x1004f000 0x1000>;
|
||
|
|
reg-names = "tmc-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-tmc-etr1";
|
||
|
|
|
||
|
|
iommus = <&apps_smmu 0x0500 0>;
|
||
|
|
qcom,iommu-dma-addr-pool = <0x0 0xffc00000>;
|
||
|
|
dma-coherent;
|
||
|
|
|
||
|
|
qcom,mem_support;
|
||
|
|
coresight-csr = <&csr>;
|
||
|
|
csr-atid-offset = <0x108>;
|
||
|
|
csr-irqctrl-offset = <0x70>;
|
||
|
|
byte-cntr-name = "byte-cntr1";
|
||
|
|
byte-cntr-class-name = "coresight-tmc-etr1-stream";
|
||
|
|
|
||
|
|
interrupts = <GIC_SPI 269 IRQ_TYPE_EDGE_RISING>;
|
||
|
|
interrupt-names = "byte-cntr-irq";
|
||
|
|
|
||
|
|
arm,scatter-gather;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
port {
|
||
|
|
tmc_etr1_in_replicator_etr: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&replicator_etr_out_tmc_etr1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
csr: csr@10001000 {
|
||
|
|
compatible = "qcom,coresight-csr";
|
||
|
|
reg = <0x10001000 0x1000>;
|
||
|
|
reg-names = "csr-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-csr";
|
||
|
|
qcom,usb-bam-support;
|
||
|
|
qcom,hwctrl-set-support;
|
||
|
|
qcom,set-byte-cntr-support;
|
||
|
|
|
||
|
|
qcom,blk-size = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
swao_csr: csr@10b11000 {
|
||
|
|
compatible = "qcom,coresight-csr";
|
||
|
|
reg = <0x10b11000 0x1000>,
|
||
|
|
<0x10b110f8 0x50>;
|
||
|
|
reg-names = "csr-base", "msr-base";
|
||
|
|
|
||
|
|
coresight-name = "coresight-swao-csr";
|
||
|
|
qcom,timestamp-support;
|
||
|
|
qcom,msr-support;
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
qcom,blk-size = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qc_cti: cti@10010000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10010000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-qc_cti";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
qcom,cti-gpio-trigout = <16>;
|
||
|
|
pinctrl-names = "cti-trigout-pctrl";
|
||
|
|
pinctrl-0 = <&trigout_a>;
|
||
|
|
};
|
||
|
|
|
||
|
|
cti0: cti@10c2a000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10c2a000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cti0";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
dlmm_cti0: cti@10c09000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10c09000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-dlmm_cti0";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
ddr_dl_0_cti_0: cti@10d02000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10d02000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-ddr_dl_0_cti_0";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
ddr_ch02_dl_cti_0: cti@10d21000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10d21000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-ddr_ch02_dl_cti_0";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
ddr_ch13_dl_cti_0: cti@10d31000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10d31000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-ddr_ch13_dl_cti_0";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
lpass_dl_cti: cti@10845000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10845000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-lpass_dl_cti";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
gpu_isdb_cti: cti@10961000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10961000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-gpu_isdb_cti";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
gpu_cortex_m3: cti@10962000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10962000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-gpu_cortex_m3";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
gpu_dl: cti@10901000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10901000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-gpu_dl";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
iris_dl_cti: cti@10831000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10831000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-iris_dl_cti";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
mdss_dl_cti: cti@10c61000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10c61000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-mdss_dl_cti";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
turing_dl_cti_0: cti@10982000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10982000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-turing_dl_cti_0";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
turing_q6_cti: cti@1098b000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x1098b000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-turing_q6_cti";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
swao_cti: cti@10b00000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10b00000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-swao_cti";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
ddr_dl2_lpi: cti@10b21000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10b21000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-ddr_dl2_lpi";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
ddr_dl_1_cti_0: cti@10d08000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10d08000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-ddr_dl_1_cti_0";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
cortex_m3: cti@10b13000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10b13000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cortex_m3";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
lpass_lpi_cti1: cti@10b41000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10b41000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-lpass_lpi_cti1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
lpass_lpi_cti3: cti@10b51000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10b51000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-lpass_lpi_cti3";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
lpass_q6_cti: cti@10b4b000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10b4b000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-lpass_q6_cti";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
lpass_ssc_sdc_cti: cti@10b42000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10b42000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-lpass_ssc_sdc_cti";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
apss_cti0: cti@138e0000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x138e0000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-apss_cti0";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
apss_cti1: cti@138f0000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x138f0000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-apss_cti1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
apss_cti2: cti@13900000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x13900000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-apss_cti2";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
camera_dl: cti@10c15000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10c15000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-camera_dl";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
riscv_cti: cti@1382b000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x1382b000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-riscv_cti";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
riscv_sifive_cti: cti@1382e000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x1382e000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-riscv_sifive_cti";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
mss_q6_cti: cti@1080b000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x1080b000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-mss_q6_cti";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
mss_vq6_cti: cti@10813000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10813000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-mss_vq6_cti";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
tmess_cti_0: cti@10cc2000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10cc2000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-tmess_cti_0";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
tmess_cti_1: cti@10cc3000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10cc3000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-tmess_cti_1";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
tmess_cti_2: cti@10cc4000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10cc4000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-tmess_cti_2";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
tmess_cti_3: cti@10cc5000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10cc5000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-tmess_cti_3";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
tmess_cti_4: cti@10cc6000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10cc6000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-tmess_cti_4";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
tmess_cpu: cti@10cd1000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10cd1000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-tmess_cpu";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
modem_tp_cti: cti@10802000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10802000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-modem_tp_cti";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
apss_atb_cti: cti@13862000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x13862000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-apss_atb_cti";
|
||
|
|
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
ddrss_shrm2: cti@10d11000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10d11000 0x1000>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-ddrss_shrm2";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
cpu0: cti@12010000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x12010000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cpu0";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
trig-conns {
|
||
|
|
cpu = <&CPU0>;
|
||
|
|
arm,trig-in-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
arm,trig-out-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
spss_cti: cti@10881000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x10881000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-spss_cti";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
qcom,extended_cti;
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
cpu1: cti@12020000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x12020000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cpu1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
trig-conns {
|
||
|
|
cpu = <&CPU1>;
|
||
|
|
arm,trig-in-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
arm,trig-out-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
cpu2: cti@12030000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x12030000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cpu2";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
trig-conns {
|
||
|
|
cpu = <&CPU2>;
|
||
|
|
arm,trig-in-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
arm,trig-out-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
cpu3: cti@12040000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x12040000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cpu3";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
trig-conns {
|
||
|
|
cpu = <&CPU3>;
|
||
|
|
arm,trig-in-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
arm,trig-out-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
cpu4: cti@12050000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x12050000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cpu4";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
trig-conns {
|
||
|
|
cpu = <&CPU4>;
|
||
|
|
arm,trig-in-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
arm,trig-out-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
cpu5: cti@112060000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x12060000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cpu5";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
trig-conns {
|
||
|
|
cpu = <&CPU5>;
|
||
|
|
arm,trig-in-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
arm,trig-out-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
cpu6: cti@12070000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x12070000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cpu6";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
trig-conns {
|
||
|
|
cpu = <&CPU6>;
|
||
|
|
arm,trig-in-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
arm,trig-out-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
cpu7: cti@12080000 {
|
||
|
|
compatible = "arm,coresight-cti", "arm,primecell";
|
||
|
|
reg = <0x12080000 0x1000>;
|
||
|
|
|
||
|
|
arm,primecell-periphid = <0x000bb922>;
|
||
|
|
coresight-name = "coresight-cti-cpu7";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
|
||
|
|
trig-conns {
|
||
|
|
cpu = <&CPU7>;
|
||
|
|
arm,trig-in-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
arm,trig-out-sigs = <0 1 2 3 4 5 6 7 8 9>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
ipcb_tgu: tgu@10b0e000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb999>;
|
||
|
|
reg = <0x10b0e000 0x1000>;
|
||
|
|
reg-names = "tgu-base";
|
||
|
|
tgu-steps = <3>;
|
||
|
|
tgu-conditions = <4>;
|
||
|
|
tgu-regs = <4>;
|
||
|
|
tgu-timer-counters = <8>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tgu-ipcb";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
ete0 {
|
||
|
|
compatible = "arm,embedded-trace-extension";
|
||
|
|
cpu = <&CPU0>;
|
||
|
|
phy-cpu = <0>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-ete0";
|
||
|
|
qcom,skip-power-up;
|
||
|
|
atid = <1>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
ete0_out_funnel_ete: endpoint {
|
||
|
|
remote-endpoint = <&funnel_ete_in_ete0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
ete1 {
|
||
|
|
compatible = "arm,embedded-trace-extension";
|
||
|
|
cpu = <&CPU1>;
|
||
|
|
phy-cpu = <1>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-ete1";
|
||
|
|
qcom,skip-power-up;
|
||
|
|
atid = <2>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
ete1_out_funnel_ete: endpoint {
|
||
|
|
remote-endpoint = <&funnel_ete_in_ete1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
ete2 {
|
||
|
|
compatible = "arm,embedded-trace-extension";
|
||
|
|
cpu = <&CPU2>;
|
||
|
|
phy-cpu = <2>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-ete2";
|
||
|
|
qcom,skip-power-up;
|
||
|
|
atid = <3>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
ete2_out_funnel_ete: endpoint {
|
||
|
|
remote-endpoint = <&funnel_ete_in_ete2>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
ete3 {
|
||
|
|
compatible = "arm,embedded-trace-extension";
|
||
|
|
cpu = <&CPU3>;
|
||
|
|
phy-cpu = <3>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-ete3";
|
||
|
|
qcom,skip-power-up;
|
||
|
|
atid = <4>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
ete3_out_funnel_ete: endpoint {
|
||
|
|
remote-endpoint = <&funnel_ete_in_ete3>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
ete4 {
|
||
|
|
compatible = "arm,embedded-trace-extension";
|
||
|
|
cpu = <&CPU4>;
|
||
|
|
phy-cpu = <4>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-ete4";
|
||
|
|
qcom,skip-power-up;
|
||
|
|
atid = <5>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
ete4_out_funnel_ete: endpoint {
|
||
|
|
remote-endpoint = <&funnel_ete_in_ete4>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
ete5 {
|
||
|
|
compatible = "arm,embedded-trace-extension";
|
||
|
|
cpu = <&CPU5>;
|
||
|
|
phy-cpu = <5>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-ete5";
|
||
|
|
qcom,skip-power-up;
|
||
|
|
atid = <6>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
ete5_out_funnel_ete: endpoint {
|
||
|
|
remote-endpoint = <&funnel_ete_in_ete5>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
ete6 {
|
||
|
|
compatible = "arm,embedded-trace-extension";
|
||
|
|
cpu = <&CPU6>;
|
||
|
|
phy-cpu = <6>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-ete6";
|
||
|
|
qcom,skip-power-up;
|
||
|
|
atid = <7>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
ete6_out_funnel_ete: endpoint {
|
||
|
|
remote-endpoint = <&funnel_ete_in_ete6>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
ete7 {
|
||
|
|
compatible = "arm,embedded-trace-extension";
|
||
|
|
cpu = <&CPU7>;
|
||
|
|
phy-cpu = <7>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-ete7";
|
||
|
|
qcom,skip-power-up;
|
||
|
|
atid = <8>;
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
ete7_out_funnel_ete: endpoint {
|
||
|
|
remote-endpoint = <&funnel_ete_in_ete7>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
funnel_ete {
|
||
|
|
compatible = "arm,coresight-static-funnel";
|
||
|
|
coresight-name = "coresight-funnel-ete";
|
||
|
|
|
||
|
|
out-ports {
|
||
|
|
port {
|
||
|
|
funnel_ete_out_funnel_apss: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&funnel_apss_in_funnel_ete>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
in-ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
funnel_ete_in_ete0: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&ete0_out_funnel_ete>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
funnel_ete_in_ete1: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&ete1_out_funnel_ete>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@2 {
|
||
|
|
reg = <2>;
|
||
|
|
funnel_ete_in_ete2: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&ete2_out_funnel_ete>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@3 {
|
||
|
|
reg = <3>;
|
||
|
|
funnel_ete_in_ete3: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&ete3_out_funnel_ete>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@4 {
|
||
|
|
reg = <4>;
|
||
|
|
funnel_ete_in_ete4: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&ete4_out_funnel_ete>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@5 {
|
||
|
|
reg = <5>;
|
||
|
|
funnel_ete_in_ete5: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&ete5_out_funnel_ete>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@6 {
|
||
|
|
reg = <6>;
|
||
|
|
funnel_ete_in_ete6: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&ete6_out_funnel_ete>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@7 {
|
||
|
|
reg = <7>;
|
||
|
|
funnel_ete_in_ete7: endpoint {
|
||
|
|
remote-endpoint =
|
||
|
|
<&ete7_out_funnel_ete>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
spmi_tgu0: tgu@10b0f000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb999>;
|
||
|
|
|
||
|
|
reg = <0x10b0f000 0x1000>;
|
||
|
|
reg-names = "tgu-base";
|
||
|
|
|
||
|
|
tgu-steps = <3>;
|
||
|
|
tgu-conditions = <4>;
|
||
|
|
tgu-regs = <9>;
|
||
|
|
tgu-timer-counters = <8>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tgu-spmi0";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
|
||
|
|
spmi_tgu1: tgu@10b10000 {
|
||
|
|
compatible = "arm,primecell";
|
||
|
|
arm,primecell-periphid = <0x000bb999>;
|
||
|
|
|
||
|
|
reg = <0x10b10000 0x1000>;
|
||
|
|
reg-names = "tgu-base";
|
||
|
|
|
||
|
|
tgu-steps = <3>;
|
||
|
|
tgu-conditions = <4>;
|
||
|
|
tgu-regs = <9>;
|
||
|
|
tgu-timer-counters = <8>;
|
||
|
|
|
||
|
|
coresight-name = "coresight-tgu-spmi1";
|
||
|
|
|
||
|
|
clocks = <&aoss_qmp>;
|
||
|
|
clock-names = "apb_pclk";
|
||
|
|
};
|
||
|
|
};
|