666 lines
14 KiB
Text
666 lines
14 KiB
Text
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,gcc-lemans.h>
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#include <dt-bindings/arm/msm/qcom_dma_heap_dt_constants.h>
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/ {
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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qcom,msm-id = <532 0x10000>, <533 0x10000>, <534 0x10000>, <619 0x10000>, <532 0x20000>, <533 0x20000>, <534 0x20000>, <619 0x20000>;
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interrupt-parent = <&intc>;
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chosen {
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bootargs = "nokaslr log_buf_len=1M console=hvc0 loglevel=8 androidboot.first_stage_console=1 androidboot.hardware=qcom androidboot.slot_suffix=_a androidboot.selinux=enforcing";
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};
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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system_cma: linux,cma {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x0 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x2000000>;
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linux,cma-default;
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};
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qseecom_mem: qseecom_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x1400000>;
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};
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qseecom_ta_mem: qseecom_ta_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x1000000>;
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};
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};
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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CPU0: cpu@0 {
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compatible = "arm,armv8";
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reg = <0x0 0x0>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN>;
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};
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CPU1: cpu@100 {
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compatible = "arm,armv8";
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reg = <0x0 0x100>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN>;
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};
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CPU2: cpu@200 {
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compatible = "arm,armv8";
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reg = <0x0 0x200>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN>;
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};
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CPU3: cpu@300 {
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compatible = "arm,armv8";
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reg = <0x0 0x300>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN>;
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};
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CPU4: cpu@10000 {
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compatible = "arm,armv8";
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reg = <0x0 0x10000>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN>;
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};
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CPU5: cpu@10100 {
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compatible = "arm,armv8";
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reg = <0x0 0x10100>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN>;
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};
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CPU6: cpu@10200 {
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compatible = "arm,armv8";
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reg = <0x0 0x10200>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN>;
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};
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CPU7: cpu@10300 {
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compatible = "arm,armv8";
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reg = <0x0 0x10300>;
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device_type = "cpu";
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enable-method = "psci";
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cpu-idle-states = <&CPU_PWR_DWN>;
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};
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&CPU0>;
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};
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core1 {
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cpu = <&CPU1>;
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};
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core2 {
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cpu = <&CPU2>;
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};
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core3 {
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cpu = <&CPU3>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&CPU4>;
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};
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core1 {
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cpu = <&CPU5>;
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};
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core2 {
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cpu = <&CPU6>;
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};
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core3 {
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cpu = <&CPU7>;
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};
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};
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};
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};
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idle-states {
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CPU_PWR_DWN: c4 { /* C4 */
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compatible = "arm,idle-state";
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idle-state-name = "rail-pc";
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entry-latency-us = <702>;
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exit-latency-us = <1061>;
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min-residency-us = <4488>;
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arm,psci-suspend-param = <0x40000004>;
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local-timer-stop;
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};
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};
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qcom,vm-config {
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compatible = "qcom,vm-1.0";
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vm-type = "aarch64-guest";
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boot-config = "fdt,unified";
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os-type = "linux";
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kernel-entry-segment = "kernel";
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kernel-entry-offset = <0x0 0x0>;
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vendor = "QTI";
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image-name = "qcom,autoghgvm";
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qcom,pasid = <0x0 0x2c>;
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qcom,qtee-config-info = "p=3,57,77,78,7C,8F,97,159,199,47E,7F1;o=100;";
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qcom,secdomain-ids = <52>;
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qcom,primary-vm-index = <0>;
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/* vm-attrs = "crash-fatal"; */
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/* Pass through regions */
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/* TLMM region */
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/* QUPv3 Tile 1 read-only region */
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/* QUPv3 Tile 2 read-only region */
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/* QUPv3 SE17 region */
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/* QRNG region */
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iomemory-ranges = <0x0 0xF000000 0x0 0xF000000 0x0 0x1000000 0x0
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0x0 0xAC0000 0x0 0xAC0000 0x0 0x6000 0x1
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0x0 0x8C0000 0x0 0x8C0000 0x0 0x6000 0x1
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0x0 0x88C000 0x0 0x88C000 0x0 0x4000 0x0
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0x0 0x10dc000 0x0 0x10dc000 0x0 0x1000 0x0
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>;
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/* Pass through IRQs */
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/* QUPv3 SE17 GIC IRQ */
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gic-irq-ranges = <617 617>;
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memory {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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/*
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* The IPA of the Guest regions is placed as IPA=PA.
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*/
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is-direct;
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};
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segments {
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ramdisk = <2>;
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};
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vcpus {
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config = "/cpus";
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affinity = "static";
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affinity-map = <0x7 0x6 0x5 0x4 0x3 0x2 0x1 0x0>;
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sched-priority = <0>; /* relative to PVM */
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sched-timeslice = <5000>; /* in ms */
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};
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interrupts {
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config = &intc;
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};
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vdevices {
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generate = "/hypervisor";
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rm-rpc {
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vdevice-type = "rm-rpc";
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generate = "/hypervisor/qcom,resource-mgr";
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console-dev;
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message-size = <0x000000f0>;
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queue-depth = <0x00000008>;
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qcom,label = <0x1>;
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};
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virtio-mmio@0 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x1>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x0>;
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memory {
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qcom,label = <0x10>; /* misc.img */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@1 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x1>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x4000>;
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memory {
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qcom,label = <0x11>; /* persist.img */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@2 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x1>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x8000>;
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memory {
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qcom,label = <0x15>; /* metadate.img */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@3 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x1>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0xC000>;
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memory {
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qcom,label = <0x16>; /* userdata.img */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@4 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x1>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x10000>;
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memory {
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qcom,label = <0x17>; /* super.img */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@5 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x3>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x14000>;
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memory {
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qcom,label = <0x13>; /* Net device */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@6 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x4>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x20000>;
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memory {
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qcom,label = <0x14>; /* HAB device 0 */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@7 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x4>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x40000>;
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memory {
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qcom,label = <0x18>; /* HAB device 1 */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@8 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0x8>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0x60000>;
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memory {
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qcom,label = <0x19>; /* HAB device 2 */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@9 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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vqs-num = <0xA>;
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push-compatible = "virtio,mmio";
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dma-coherent;
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dma_base = <0x0 0xE0000>;
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memory {
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qcom,label = <0x1a>; /* HAB device 3 */
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#address-cells = <0x2>;
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allocate-base;
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};
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};
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virtio-mmio@10 {
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vdevice-type = "virtio-mmio";
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generate = "/virtio-mmio";
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peer-default;
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|
|
vqs-num = <0x6>;
|
||
|
|
push-compatible = "virtio,mmio";
|
||
|
|
dma-coherent;
|
||
|
|
dma_base = <0x0 0x180000>;
|
||
|
|
memory {
|
||
|
|
qcom,label = <0x1b>; /* HAB device 4 */
|
||
|
|
#address-cells = <0x2>;
|
||
|
|
allocate-base;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
virtio-mmio@11 {
|
||
|
|
vdevice-type = "virtio-mmio";
|
||
|
|
generate = "/virtio-mmio";
|
||
|
|
peer-default;
|
||
|
|
vqs-num = <0x6>;
|
||
|
|
push-compatible = "virtio,mmio";
|
||
|
|
dma-coherent;
|
||
|
|
dma_base = <0x0 0x1E0000>;
|
||
|
|
memory {
|
||
|
|
qcom,label = <0x1c>; /* HAB device 5 */
|
||
|
|
#address-cells = <0x2>;
|
||
|
|
allocate-base;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
virtio-mmio@12 {
|
||
|
|
vdevice-type = "virtio-mmio";
|
||
|
|
generate = "/virtio-mmio";
|
||
|
|
virtio,device-type = <18>; /* VirtIO Input ID */
|
||
|
|
peer-default;
|
||
|
|
vqs-num = <0x2>;
|
||
|
|
push-compatible = "virtio,mmio";
|
||
|
|
dma-coherent;
|
||
|
|
dma_base = <0x0 0x240000>;
|
||
|
|
memory {
|
||
|
|
qcom,label = <0x1d>; /* Input device 0 */
|
||
|
|
#address-cells = <0x2>;
|
||
|
|
allocate-base;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
virtio-mmio@13 {
|
||
|
|
vdevice-type = "virtio-mmio";
|
||
|
|
generate = "/virtio-mmio";
|
||
|
|
peer-default;
|
||
|
|
vqs-num = <0x2>;
|
||
|
|
push-compatible = "virtio,mmio";
|
||
|
|
dma-coherent;
|
||
|
|
dma_base = <0x0 0x248000>;
|
||
|
|
memory {
|
||
|
|
qcom,label = <0x1e>; /* SCMI device */
|
||
|
|
#address-cells = <0x2>;
|
||
|
|
allocate-base;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
virtio-mmio@14 {
|
||
|
|
vdevice-type = "virtio-mmio";
|
||
|
|
generate = "/virtio-mmio";
|
||
|
|
peer-default;
|
||
|
|
vqs-num = <0x2>;
|
||
|
|
push-compatible = "virtio,mmio";
|
||
|
|
dma-coherent;
|
||
|
|
dma_base = <0x0 0x250000>;
|
||
|
|
memory {
|
||
|
|
qcom,label = <0x1f>; /* Console device */
|
||
|
|
#address-cells = <0x2>;
|
||
|
|
allocate-base;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
virtio-mmio@15 {
|
||
|
|
vdevice-type = "virtio-mmio";
|
||
|
|
generate = "/virtio-mmio";
|
||
|
|
virtio,device-type = <18>; /* VirtIO Input ID */
|
||
|
|
peer-default;
|
||
|
|
vqs-num = <0x2>;
|
||
|
|
push-compatible = "virtio,mmio";
|
||
|
|
dma-coherent;
|
||
|
|
dma_base = <0x0 0x258000>;
|
||
|
|
memory {
|
||
|
|
qcom,label = <0x20>; /* Input device 1 */
|
||
|
|
#address-cells = <0x2>;
|
||
|
|
allocate-base;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
virtio-mmio@16 {
|
||
|
|
vdevice-type = "virtio-mmio";
|
||
|
|
generate = "/virtio-mmio";
|
||
|
|
peer-default;
|
||
|
|
vqs-num = <0x2>;
|
||
|
|
push-compatible = "virtio,mmio";
|
||
|
|
dma-coherent;
|
||
|
|
dma_base = <0x0 0x260000>;
|
||
|
|
memory {
|
||
|
|
qcom,label = <0x21>; /* Reserved devices */
|
||
|
|
#address-cells = <0x2>;
|
||
|
|
allocate-base;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
swiotlb-shm {
|
||
|
|
vdevice-type = "shm";
|
||
|
|
generate = "/swiotlb";
|
||
|
|
push-compatible = "swiotlb";
|
||
|
|
peer-default;
|
||
|
|
dma_base = <0x0 0x300000>;
|
||
|
|
memory {
|
||
|
|
qcom,label = <0x12>;
|
||
|
|
#address-cells = <0x2>;
|
||
|
|
allocate-base;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
vsmmu@15000000 {
|
||
|
|
vdevice-type = "vsmmu-v2";
|
||
|
|
smmu-handle = <0x15000000>;
|
||
|
|
num-cbs = <0x4>;
|
||
|
|
num-smrs = <0x4>;
|
||
|
|
patch = "/soc/apps-smmu@15000000";
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
firmware: firmware {
|
||
|
|
scm {
|
||
|
|
compatible = "qcom,scm";
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom_smcinvoke {
|
||
|
|
compatible = "qcom,smcinvoke";
|
||
|
|
};
|
||
|
|
|
||
|
|
android {
|
||
|
|
compatible = "android,firmware";
|
||
|
|
boot_devices = "70001000.virtio-mmio,70002000.virtio-mmio,70003000.virtio-mmio,70004000.virtio-mmio,70005000.virtio-mmio";
|
||
|
|
|
||
|
|
vbmeta {
|
||
|
|
compatible = "android,vbmeta";
|
||
|
|
parts = "vbmeta,system,vendor";
|
||
|
|
};
|
||
|
|
|
||
|
|
fstab {
|
||
|
|
compatible = "android,fstab";
|
||
|
|
vendor {
|
||
|
|
compatible = "android,vendor";
|
||
|
|
dev="/dev/block/platform/vdevs/1c0f0000.virtio_blk/vdc";
|
||
|
|
type = "ext4";
|
||
|
|
mnt_flags = "ro,barrier=1,discard";
|
||
|
|
fsmgr_flags = "wait";
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
soc: soc { };
|
||
|
|
};
|
||
|
|
|
||
|
|
&soc {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
ranges = <0 0 0 0xffffffff>;
|
||
|
|
compatible = "simple-bus";
|
||
|
|
|
||
|
|
gcc: clock-controller@100000 {
|
||
|
|
compatible = "qcom,dummycc";
|
||
|
|
clock-output-names = "gcc_clocks";
|
||
|
|
#clock-cells = <1>;
|
||
|
|
#reset-cells = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
psci {
|
||
|
|
compatible = "arm,psci-1.0";
|
||
|
|
method = "smc";
|
||
|
|
};
|
||
|
|
|
||
|
|
intc: interrupt-controller@17a00000 {
|
||
|
|
compatible = "arm,gic-v3";
|
||
|
|
interrupt-controller;
|
||
|
|
#interrupt-cells = <0x3>;
|
||
|
|
#redistributor-regions = <1>;
|
||
|
|
redistributor-stride = <0x0 0x20000>;
|
||
|
|
reg = <0x17a00000 0x10000>, /* GICD */
|
||
|
|
<0x17a60000 0x100000>; /* GICR * 8 */
|
||
|
|
};
|
||
|
|
|
||
|
|
arch_timer: timer {
|
||
|
|
compatible = "arm,armv8-timer";
|
||
|
|
always-on;
|
||
|
|
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
||
|
|
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
||
|
|
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
||
|
|
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
|
||
|
|
clock-frequency = <19200000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom_dma_heaps: qcom,dma-heaps {
|
||
|
|
compatible = "qcom,dma-heaps";
|
||
|
|
|
||
|
|
qcom,qseecom {
|
||
|
|
qcom,dma-heap-name = "qcom,qseecom";
|
||
|
|
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
|
||
|
|
memory-region = <&qseecom_mem>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom,qseecom_ta {
|
||
|
|
qcom,dma-heap-name = "qcom,qseecom-ta";
|
||
|
|
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
|
||
|
|
memory-region = <&qseecom_ta_mem>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
tlmm: pinctrl@f000000 {
|
||
|
|
compatible = "qcom,lemans-pinctrl";
|
||
|
|
reg = <0xf000000 0x1000000>;
|
||
|
|
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
gpio-controller;
|
||
|
|
#gpio-cells = <2>;
|
||
|
|
interrupt-controller;
|
||
|
|
#interrupt-cells = <2>;
|
||
|
|
};
|
||
|
|
|
||
|
|
qcom_rng_ee3: qrng@10dc000 {
|
||
|
|
compatible = "qcom,msm-rng";
|
||
|
|
reg = <0x10dc000 0x1000>;
|
||
|
|
qcom,no-qrng-config;
|
||
|
|
qcom,no-clock-support;
|
||
|
|
status = "ok";
|
||
|
|
};
|
||
|
|
|
||
|
|
qtee_shmbridge {
|
||
|
|
compatible = "qcom,tee-shared-memory-bridge";
|
||
|
|
//qcom,support-hypervisor;
|
||
|
|
qcom,disable-shmbridge-support;
|
||
|
|
};
|
||
|
|
|
||
|
|
apps_smmu: apps-smmu@15000000 {
|
||
|
|
/*
|
||
|
|
* reg, #global-interrupts & interrupts properties will
|
||
|
|
* be added dynamically by bootloader.
|
||
|
|
*/
|
||
|
|
compatible = "qcom,qsmmu-v500", "qcom,virt-smmu";
|
||
|
|
#iommu-cells = <2>;
|
||
|
|
qcom,use-3-lvl-tables;
|
||
|
|
dma-coherent;
|
||
|
|
};
|
||
|
|
|
||
|
|
dma_dev@0x0 {
|
||
|
|
compatible = "qcom,iommu-dma";
|
||
|
|
memory-region = <&system_cma>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
/ {
|
||
|
|
rename_devices: rename_devices {
|
||
|
|
compatible = "qcom,rename-devices";
|
||
|
|
rename_blk: rename_blk {
|
||
|
|
device-type = "block";
|
||
|
|
actual-dev = "vda", "vdb", "vdc", "vdd", "vde";
|
||
|
|
rename-dev = "super", "userdata", "metadata", "persist", "misc";
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
#include "lemans-pinctrl.dtsi"
|
||
|
|
#include "lemans-vm-qupv3.dtsi"
|
||
|
|
|
||
|
|
&qupv3_1 {
|
||
|
|
iommus = <&apps_smmu 0x458 0x0>;
|
||
|
|
qcom,iommu-dma = "default";
|
||
|
|
};
|
||
|
|
|
||
|
|
&qupv3_2 {
|
||
|
|
iommus = <&apps_smmu 0x5b8 0x0>;
|
||
|
|
qcom,iommu-dma = "default";
|
||
|
|
};
|