Rtwo/kernel/motorola/sm8550-devicetrees/qcom/wlan/sun-peach-cnss-v8.dtsi

#include <dt-bindings/interconnect/qcom,sun.h>

&tlmm {
	cnss_pins {
		cnss_wlan_en_active: cnss_wlan_en_active {
			mux {
				pins = "gpio16";
				function = "gpio";
			};

			config {
				pins = "gpio16";
				drive-strength = <16>;
				output-high;
				bias-pull-up;
			};
		};

		cnss_wlan_en_sleep: cnss_wlan_en_sleep {
			mux {
				pins = "gpio16";
				function = "gpio";
			};

			config {
				pins = "gpio16";
				drive-strength = <2>;
				output-low;
				bias-pull-down;
			};
		};
	};
};

&reserved_memory {
	cnss_wlan_mem: cnss_wlan_region {
		compatible = "shared-dma-pool";
		alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
		reusable;
		alignment = <0x0 0x400000>;
		size = <0x0 0x2000000>;
	};
};

&soc {
	wlan_peach: qcom,cnss-peach@b0000000 {
		compatible = "qcom,cnss-peach";
		reg = <0xb0000000 0x10000>;
		reg-names = "smmu_iova_ipa";
		qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>;

		supported-ids = <0x110E>;
		wlan-en-gpio = <&tlmm 16 0>;
		qcom,bt-en-gpio = <&pm8550vs_f 3 0>;
		qcom,sw-ctrl-gpio = <&tlmm 18 0>;
		/* List of GPIOs to be setup for interrupt wakeup capable */
		mpm_wake_set_gpios = <18 19>;
		pinctrl-names = "wlan_en_active", "wlan_en_sleep";
		pinctrl-0 = <&cnss_wlan_en_active>;
		pinctrl-1 = <&cnss_wlan_en_sleep>;
		qcom,wlan;
		qcom,wlan-rc-num = <0>;
		qcom,wlan-ramdump-dynamic = <0x780000>;
		cnss-enable-self-recovery;
		use-pm-domain;
		qcom,same-dt-multi-dev;
		/* For AOP communication, use direct QMP instead of mailbox */
		qcom,qmp = <&aoss_qmp>;
		msix-match-addr = <0x3000>;

		vdd-wlan-io-supply = <&L3F>;
		qcom,vdd-wlan-io-config = <1800000 1800000 0 0 1>;
		vdd-wlan-io12-supply = <&L2F>;
		qcom,vdd-wlan-io12-config = <1200000 1200000 0 0 1>;
		vdd-wlan-aon-supply = <&S4D>;
		qcom,vdd-wlan-aon-config = <876000 876000 0 0 1>;
		vdd-wlan-dig-supply = <&S5F>;
		qcom,vdd-wlan-dig-config = <876000 876000 0 0 1>;
		vdd-wlan-rfa1-supply = <&S3G>;
		qcom,vdd-wlan-rfa1-config = <1860000 1860000 0 0 1>;
		vdd-wlan-rfa2-supply = <&S7I>;
		qcom,vdd-wlan-rfa2-config = <1312000 1312000 0 0 1>;
		vdd-wlan-ant-share-supply = <&L6K>;
		qcom,vdd-wlan-ant-share-config = <1800000 1800000 0 0 1>;

		qcom,vreg_pdc_map =
			"s5f", "rf",
			"s4d", "bb",
			"s3g", "rf",
			"s7i", "rf";

		qcom,pmu_vreg_map =
			"VDDD_AON_0P9", "s5f",
			"VDDA_RFA_1P9", "s3g",
			"VDDA_RFA_1P3", "s7i",
			"VDDA_RFA_0P9", "s5f",
			"VDDD_WLMX_0P9", "s4d",
			"VDDD_WLCX_0P9", "s5f",
			"VDDD_BTCX_0P9", "s5f",
			"VDDD_BTCMX_0P9", "s5f",
			"VDDA_PCIE_1P2", "s7i",
			"VDDA_PCIE_0P9", "s7i";

		qcom,pdc_init_table =
		"{class: wlan_pdc, ss: rf, res: s5f.v, upval: 876}",
		"{class: wlan_pdc, ss: rf, res: s5f.v, dwnval: 660}",
		"{class: wlan_pdc, ss: bb, res: s4d.v, upval: 876}",
		"{class: wlan_pdc, ss: bb, res: s4d.v, dwnval: 560}",
		"{class: wlan_pdc, ss: rf, res: s3g.v, upval: 1860}",
		"{class: wlan_pdc, ss: rf, res: s3g.v, dwnval: 0}",
		"{class: wlan_pdc, ss: rf, res: s7i.v, upval: 1312}",
		"{class: wlan_pdc, ss: rf, res: s7i.v, dwnval: 1244}";
	};
};

&pcie0_rp {
	#address-cells = <5>;
	#size-cells = <0>;

	cnss_pci0: cnss_pci0 {
		reg = <0 0 0 0 0>;
		qcom,iommu-group = <&cnss_pci_iommu_group0>;
		memory-region = <&cnss_wlan_mem>;

		#address-cells = <1>;
		#size-cells = <1>;

		cnss_pci_iommu_group0: cnss_pci_iommu_group0 {
			qcom,iommu-msi-size = <0x1000>;
			qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
			qcom,iommu-geometry = <0xa0000000 0x10010000>;
			qcom,iommu-dma = "fastmap";
			qcom,iommu-pagetable = "coherent";
			qcom,iommu-faults = "stall-disable", "HUPCF",
					    "non-fatal";
		};
	};
};