37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_LEMANS_H
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#define _DT_BINDINGS_CLK_QCOM_GPU_CC_LEMANS_H
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/* GPU_CC clocks */
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#define GPU_CC_PLL0 0
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#define GPU_CC_PLL1 1
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#define GPU_CC_AHB_CLK 2
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#define GPU_CC_CB_CLK 3
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#define GPU_CC_CRC_AHB_CLK 4
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#define GPU_CC_CX_FF_CLK 5
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#define GPU_CC_CX_GMU_CLK 6
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#define GPU_CC_CX_SNOC_DVM_CLK 7
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#define GPU_CC_CXO_AON_CLK 8
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#define GPU_CC_CXO_CLK 9
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#define GPU_CC_DEMET_CLK 10
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#define GPU_CC_DEMET_DIV_CLK_SRC 11
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#define GPU_CC_FF_CLK_SRC 12
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#define GPU_CC_GMU_CLK_SRC 13
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#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 14
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#define GPU_CC_HUB_AHB_DIV_CLK_SRC 15
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#define GPU_CC_HUB_AON_CLK 16
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#define GPU_CC_HUB_CLK_SRC 17
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#define GPU_CC_HUB_CX_INT_CLK 18
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#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 19
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#define GPU_CC_MEMNOC_GFX_CLK 20
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#define GPU_CC_SLEEP_CLK 21
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#define GPU_CC_XO_CLK_SRC 22
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#define GPU_CC_CX_ACCU_SHIFT_CLK 23
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#define GPU_CC_GX_ACCU_SHIFT_CLK 24
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#endif
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