* MSM PCIe MSI controller ========= Main node ========= - compatible: Usage: required Value type: Definition: Value to identify this is a MSM PCIe MSI controller - msi-controller: Usage: required Value type: Definition: Indicates that this is a MSM PCIe MSI controller node - reg: Usage: required Value type: Definition: Physical QGIC address (0x17a00040), MSI message address - interrupt-parent: Usage: required Value type: Definition: Phandle of the interrupt controller that services interrupts for this device - interrupts: Usage: required Value type: Definition: Array of tuples which describe interrupt lines for PCIe MSI -qcom,snps: Usage: optional Value type: Definition: Set if interrupt controller is Synopsys instead of QGIC ======= Example ======= pcie0_msi: qcom,pcie0_msi { compatible = "qcom,pci-msi"; msi-controller; reg = <0x17a10040 0x0 0x0 0x0 0xff>; interrupt-parent = <&intc>; interrupts = , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , ; };