%YAML 1.2 --- $id: http://devicetree.org/schemas/bindings/pinctrl/qcom,lemans-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Technologies, Inc. LEMANS TLMM block description: | This binding describes the Top Level Mode Multiplexer block found in the Lemans platform. properties: compatible: Usage: required Value type: Definition: must be "qcom,lemans-pinctrl" reg: Usage: required Value type: Definition: the base address and size of the TLMM register space. interrupts: Usage: required Value type: Definition: should specify the TLMM summary IRQ. interrupt-controller: Usage: required Value type: Definition: identifies this node as an interrupt controller #interrupt-cells: Usage: required Value type: Definition: must be 2. Specifying the pin number and flags, as defined in gpio-controller: Usage: required Value type: Definition: identifies this node as a gpio controller #gpio-cells: Usage: required Value type: Definition: must be 2. Specifying the pin number and flags, as defined in wakeup-parent: Usage: optional Value type: Definition: A phandle to the wakeup interrupt controller for the SoC. Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for a general description of GPIO and interrupt bindings. Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices, including the meaning of the phrase "pin configuration node". The pin configuration nodes act as a container for an arbitrary number of subnodes. Each of these subnodes represents some desired configuration for a pin, a group, or a list of pins or groups. This configuration can include the mux function to select on those pin(s)/group(s), and various pin configuration parameters, such as pull-up, drive strength, etc. PIN CONFIGURATION NODES: The name of each subnode is not important; all subnodes should be enumerated and processed purely based on their content. Each subnode only affects those parameters that are explicitly listed. In other words, a subnode that lists a mux function but no pin configuration parameters implies no information about any pin configuration parameters. Similarly, a pin subnode that describes a pullup parameter implies no information about e.g. the mux function. The following generic properties as defined in pinctrl-bindings.txt are valid to specify in a pin configuration subnode: pins: Usage: required Value type: Definition: List of gpio pins affected by the properties specified in this subnode. Valid pins: gpio0-gpio148 Supports mux, bias and drive-strength sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd, sdc2_data sdc1_rclk Supports bias and drive-strength function: Usage: required Value type: Definition: Specify the alternative function to be configured for the specified pins. Functions are only valid for gpio pins. bias-disable: Usage: optional Value type: Definition: The specified pins should be configured as no pull. bias-pull-down: Usage: optional Value type: Definition: The specified pins should be configured as pull down. bias-pull-up: Usage: optional Value type: Definition: The specified pins should be configured as pull up. output-high: Usage: optional Value type: Definition: The specified pins are configured in output mode, driven high. Not valid for sdc pins. output-low: Usage: optional Value type: Definition: The specified pins are configured in output mode, driven low. Not valid for sdc pins. drive-strength: Usage: optional Value type: Definition: Selects the drive strength for the specified pins, in mA. Valid values: 2, 4, 6, 8, 10, 12, 14 and 16 examples: - | tlmm: pinctrl@03000000 { compatible = "qcom,lemans-pinctrl"; reg = <0x03000000 0xdc2000>; interrupts = <0 208 0>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; wakeup-parent = <&pdc>; };