&pcie1_rp {
	#address-cells = <5>;
	#size-cells = <0>;

	mhi_0: qcom,mhi@0 {
		reg = <0 0 0 0 0 >;

		status = "disabled";

		pci-ids = "17cb:0111";

		/* controller specific configuration */
		qcom,iommu-group = <&mhi_0_iommu_group>;


		/* mhi bus specific settings */
		mhi,max-channels = <2>;
		mhi,timeout = <2000>;
		mhi,name = "sxr";

		#address-cells = <1>;
		#size-cells = <1>;

		interconnects = <&pcie_noc MASTER_PCIE_1 &mc_virt SLAVE_EBI1>;
		interconnect-names = "pcie_to_ddr";

		qcom,mhi-bus-bw-cfg = <0 0>, /* no vote */
				<250000 0>, /* avg bw / AB: 2 GBps, peak bw / IB: no vote */
				<500000 0>, /* avg bw / AB: 4 GBps, peak bw / IB: no vote */
				<1000000 0>, /* avg bw / AB: 8 GBps, peak bw / IB: no vote */
				<2000000 0>; /* avg bw / AB: 16 GBps, peak bw / IB: no vote */

		mhi_0_iommu_group: mhi_0_iommu_group {
			qcom,iommu-dma-addr-pool = <0x20000000 0x1fffffff>;
			qcom,iommu-dma = "atomic";
			qcom,iommu-pagetable = "coherent";
		};
	};
};