#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/clock/qcom,gcc-kalama.h>
#include <dt-bindings/phy/qcom,usb3-4nm-qmp-combo.h>

#include "kalama-pmic-overlay.dtsi"
#include "kalama-thermal-overlay.dtsi"

&sdhc_2 {
	status = "ok";
	vdd-supply = <&pm_humu_l9>;
	qcom,vdd-voltage-level = <2950000 2960000>;
	qcom,vdd-current-level = <0 800000>;

	vdd-io-supply = <&pm_humu_l8>;
	qcom,vdd-io-voltage-level = <1800000 2960000>;
	qcom,vdd-io-current-level = <0 5600>;

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&sdc2_on>, <&sd_card_det_default>;
	pinctrl-1 = <&sdc2_off>, <&sd_card_det_default>;

	cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_LOW>;

	resets = <&gcc GCC_SDCC2_BCR>;
	reset-names = "core_reset";

	qcom,iommu-dma = "fastmap";
	qcom,uses_level_shifter;
};

&tlmm {
	/* 32 33 qupv3_se1_i2c for sx1508q */
	/* 36 - 39 qupv3_se2_spi for tdk temp sensor */
	qcom,gpios-reserved = <34 35>;

	pice0_usb_power_1p05_default: pice0_usb_power_1p05_default {
		mux {
			pins = "gpio179";
			function = "gpio";
		};

		config {
			pins = "gpio179";
			drive-strength = <2>;
			output-high;
			bias-pull-up;
		};
	};

	pice0_usb_power_3p3_default: pice0_usb_power_3p3_default {
		mux {
			pins = "gpio13";
			function = "gpio";
		};

		config {
			pins = "gpio13";
			drive-strength = <2>;
			output-high;
			bias-pull-up;
		};
	};

	pice0_usb_ponrst_default: pice0_usb_ponrst_default {
		mux {
			pins = "gpio182";
			function = "gpio";
		};

		config {
			pins = "gpio182";
			drive-strength = <2>;
			output-high;
			bias-pull-up;
		};
	};
};

&soc {

	qps615_bridge0_0p9_vreg: qps615_bridge0_0p9_vreg {
		compatible = "regulator-fixed";
		regulator-name = "qps615_bridge0_0p9_vreg";
		gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		enable-active-high;
		regulator-enable-ramp-delay = <4300>;
	};

	qps615_bridge1_0p9_vreg: qps615_bridge1_0p9_vreg {
		compatible = "regulator-fixed";
		regulator-name = "qps615_bridge1_0p9_vreg";
		gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>;
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		enable-active-high;
		regulator-enable-ramp-delay = <4300>;
	};

	qps615_resx0_0p9_vreg: qps615_resx0_0p9_vreg {
		compatible = "regulator-fixed";
		regulator-name = "qps615_resx0_0p9_vreg";
		gpio = <&tlmm 64 GPIO_ACTIVE_HIGH>;
		vin-supply = <&qps615_bridge0_0p9_vreg>;
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		enable-active-high;
		regulator-enable-ramp-delay = <2000>;
	};

	qps615_resx1_0p9_vreg: qps615_resx1_0p9_vreg {
	compatible = "regulator-fixed";
		regulator-name = "qps615_resx1_0p9_vreg";
		gpio = <&tlmm 65 GPIO_ACTIVE_HIGH>;
		vin-supply = <&qps615_bridge1_0p9_vreg>;
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		enable-active-high;
		regulator-enable-ramp-delay = <2000>;
	};

	pcie_usb_hub_1p05_vreg: pcie_usb_hub_1p05_vreg {
		compatible = "regulator-fixed";
		regulator-name = "pcie_usb_hub_1p05_vreg";
		pinctrl-names = "default";
		pinctrl-0 = <&pice0_usb_power_1p05_default>;
		gpio = <&tlmm 179 GPIO_ACTIVE_HIGH>;
		vin-supply = <&qps615_resx0_0p9_vreg>;
		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		enable-active-high;
		regulator-enable-ramp-delay = <5000>;
	};

	pcie_usb_hub_3p3_vreg: pcie_usb_hub_3p3_vreg {
		compatible = "regulator-fixed";
		regulator-name = "pcie_usb_hub_3p3_vreg";
		pinctrl-names = "default";
		pinctrl-0 = <&pice0_usb_power_3p3_default>;
		gpio = <&tlmm 13 GPIO_ACTIVE_HIGH>;
		vin-supply = <&pcie_usb_hub_1p05_vreg>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
		regulator-enable-ramp-delay = <10000>;
	};

	usb_hub_rest_vreg: usb_hub_rest_vreg {
		compatible = "regulator-fixed";
		regulator-name = "usb_hub_rest_vreg";
		pinctrl-names = "default";
		pinctrl-0 = <&pice0_usb_ponrst_default>;
		gpio = <&tlmm 182 GPIO_ACTIVE_HIGH>;
		vin-supply = <&pcie_usb_hub_3p3_vreg>;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
		regulator-enable-ramp-delay = <10000>;
	};

	gpio_key {
		compatible = "gpio-keys";
		label = "gpio-keys";

		pinctrl-names = "default";
		pinctrl-0 = <&key_vol_up_default>;

		vol_up {
			label = "volume_up";
			gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
			linux,input-type = <1>;
			linux,code = <KEY_VOLUMEUP>;
			gpio-key,wakeup;
			debounce-interval = <15>;
			linux,can-disable;
		};
	};

	clk40M: can_clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <40000000>;
	};
};

&DBO3 {
	/delete-property/ gpio;
};

&pm8550_gpios {
	pwm_gpio09 {
		pwm_gpio09_default: pwm_gpio09_default {
			pins = "gpio9";
			function = "func1"; /* SF1 For PWM4 */
			input-disable;
			output-enable;
			bias-disable;
			power-source = <1>; /* 1.8V */
			qcom,drive-strength = <2>;
			status = "okay";
		};
	};
};

&spmi_bus {
	qcom,pm8550@1 {
		fan0: pwm-fan@0 {
			compatible = "pwm-fan";
			status = "ok";
			pwms = <&pm8550_pwm_2 0 50000>; /* pwm4 */
			cooling-levels = <0 32 64 128 170 230 255>;
			pinctrl-names = "default";
			pinctrl-0 = <&pwm_gpio09_default>;
		};
	};
};

&pm8550_pwm_2 {
	status = "okay";
};

&qupv3_se11_spi {
	status = "ok";
	can@0 {
		compatible = "microchip,mcp2518fd";
		reg = <0>;
		clocks = <&clk40M>;
		interrupts-extended = <&tlmm 55 IRQ_TYPE_LEVEL_LOW>;
		interrupt-names = "can_irq";
		spi-max-frequency = <10000000>;
		gpio-controller;
		vdd-supply = <&L14B>;
		xceiver-supply = <&L14B>;
		status = "ok";
	};
};

&pm8550b_haptics {
	qcom,vmax-mv = <1300>;
	qcom,lra-period-us = <5880>;
	status = "ok";

	effect_0 {
		/* CLICK */
		qcom,wf-vmax-mv = <1800>;
		qcom,wf-pattern-period-us = <5880>;
	};

	effect_1 {
		/* DOUBLE_CLICK */
		qcom,wf-vmax-mv = <1800>;
		qcom,wf-pattern-period-us = <5880>;
	};

	effect_2 {
		/* TICK */
		qcom,wf-vmax-mv = <1800>;
		qcom,wf-pattern-period-us = <5880>;
	};

	effect_3 {
		/* THUD */
		qcom,wf-vmax-mv = <1800>;
		qcom,wf-pattern-period-us = <5880>;
	};

	effect_4 {
		/* POP */
		qcom,wf-vmax-mv = <1800>;
		qcom,wf-pattern-period-us = <5880>;
	};

	effect_5 {
		/* HEAVY CLICK */
		qcom,wf-vmax-mv = <1800>;
		qcom,wf-pattern-period-us = <5880>;
	};

	primitive_0 {
		/* NOOP */
		qcom,wf-vmax-mv = <2400>;
		qcom,wf-pattern-period-us = <5880>;
	};

	primitive_1 {
		/* CLICK */
		qcom,wf-vmax-mv = <2400>;
		qcom,wf-pattern-period-us = <5880>;
	};

	primitive_2 {
		/* THUD */
		qcom,wf-vmax-mv = <2400>;
		qcom,wf-pattern-period-us = <5880>;
	};

	primitive_3 {
		/* SPIN */
		qcom,wf-vmax-mv = <2400>;
		qcom,wf-pattern-period-us = <5880>;
	};

	primitive_4 {
		/* QUICK_RISE */
		qcom,wf-vmax-mv = <2400>;
		qcom,wf-pattern-period-us = <5880>;
	};

	primitive_5 {
		/* SLOW_RISE */
		qcom,wf-vmax-mv = <2400>;
		qcom,wf-pattern-period-us = <5880>;
	};

	primitive_6 {
		/* QUICK_FALL */
		qcom,wf-vmax-mv = <2400>;
		qcom,wf-pattern-period-us = <5880>;
	};

	primitive_7 {
		/* LIGHT_TICK */
		qcom,wf-vmax-mv = <2400>;
		qcom,wf-pattern-period-us = <5880>;
	};

	primitive_8 {
		/* LOW_TICK */
		qcom,wf-vmax-mv = <2400>;
		qcom,wf-pattern-period-us = <5880>;
	};
};

&ufsphy_mem {
	compatible = "qcom,ufs-phy-qmp-v4-kalama";

	/* VDDA_UFS_CORE */
	vdda-phy-supply = <&pm_v6d_l1>;
	vdda-phy-max-microamp = <188000>;

	/* VDDA_UFS_0_1P2 */
	vdda-pll-supply = <&pm_v6e_l3>;
	vdda-pll-max-microamp = <18300>;

	/* Phy GDSC for VDD_MX, always on */
	vdd-phy-gdsc-supply = <&gcc_ufs_mem_phy_gdsc>;

	/* Qref power supply, Refer Qref diagram */
	vdda-qref-supply = <&pm_v6e_l1>;
	vdda-qref-max-microamp = <30000>;

	status = "ok";
};

&ufshc_mem {
	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;

	vcc-supply = <&pm_humu_l17>;
	vcc-max-microamp = <1300000>;

	vccq-supply = <&pm_v6g_l1>;
	vccq-max-microamp = <1200000>;

	/* VDD_PX10 is voted for the ufs_reset_n */
	qcom,vddp-ref-clk-supply = <&pm_v6g_l3>;
	qcom,vddp-ref-clk-max-microamp = <100>;

	qcom,vccq-parent-supply = <&pm_v6g_s4>;
	qcom,vccq-parent-max-microamp = <210000>;

	reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
	resets = <&gcc GCC_UFS_PHY_BCR>;
	reset-names = "rst";

	status = "ok";
};

&pm8550_switch0 {
	qcom,led-mask = <9>; /* Channels 1 & 4 */
	qcom,symmetry-en;
};

&pm8550_switch1 {
	qcom,led-mask = <6>; /* Channels 2 & 3 */
	qcom,symmetry-en;
};

&pm8550_switch2 {
	qcom,led-mask = <15>; /* All Channels */
	qcom,symmetry-en;
};

&pm8550_flash {
	status = "ok";
};

&qupv3_se1_i2c {
	status = "ok";
	qcom,clk-freq-out = <400000>;
	#address-cells = <1>;
	#size-cells = <0>;

	/* TDK Chirp IO Expander */
	ch_io_expander@22 {
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
		compatible = "semtech,sx1508q";
		reg = <0x22>;
		gpio-controller;
	};
};

&qupv3_hub_i2c2 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "ok";
	qcom,clk-freq-out = <400000>;

	/* TDK Chirp 3, 4, and 5 are connected to QUP hub i2c2 */
	ch101_1: ch101_1@45 {
		compatible = "invensense,ch101";
		reg = <0x45>;
		rst-gpios = <&tlmm 127 GPIO_ACTIVE_HIGH>;
		rtc_rst-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
		prg-gpios = <3 4 5>;
		int-gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>,
			<&tlmm 19 GPIO_ACTIVE_HIGH>,
			<&tlmm 86 GPIO_ACTIVE_HIGH>;
	};
};

&qupv3_hub_i2c4 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "ok";
	qcom,clk-freq-out = <400000>;

	/* TDK Chirp 0, 1, and 2 are connected to QUP hub i2c4 */
	ch101_0: ch101_0@45 {
		compatible = "invensense,ch101";
		reg = <0x45>;
		rst-gpios = <&tlmm 127 GPIO_ACTIVE_HIGH>;
		rtc_rst-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
		prg-gpios = <0 1 2>;
		int-gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>,
			<&tlmm 129 GPIO_ACTIVE_HIGH>,
			<&tlmm 17 GPIO_ACTIVE_HIGH>;
	};
};

&qupv3_se2_spi {
	status = "okay";
	temp_sensor@0 {
		compatible = "tdktherm";
		reg = <0>; // Chip select ID
		spi-max-frequency = <10000000>; // Can support up to 24 MHz
		spi-cpol;
		spi-cpha;
		status = "okay";
	};
};

&qupv3_se4_spi {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "disabled";
	qcom,touch-active = "goodix,gt9916S";
	qcom,la-vm;

	goodix-berlin@0 {
		compatible = "goodix,gt9916S";
		reg = <0>;
		spi-max-frequency = <1000000>;

		goodix,avdd-name = "avdd";
		avdd-supply = <&L14B>;

		interrupt-parent = <&tlmm>;
		interrupts = <25 0x2008>;
		goodix,reset-gpio = <&tlmm 24 0x00>;
		goodix,irq-gpio = <&tlmm 25 0x2008>;
		goodix,irq-flags = <2>;
		goodix,panel-max-x = <1080>;
		goodix,panel-max-y = <2400>;
		goodix,panel-max-w = <255>;
		goodix,panel-max-p = <4096>;
		goodix,firmware-name = "goodix_firmware_spi.bin";
		goodix,config-name = "goodix_cfg_group_spi.bin";

		pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release";
		pinctrl-0 = <&ts_active>;
		pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
		pinctrl-2 = <&ts_release>;

		goodix,touch-type = "primary";
		goodix,qts_en;
		qts,trusted-touch-mode = "vm_mode";
		qts,touch-environment = "pvm";
		qts,trusted-touch-type = "primary";
		qts,trusted-touch-spi-irq = <569>;
		qts,trusted-touch-io-bases = <0xa90000 0xac0000>;
		qts,trusted-touch-io-sizes = <0x1000 0x1000>;
		qts,trusted-touch-vm-gpio-list = <&tlmm 44 0 &tlmm 45 0 &tlmm 46 0
						&tlmm 47 0 &tlmm 24 0 &tlmm 25 0x2008>;
	};
};

&qupv3_se4_4uart {
	status = "ok";
	qrc:qrc@100 {
		compatible = "qcom,qrc-uart";
		status = "ok";
		qcom,qrc-reset-gpio = <&tlmm 168 0>;
	};
};

&usb_qmp_dp_phy {
	pinctrl-names = "unused";

	qcom,qmp-phy-override-seq =
		/* <reg_offset,		value> */
		<USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH4		0xEE
		USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH4		0x0D
		USB3_DP_QSERDES_RXB_RX_MODE_00_LOW		0x3F
		USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH4		0x0E>;
};

&qupv3_hub_i2c2 {
	status = "ok";

	#address-cells = <1>;
	#size-cells = <0>;
	redriver: redriver@1c {
		compatible = "onnn,redriver";
		reg = <0x1c>;

		pinctrl-names = "default";
		pinctrl-0 = <&usb3phy_portselect_gpio>;
		gpios = <&tlmm 11 0>;
		set-aux;
		aux-orientation-violate-usb;

		eq = /bits/ 8 <
				/* Parameters for USB */
				0x4 0x4 0x4 0x4
				/* Parameters for DP */
				0x6 0x4 0x4 0x6>;
		flat-gain = /bits/ 8 <
				/* Parameters for USB */
				0x3 0x1 0x1 0x3
				/* Parameters for DP */
				0x2 0x1 0x1 0x2>;
		output-comp = /bits/ 8 <
				/* Parameters for USB */
				0x3 0x3 0x3 0x3
				/* Parameters for DP */
				0x3 0x3 0x3 0x3>;
		loss-match = /bits/ 8 <
				/* Parameters for USB */
				0x1 0x3 0x3 0x1
				/* Parameters for DP */
				0x3 0x3 0x3 0x3>;
	};
};

&usb0 {
	ssusb_redriver = <&redriver>;
};

&pm8550b_eusb2_repeater {
	qcom,param-override-seq =
		/* <value reg_offset> */
		/* Adjust HS trasmit amplitude */
		<0xb 0x51
		/* Squelch detection threshold */
		 0x3 0x54
		/* Tx pre-emphasis tuning */
		 0x3 0x57
		/* HS disconnect threshold */
		 0x6 0x53>;
};

&eusb2_phy0 {
	dummy-supply = <&pm8550b_eusb2_repeater>;
	usb-repeater = <&pm8550b_eusb2_repeater>;
};

&usb0 {
	usb-role-switch;
	port {
		usb_port0: endpoint {
			remote-endpoint = <&usb_port0_connector>;
		};
	};

	dwc3@a600000 {
		snps,usb2-gadget-lpm-disable;
	};
};

&ucsi {
	connector {
		port {
			usb_port0_connector: endpoint {
				remote-endpoint = <&usb_port0>;
			};
		};
	};
};

&battery_charger {
	qcom,wireless-fw-name = "idt9418.bin";
	qcom,thermal-mitigation-step = <500000>;
};

&apps_rsc_drv2 {
	rpmh-regulator-ldob11 {
		/delete-property/ proxy-supply;
		L11B: pm_humu_l11: regulator-pm-humu-l11 {
			/delete-property/ qcom,proxy-consumer-enable;
		};
	};

	rpmh-regulator-ldob12 {
		/delete-property/ proxy-supply;
		L12B: pm_humu_l12: regulator-pm-humu-l12 {
			/delete-property/ qcom,proxy-consumer-enable;
		};
	};
};

&L14B {
	regulator-always-on;
};

&regulator_ocp_notifier {
	periph-1c1-supply = <&L1B>;
	periph-1c2-supply = <&L2B>;
	periph-1c5-supply = <&L5B>;
	periph-1c6-supply = <&L6B>;
	periph-1c7-supply = <&L7B>;
	periph-1c8-supply = <&L8B>;
	periph-1c9-supply = <&L9B>;
	periph-1ca-supply = <&L10B>;
	periph-1cd-supply = <&L13B>;
	periph-1ce-supply = <&L14B>;
	periph-1cf-supply = <&L15B>;
	periph-1d0-supply = <&L16B>;
	periph-1d1-supply = <&L17B>;
	periph-2c1-supply = <&L1C>;
	periph-2c3-supply = <&L3C>;
	periph-3c1-supply = <&L1D>;
	periph-3c2-supply = <&L2D_LEVEL>;
	periph-4c1-supply = <&L1E>;
	periph-4c2-supply = <&L2E>;
	periph-4c3-supply = <&L3E>;
	periph-5c1-supply = <&L1F>;
	periph-5c2-supply = <&L2F>;
	periph-5c3-supply = <&L3F>;
	periph-6c1-supply = <&L1G>;
	periph-6c2-supply = <&L2G>;
	periph-6c3-supply = <&L3G>;
	periph-ac1-supply = <&L1K>;
	periph-ac2-supply = <&L2K>;
	periph-ac3-supply = <&L3K>;
	periph-ac4-supply = <&L4K>;
	periph-ac5-supply = <&L5K>;
	periph-ac6-supply = <&L6K>;
	periph-ac7-supply = <&L7K>;
	periph-c40-supply = <&L1M>;
	periph-c41-supply = <&L2M>;
	periph-c42-supply = <&L3M>;
	periph-c43-supply = <&L4M>;
	periph-c44-supply = <&L5M>;
	periph-c45-supply = <&L6M>;
	periph-c46-supply = <&L7M>;
	periph-d40-supply = <&L1N>;
	periph-d41-supply = <&L2N>;
	periph-d42-supply = <&L3N>;
	periph-d43-supply = <&L4N>;
	periph-d44-supply = <&L5N>;
	periph-d45-supply = <&L6N>;
	periph-d46-supply = <&L7N>;
};

&qupv3_hub_i2c4 {
	status = "ok";

	pcie0_i2c_ctrl: pcie0_i2c_ctrl {
		compatible = "qcom,pcie-i2c-ntn3";
		rc-index = <0x0>;
		reg = <0x77>;
		gpio-config-reg = <0x801208>;
		ep-reset-reg = <0x801210>;
		ep-reset-gpio-mask = <0xc>;
		version-reg = <0x800000>;
		dump-regs = <0x801330 0x801350 0x801370>;
		reg_update = <0x82c030 0x1
					0x828000 0x3
					0x82bd00 0x8
					0x82c030 0x2
					0x828000 0x3
					0x82bd00 0x8
					0x82c030 0x8
					0x828000 0x1
					0x82bd00 0x8
					0x82c01c 0x10
					0x82c030 0xf
					0x828000 0xf
					0x82b268 0x2>;
		/*FOM for preset caluclation*/
		switch_reg_update = <0x82c02c 0x00000007
					0x824a10 0x00000001
					0x82c030 0x00000008
					0x828000 0x00000001
					0x82b074 0x00000020
					0x82b2bc 0x00000001>;
	};
};

&reserved_memory {
	pci_usb_mem: pci_usb_region {
		compatible = "shared-dma-pool";
		alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
		reusable;
		alignment = <0x0 0x400000>;
		size = <0x0 0x2000000>;
	};
};

&pcie0_msi {
	status = "ok";
};

&pcie0 {
	qcom,boot-option = <0x2>;

	pcie-i2c-phandle = <&qupv3_hub_i2c4>;
	vreg-3p3-supply = <&usb_hub_rest_vreg>;
	msi-parent = <&pcie0_msi>;

	 qcom,pcie-phy-ver = <102>;
			qcom,phy-sequence = <0x0240 0x03 0x0
					0x00c0 0x01 0x0
					0x00cc 0x62 0x0
					0x00d0 0x02 0x0
					0x0060 0xf8 0x0
					0x0064 0x01 0x0
					0x0000 0x93 0x0
					0x0004 0x01 0x0
					0x00e0 0x90 0x0
					0x00e4 0x82 0x0
					0x00f4 0x07 0x0
					0x0070 0x02 0x0
					0x0010 0x02 0x0
					0x0074 0x16 0x0
					0x0014 0x16 0x0
					0x0078 0x36 0x0
					0x0018 0x36 0x0
					0x0110 0x08 0x0
					0x00bc 0x0a 0x0
					0x0120 0x40 0x0
					0x0080 0x0a 0x0
					0x0084 0x1a 0x0
					0x0020 0x14 0x0
					0x0024 0x34 0x0
					0x0088 0x41 0x0
					0x0028 0x34 0x0
					0x0090 0xab 0x0
					0x0094 0xaa 0x0
					0x0098 0x01 0x0
					0x0030 0x55 0x0
					0x0034 0x55 0x0
					0x0038 0x01 0x0
					0x0140 0x14 0x0
					0x0164 0x34 0x0
					0x003c 0x01 0x0
					0x001c 0x04 0x0
					0x0174 0x16 0x0
					0x01bc 0x0f 0x0
					0x0170 0xa0 0x0
					0x11a4 0x38 0x0
					0x10dc 0x11 0x0
					0x1160 0xbf 0x0
					0x1164 0xbf 0x0
					0x1168 0xb7 0x0
					0x116c 0xea 0x0
					0x115c 0x3f 0x0
					0x1174 0x5c 0x0
					0x1178 0x9c 0x0
					0x117c 0x1a 0x0
					0x1180 0x8f 0x0
					0x1170 0xdc 0x0
					0x1188 0x94 0x0
					0x118c 0x5b 0x0
					0x1190 0x1a 0x0
					0x1194 0x89 0x0
					0x10cc 0x00 0x0
					0x1008 0x09 0x0
					0x1014 0x05 0x0
					0x104c 0x08 0x0
					0x1050 0x08 0x0
					0x10d8 0x0f 0x0
					0x1118 0x1c 0x0
					0x10f8 0x07 0x0
					0x11f8 0x08 0x0
					0x0e84 0x15 0x0
					0x0e90 0x3f 0x0
					0x0ee4 0x02 0x0
					0x0e40 0x06 0x0
					0x0e3c 0x18 0x0
					0x19a4 0x38 0x0
					0x18dc 0x11 0x0
					0x1960 0xbf 0x0
					0x1964 0xbf 0x0
					0x1968 0xb7 0x0
					0x196c 0xea 0x0
					0x195c 0x3f 0x0
					0x1974 0x5c 0x0
					0x1978 0x9c 0x0
					0x197c 0x1a 0x0
					0x1980 0x8f 0x0
					0x1970 0xdc 0x0
					0x1988 0x94 0x0
					0x198c 0x5b 0x0
					0x1990 0x1a 0x0
					0x1994 0x89 0x0
					0x18cc 0x00 0x0
					0x1808 0x09 0x0
					0x1814 0x05 0x0
					0x184c 0x08 0x0
					0x1850 0x08 0x0
					0x18d8 0x0f 0x0
					0x1918 0x1c 0x0
					0x18f8 0x07 0x0
					0x19f8 0x08 0x0
					0x1684 0x15 0x0
					0x1690 0x3f 0x0
					0x16e4 0x02 0x0
					0x1640 0x06 0x0
					0x163c 0x18 0x0
					0x02dc 0x05 0x0
					0x0388 0x77 0x0
					0x0398 0x0b 0x0
					0x06a4 0x1e 0x0
					0x03e0 0x0f 0x0
					0x060c 0x1d 0x0
					0x0614 0x07 0x0
					0x0620 0xc1 0x0
					0x0624 0x40 0x0
					0x0694 0x00 0x0
					0x03d0 0x8c 0x0
					0x0368 0x0f 0x0
					0x1424 0x00 0x0
					0x1428 0x00 0x0
					0x0200 0x00 0x0
					0x0244 0x03 0x0>;

	iommu-map = <0x0 &apps_smmu 0x1400 0x1>,
		<0x100 &apps_smmu 0x1401 0x1>,
		<0x208 &apps_smmu 0x1402 0x1>,
		<0x210 &apps_smmu 0x1403 0x1>,
		<0x218 &apps_smmu 0x1404 0x1>,
		<0x300 &apps_smmu 0x1407 0x1>,
		<0x400 &apps_smmu 0x1408 0x1>,
		<0x500 &apps_smmu 0x140c 0x1>,
		<0x501 &apps_smmu 0x140e 0x1>;
};

&pcie0_rp {
	#address-cells = <5>;
	#size-cells = <0>;

	/* BDF 1.0.0 */
	pcie0_bus1_dev0_fn0: pcie0_bus1_dev0_fn0 {
		reg = <0 0 0 0 0>;

		/* BDF 2.1.0 */
		pcie0_bus2_dev1_fn0: pcie0_bus2_dev1_fn0 {
			reg = <0x800 0x0 0x0 0x0 0x0>;
		};

		/* BDF 2.2.0 */
		pcie0_bus2_dev2_fn0: pcie0_bus2_dev2_fn0 {
			reg = <0x1000 0x0 0x0 0x0 0x0>;

			/* BDF 4.0.0 */
			pcie0_bus4_dev0_fn0: pcie0_bus4_dev0_fn0 {
				reg = <0x0 0x0 0x0 0x0 0x0>;
				qcom,iommu-group = <&xhci_pci_iommu_group0>;
				memory-region = <&pci_usb_mem>;
				#address-cells = <1>;
				#size-cells = <1>;

				xhci_pci_iommu_group0: xhci_pci_iommu_group0 {
					qcom,iommu-msi-size = <0x1000>;
					qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
					qcom,iommu-dma = "fastmap";
					qcom,iommu-pagetable = "coherent";
					qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE", "non-fatal";
				};
			};
		};

		/* BDF 2.3.0 */
		pcie0_bus2_dev3_fn0: pcie0_bus2_dev3_fn0 {
			reg = <0x1800 0x0 0x0 0x0 0x0>;
		};
	};
};

&qupv3_hub_i2c3 {
	status = "ok";

	pcie1_i2c_ctrl: pcie1_i2c_ctrl {
		compatible = "qcom,pcie-i2c-ntn3";
		rc-index = <0x1>;
		reg = <0x77>;
		gpio-config-reg = <0x801208>;
		ep-reset-reg = <0x801210>;
		ep-reset-gpio-mask = <0xc>;
		version-reg = <0x800000>;
		dump-regs = <0x801330 0x801350 0x801370>;
		reg_update = <0x82c030 0x1
					0x828000 0x3
					0x82bd00 0x8
					0x82c030 0x2
					0x828000 0x3
					0x82bd00 0x8
					0x82c030 0x8
					0x828000 0x1
					0x82bd00 0x8
					0x82c01c 0x10
					0x82c030 0xf
					0x828000 0xf
					0x82b268 0x2>;
		/*FOM for preset caluclation*/
		switch_reg_update = <0x82c02c 0x00000007
					0x824a10 0x00000001
					0x82c030 0x00000008
					0x828000 0x00000001
					0x82b074 0x00000020
					0x82b2bc 0x00000001>;
	};
};

&pcie1_msi {
	status = "ok";
};

&pcie1 {
	pcie-i2c-phandle = <&qupv3_hub_i2c3>;
	qcom,boot-option = <0x1>;
	vreg-3p3-supply = <&qps615_resx1_0p9_vreg>;
	qcom,apss-based-l1ss-sleep;
	msi-parent = <&pcie1_msi>;
	qcom,phy-sequence = <0x1240 0x03 0x0
			0x0030 0x1d 0x0
			0x0034 0x03 0x0
			0x0078 0x01 0x0
			0x007c 0x00 0x0
			0x0080 0x51 0x0
			0x00ac 0x34 0x0
			0x0208 0x0c 0x0
			0x020c 0x0a 0x0
			0x0218 0x04 0x0
			0x0220 0x16 0x0
			0x0234 0x00 0x0
			0x029c 0x80 0x0
			0x02a0 0x7c 0x0
			0x02b4 0x05 0x0
			0x02e8 0x0a 0x0
			0x030c 0x0d 0x0
			0x0320 0x0b 0x0
			0x0348 0x1c 0x0
			0x0388 0x20 0x0
			0x0394 0x30 0x0
			0x03dc 0x09 0x0
			0x03f4 0x14 0x0
			0x03f8 0xb3 0x0
			0x03fc 0x58 0x0
			0x0400 0x9a 0x0
			0x0404 0x26 0x0
			0x0408 0xb6 0x0
			0x040c 0xee 0x0
			0x0410 0xdb 0x0
			0x0414 0xdb 0x0
			0x0418 0xa0 0x0
			0x041c 0xdf 0x0
			0x0420 0x78 0x0
			0x0424 0x76 0x0
			0x0428 0xff 0x0
			0x0830 0x1d 0x0
			0x0834 0x03 0x0
			0x0878 0x01 0x0
			0x087c 0x00 0x0
			0x0880 0x51 0x0
			0x08ac 0x34 0x0
			0x0a08 0x0c 0x0
			0x0a0c 0x0a 0x0
			0x0a18 0x04 0x0
			0x0a20 0x16 0x0
			0x0a34 0x00 0x0
			0x0a9c 0x80 0x0
			0x0aa0 0x7c 0x0
			0x0ab4 0x05 0x0
			0x0ae8 0x0a 0x0
			0x0b0c 0x0d 0x0
			0x0b20 0x0b 0x0
			0x0b48 0x1c 0x0
			0x0b88 0x20 0x0
			0x0b94 0x30 0x0
			0x0bdc 0x09 0x0
			0x0bf4 0x14 0x0
			0x0bf8 0xb3 0x0
			0x0bfc 0x58 0x0
			0x0c00 0x9a 0x0
			0x0c04 0x26 0x0
			0x0c08 0xb6 0x0
			0x0c0c 0xee 0x0
			0x0c10 0xdb 0x0
			0x0c14 0xdb 0x0
			0x0c18 0xa0 0x0
			0x0c1c 0xdf 0x0
			0x0c20 0x78 0x0
			0x0c24 0x76 0x0
			0x0c28 0xff 0x0
			0x0ea0 0x01 0x0
			0x0eb4 0x00 0x0
			0x0ec4 0x00 0x0
			0x0ec8 0x1f 0x0
			0x0ed4 0x12 0x0
			0x0ed8 0x12 0x0
			0x0edc 0xdb 0x0
			0x0ee0 0x9a 0x0
			0x0ee4 0x38 0x0
			0x0ee8 0xb6 0x0
			0x0eec 0x64 0x0
			0x0ef0 0x1f 0x0
			0x0ef4 0x1f 0x0
			0x0ef8 0x1f 0x0
			0x0efc 0x1f 0x0
			0x0f00 0x1f 0x0
			0x0f04 0x1f 0x0
			0x0f0c 0x1f 0x0
			0x0f14 0x1f 0x0
			0x0f1c 0x1f 0x0
			0x0f28 0x5b 0x0
			0x1000 0x26 0x0
			0x1004 0x03 0x0
			0x1010 0x06 0x0
			0x1014 0x16 0x0
			0x1018 0x36 0x0
			0x101c 0x04 0x0
			0x1020 0x0a 0x0
			0x1024 0x1a 0x0
			0x1028 0x68 0x0
			0x1030 0xab 0x0
			0x1034 0xaa 0x0
			0x1038 0x02 0x0
			0x103c 0x12 0x0
			0x1060 0xf8 0x0
			0x1064 0x01 0x0
			0x1070 0x06 0x0
			0x1074 0x16 0x0
			0x1078 0x36 0x0
			0x107c 0x0a 0x0
			0x1080 0x04 0x0
			0x1084 0x0d 0x0
			0x1088 0x41 0x0
			0x1090 0xab 0x0
			0x1094 0xaa 0x0
			0x1098 0x01 0x0
			0x109c 0x00 0x0
			0x10bc 0x0a 0x0
			0x10c0 0x01 0x0
			0x10cc 0x62 0x0
			0x10d0 0x02 0x0
			0x10d8 0x40 0x0
			0x10dc 0x14 0x0
			0x10e0 0x90 0x0
			0x10e4 0x82 0x0
			0x10f4 0x0f 0x0
			0x1110 0x08 0x0
			0x1120 0x46 0x0
			0x1124 0x04 0x0
			0x1140 0x14 0x0
			0x1164 0x34 0x0
			0x1170 0xa0 0x0
			0x1174 0x06 0x0
			0x1184 0x88 0x0
			0x1188 0x14 0x0
			0x1198 0x0f 0x0
			0x1378 0x2e 0x0
			0x1390 0xcc 0x0
			0x13f8 0x00 0x0
			0x13fc 0x22 0x0
			0x141c 0xc1 0x0
			0x1490 0x00 0x0
			0x14a0 0x16 0x0
			0x1420 0x40 0x0
			0x1508 0x02 0x0
			0x155c 0x2e 0x0
			0x157c 0x03 0x0
			0x1584 0x28 0x0
			0x13dc 0x04 0x0
			0x13e0 0x02 0x0
			0x1418 0xc0 0x0
			0x140c 0x1d 0x0
			0x158c 0x0f 0x0
			0x15ac 0xf2 0x0
			0x15c0 0xf2 0x0
			0x1200 0x00 0x0
			0x1244 0x03 0x0>;

	iommu-map = <0x0 &apps_smmu 0x1480 0x1>,
		<0x100 &apps_smmu 0x1481 0x1>,
		<0x208 &apps_smmu 0x1482 0x1>,
		<0x210 &apps_smmu 0x1483 0x1>,
		<0x218 &apps_smmu 0x1484 0x1>,
		<0x300 &apps_smmu 0x1487 0x1>,
		<0x400 &apps_smmu 0x1488 0x1>,
		<0x500 &apps_smmu 0x148c 0x1>,
		<0x501 &apps_smmu 0x148e 0x1>;
};

&pcie1_rp {
	#address-cells = <5>;
	#size-cells = <0>;

	/* BDF 1.0.0 */
	pcie1_bus1_dev0_fn0: pcie1_bus1_dev0_fn0 {
		reg = <0 0 0 0 0>;
		/* BDF 2.1.0 */
		pcie1_bus2_dev1_fn0: pcie1_bus2_dev1_fn0 {
			reg = <0x800 0x0 0x0 0x0 0x0>;
		};
		/* BDF 2.2.0 */
		pcie1_bus2_dev2_fn0: pcie1_bus2_dev2_fn0 {
			reg = <0x1000 0x0 0x0 0x0 0x0>;
		};
		/* BDF 2.3.0 */
		pcie1_bus2_dev3_fn0: pcie1_bus2_dev3_fn0 {
			reg = <0x1800 0x0 0x0 0x0 0x0>;
		};
	};
};

&thermal_zones {
	skin-msm-therm {
		status = "disabled";
	};

	cam-flash-therm {
		status = "disabled";
	};

	wlan-therm {
		status = "disabled";
	};

	rear-tof-therm {
		status = "disabled";
	};
};

&qcom_qbt {
	status = "disabled";
};