#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>

&soc {
	qcom,icnss@18800000 {
		compatible = "qcom,icnss";
		reg = <0x0A000000 0x800000>,
		    <0xa0000000 0x10000000>,
		    <0xb0000000 0x10000>;
		reg-names = "membase", "smmu_iova_base", "smmu_iova_ipa";
		qcom,rproc-handle = <&wlan_dsp>;
		iommus = <&apps_smmu 0x400 0x1>;
		interrupts = <0 277 0 /* CE0 */ >,
			   <0 278 0 /* CE1 */ >,
			   <0 279 0 /* CE2 */ >,
			   <0 280 0 /* CE3 */ >,
			   <0 281 0 /* CE4 */ >,
			   <0 282 0 /* CE5 */ >,
			   <0 283 0 /* CE6 */ >,
			   <0 284 0 /* CE7 */ >,
			   <0 285 0 /* CE8 */ >,
			   <0 286 0 /* CE9 */ >,
			   <0 287 0 /* CE10 */ >,
			   <0 288 0 /* CE11 */ >;
		qcom,wlan-msa-memory = <0x100000>;
		qcom,iommu-dma = "fastmap";
		qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
		qcom,iommu-geometry = <0xa0000000 0x10010000>;
		qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
		qcom,wlan;
		rproc-fw-download;
		qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
		vdd-cx-mx-supply = <&pms405_l2>;
		vdd-1.8-xo-supply = <&pms405_l5>;
		vdd-1.3-rfa-supply = <&pms405_l1>;
		qcom,vdd-cx-mx-config = <1224000 1224000>;
	};
};