#include &soc { wlan: qcom,cnss-qca-converged { compatible = "qcom,cnss-qca-converged"; qcom,wlan; qcom,multi-wlan-exchg; qcom,wlan-rc-num = <2>; qcom,bus-type=<0>; qcom,notify-modem-status; reg = <0xb0000000 0x10000>; reg-names = "smmu_iova_ipa"; vdd-wlan-ctrl1-supply = <&vreg_conn_pa>; vdd-wlan-io-supply = <&pmx75_l6>; vdd-wlan-rfa1-supply = <&pmx75_s7>; vdd-wlan-rfa2-supply = <&pmx75_s2>; vdd-wlan-rfa3-supply = <&pmx75_s4>; wlan_vregs = "vdd-wlan-ctrl1", "vdd-wlan-io", "vdd-wlan-rfa1", "vdd-wlan-rfa2", "vdd-wlan-rfa3"; qcom,vdd-wlan-ctrl1-config = <0 0 0 0 0>; qcom,vdd-wlan-io-config = <1800000 1800000 0 0 0>; qcom,vdd-wlan-rfa1-config = <1000000 1000000 0 0 0>; qcom,vdd-wlan-rfa2-config = <1300000 1300000 0 0 0>; qcom,vdd-wlan-rfa3-config = <1904000 1904000 450000 0 0>; wlan-en-gpio = <&pmk8550_gpios 3 0>; pinctrl-names = "wlan_en_active", "wlan_en_sleep"; pinctrl-0 = <&wlan_en_active>; pinctrl-1 = <&wlan_en_sleep>; chip_cfg@0 { supported-ids = <0x003e>; qcom,wlan-ramdump-dynamic = <0x400000>; }; chip_cfg@1 { reg = <0xb0000000 0x10000>; reg-names = "smmu_iova_ipa"; supported-ids = <0x1103>; qcom,wlan-ramdump-dynamic = <0x400000>; mhi,max-channels = <30>; mhi,buffer-len = <0x8000>; mhi,timeout = <10000>; qcom,smmu-s1-enable; pcie-disable-l1ss; mhi_channels { #address-cells = <1>; #size-cells = <0>; mhi_chan@0 { reg = <0>; label = "LOOPBACK"; mhi,num-elements = <32>; mhi,event-ring = <1>; mhi,chan-dir = <1>; mhi,data-type = <0>; mhi,doorbell-mode = <2>; mhi,ee = <0x14>; }; mhi_chan@1 { reg = <1>; label = "LOOPBACK"; mhi,num-elements = <32>; mhi,event-ring = <1>; mhi,chan-dir = <2>; mhi,data-type = <0>; mhi,doorbell-mode = <2>; mhi,ee = <0x14>; }; mhi_chan@4 { reg = <4>; label = "DIAG"; mhi,num-elements = <32>; mhi,event-ring = <1>; mhi,chan-dir = <1>; mhi,data-type = <0>; mhi,doorbell-mode = <2>; mhi,ee = <0x14>; }; mhi_chan@5 { reg = <5>; label = "DIAG"; mhi,num-elements = <32>; mhi,event-ring = <1>; mhi,chan-dir = <2>; mhi,data-type = <0>; mhi,doorbell-mode = <2>; mhi,ee = <0x14>; }; mhi_chan@20 { reg = <20>; label = "IPCR"; mhi,num-elements = <32>; mhi,event-ring = <1>; mhi,chan-dir = <1>; mhi,data-type = <1>; mhi,doorbell-mode = <2>; mhi,ee = <0x14>; mhi,auto-start; }; mhi_chan@21 { reg = <21>; label = "IPCR"; mhi,num-elements = <32>; mhi,event-ring = <1>; mhi,chan-dir = <2>; mhi,data-type = <0>; mhi,doorbell-mode = <2>; mhi,ee = <0x14>; mhi,auto-queue; mhi,auto-start; }; }; mhi_events { mhi_event@0 { mhi,num-elements = <32>; mhi,intmod = <1>; mhi,msi = <1>; mhi,priority = <1>; mhi,brstmode = <2>; mhi,data-type = <1>; }; mhi_event@1 { mhi,num-elements = <256>; mhi,intmod = <1>; mhi,msi = <2>; mhi,priority = <1>; mhi,brstmode = <2>; }; mhi_event@2 { mhi,num-elements = <32>; mhi,intmod = <1>; mhi,msi = <0>; mhi,priority = <2>; mhi,brstmode = <2>; mhi,data-type = <3>; }; }; mhi_devices { mhi_qrtr { mhi,chan = "IPCR"; qcom,net-id = <0>; qcom,low-latency; mhi,early-notify; }; }; }; }; }; &pcie2_rp { #address-cells = <5>; #size-cells = <0>; cnss_pci: cnss_pci { reg = <0 0 0 0 0>; qcom,iommu-group = <&cnss_pci_iommu_group>; #address-cells = <1>; #size-cells = <1>; cnss_pci_iommu_group: cnss_pci_iommu_group { qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>; qcom,iommu-dma = "atomic"; qcom,iommu-pagetable = "coherent"; qcom,iommu-faults = "stall-disable", "no-CFRE", "HUPCF", "non-fatal"; }; }; };