#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>

&soc {
	qcom,smp2p-modem {
		smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
			qcom,entry-name = "wlan";
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};

	icnss: qcom,icnss@C800000 {
		compatible = "qcom,icnss";
		reg = <0xC800000 0x800000>,
		      <0xb0000000 0x10000>;
		reg-names = "membase", "smmu_iova_ipa";
		iommus = <&apps_smmu 0x80 0x1>;
		interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH /* CE0 */ >,
			     <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH /* CE1 */ >,
			     <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH /* CE2 */ >,
			     <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH /* CE3 */ >,
			     <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH /* CE4 */ >,
			     <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH /* CE5 */ >,
			     <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH /* CE6 */ >,
			     <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH /* CE7 */ >,
			     <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH /* CE8 */ >,
			     <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH /* CE9 */ >,
			     <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH /* CE10 */ >,
			     <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH /* CE11 */ >;
		qcom,iommu-dma = "fastmap";
		qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
		qcom,iommu-geometry = <0xa0000000 0x10010000>;
		qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
		qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
		qcom,wlan;
		vdd-cx-mx-supply = <&L8A>;
		vdd-1.8-xo-supply = <&L16A>;
		vdd-1.3-rfa-supply = <&L17A>;
		vdd-3.3-ch0-supply = <&L23A>;
		qcom,vdd-cx-mx-config = <640000 640000>;
		qcom,vdd-3.3-ch0-config = <3000000 3312000>;
		qcom,icnss-adc_tm = <&pmi632_adc_tm>;
		io-channels = <&pmi632_vadc ADC5_VBAT_SNS>;
		io-channel-names = "icnss";
		qcom,smp2p_map_wlan_1_in {
		interrupts-extended = <&smp2p_wlan_1_in 0 0>,
				      <&smp2p_wlan_1_in 1 0>;
			interrupt-names = "qcom,smp2p-force-fatal-error",
					  "qcom,smp2p-early-crash-ind";
		};
	};
};