&soc { replicator_qdss: replicator@6046000 { compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; reg = <0x6046000 0x1000>; reg-names = "replicator-base"; coresight-name = "coresight-replicator-qdss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; replicator0_out_tmc_etr: endpoint { remote-endpoint= <&tmc_etr_in_replicator0>; }; }; port@1 { reg = <1>; replicator0_out_replicator1_in: endpoint { remote-endpoint= <&replicator1_in_replicator0_out>; }; }; }; in-ports { port { replicator0_in_tmc_etf: endpoint { remote-endpoint= <&tmc_etf_out_replicator0>; }; }; }; }; replicator_qdss1: replicator@604a000 { compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; reg = <0x604a000 0x1000>; reg-names = "replicator-base"; coresight-name = "coresight-replicator-qdss1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { replicator1_out_funnel_swao: endpoint { remote-endpoint= <&funnel_swao_in_replicator1_out>; }; }; }; in-ports { port { replicator1_in_replicator0_out: endpoint { remote-endpoint= <&replicator0_out_replicator1_in>; }; }; }; }; replicator_swao: replicator@6b0a000 { compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; reg = <0x6b0a000 0x1000>; reg-names = "replicator-base"; coresight-name = "coresight-replicator-swao"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { #address-cells = <1>; #size-cells = <0>; /* Always have EUD before funnel leading to ETR. If both * sink are active we need to give preference to EUD * over ETR */ port@1 { reg = <1>; replicator_swao_out_eud: endpoint { remote-endpoint = <&eud_in_replicator_swao>; }; }; port@0 { reg = <0>; replicator_swao_out_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_in_replicator_swao>; }; }; }; in-ports { port { replicator_swao_in_tmc_etf_swao: endpoint { remote-endpoint = <&tmc_etf_swao_out_replicator_swao>; }; }; }; }; tmc_etf_swao: tmc@6b09000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb961>; reg = <0x6b09000 0x1000>; reg-names = "tmc-base"; coresight-name = "coresight-tmc-etf-swao"; coresight-csr = <&csr>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tmc_etf_swao_out_replicator_swao: endpoint { remote-endpoint= <&replicator_swao_in_tmc_etf_swao>; }; }; }; in-ports { port { tmc_etf_swao_in_funnel_swao: endpoint { remote-endpoint= <&funnel_swao_out_tmc_etf_swao>; }; }; }; }; funnel_swao:funnel@0x6b08000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6b08000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-swao"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { funnel_swao_out_tmc_etf_swao: endpoint { remote-endpoint = <&tmc_etf_swao_in_funnel_swao>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <5>; funnel_swao_in_ssc_etm0: endpoint { remote-endpoint= <&ssc_etm0_out_funnel_swao>; }; }; port@1 { reg = <6>; funnel_swao_in_replicator1_out: endpoint { remote-endpoint= <&replicator1_out_funnel_swao>; }; }; port@2 { reg = <7>; funnel_swao_in_tpda_swao: endpoint { remote-endpoint= <&tpda_swao_out_funnel_swao>; }; }; }; }; tpda_swao: tpda@6b01000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b969>; reg = <0x6b01000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-swao"; qcom,tpda-atid = <71>; qcom,dsb-elem-size = <1 32>; qcom,cmb-elem-size = <0 64>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { reg = <0>; tpda_swao_out_funnel_swao: endpoint { remote-endpoint = <&funnel_swao_in_tpda_swao>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_swao_in_tpdm_swao0: endpoint { remote-endpoint = <&tpdm_swao0_out_tpda_swao>; }; }; port@1 { reg = <1>; tpda_swao_in_tpdm_swao1: endpoint { remote-endpoint = <&tpdm_swao1_out_tpda_swao>; }; }; }; }; tpdm_swao0: tpdm@6b02000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6b02000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-swao-0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_swao0_out_tpda_swao: endpoint { remote-endpoint = <&tpda_swao_in_tpdm_swao0>; }; }; }; }; tpdm_swao1: tpdm@6b03000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6b03000 0x1000>; reg-names = "tpdm-base"; coresight-name="coresight-tpdm-swao-1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,msr-fix-req; out-ports { port { tpdm_swao1_out_tpda_swao: endpoint { remote-endpoint = <&tpda_swao_in_tpdm_swao1>; }; }; }; }; tmc_etr: tmc@6048000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb961>; reg = <0x6048000 0x1000>, <0x6064000 0x15000>; reg-names = "tmc-base", "bam-base"; qcom,iommu-dma = "default"; iommus = <&apps_smmu 0x05e0 0>, <&apps_smmu 0x04a0 0>; qcom,iommu-dma-addr-pool = <0x0 0xffc00000>; #address-cells = <1>; #size-cells = <1>; ranges; arm,buffer-size = <0x400000>; coresight-name = "coresight-tmc-etr"; coresight-ctis = <&cti0 &cti0>; cti-reset-trig-num = <0>; cti-flush-trig-num = <3>; qcom,mem_support; qcom,sw-usb; dma-coherent; coresight-csr = <&csr>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; interrupts = ; interrupt-names = "byte-cntr-irq"; in-ports { port { tmc_etr_in_replicator0: endpoint { remote-endpoint = <&replicator0_out_tmc_etr>; }; }; }; }; tmc_etf: tmc@6047000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb961>; reg = <0x6047000 0x1000>; reg-names = "tmc-base"; coresight-name = "coresight-tmc-etf"; coresight-ctis = <&cti0 &cti0>; cti-reset-trig-num = <0>; cti-flush-trig-num = <1>; coresight-csr = <&csr>; arm,default-sink; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tmc_etf_out_replicator0: endpoint { remote-endpoint = <&replicator0_in_tmc_etf>; }; }; }; in-ports { port { tmc_etf_in_funnel_merg: endpoint { remote-endpoint = <&funnel_merg_out_tmc_etf>; }; }; }; }; funnel_merg: funnel@6045000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6045000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-merg"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { reg = <0>; funnel_merg_out_tmc_etf: endpoint { remote-endpoint = <&tmc_etf_in_funnel_merg>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_merg_in_funnel_in0: endpoint { remote-endpoint = <&funnel_in0_out_funnel_merg>; }; }; port@1 { reg = <1>; funnel_merg_in_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_out_funnel_merg>; }; }; port@2 { reg = <2>; funnel_merg_in_funnel_in2: endpoint { remote-endpoint = <&funnel_in2_out_funnel_merg>; }; }; }; }; stm: stm@6002000 { compatible = "arm,primecell"; reg = <0x6002000 0x1000>, <0x16280000 0x180000>, <0x7820f0 0x4>; reg-names = "stm-base", "stm-stimulus-base", "stm-debug-status"; coresight-name = "coresight-stm"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { stm_out_funnel_in0: endpoint { remote-endpoint = <&funnel_in0_in_stm>; }; }; }; }; hwevent: hwevent@0x091866F0 { compatible = "qcom,coresight-hwevent"; reg = <0x091866F0 0x4>, <0x91966F0 0x4>, <0x9186038 0x4>, <0x9196038 0x4>, <0x17E00034 0x4>, <0x18200050 0x80>, <0x02C8D050 0x80>, <0x0AF20050 0x80>; reg-names = "ddr-ch0-cfg", "ddr-ch23-cfg", "ddr-ch0-ctrl", "ddr-ch23-ctrl", "apss-testbus-mux-cfg", "apss-rsc-hwevent-mux0-select", "gpu-rsc-hwevent-mux0-select", "sde-rsc-hwevent-mux0-select"; coresight-name = "coresight-hwevent"; coresight-csr = <&csr>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; csr: csr@6001000 { compatible = "qcom,coresight-csr"; reg = <0x6001000 0x1000>; reg-names = "csr-base"; coresight-name = "coresight-csr"; qcom,usb-bam-support; qcom,hwctrl-set-support; qcom,set-byte-cntr-support; qcom,blk-size = <1>; }; swao_csr: csr@6b0e000 { compatible = "qcom,coresight-csr"; reg = <0x6b0e000 0x1000>; reg-names = "csr-base"; coresight-name = "coresight-swao-csr"; qcom,timestamp-support; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,blk-size = <1>; }; funnel_in0: funnel@0x6041000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6041000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-in0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { funnel_in0_out_funnel_merg: endpoint { remote-endpoint = <&funnel_merg_in_funnel_in0>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <1>; funnel_in0_in_funnel_spss: endpoint { remote-endpoint = <&funnel_spss_out_funnel_in0>; }; }; port@1 { reg = <6>; funnel_in0_in_funnel_qatb: endpoint { remote-endpoint = <&funnel_qatb_out_funnel_in0>; }; }; port@2 { reg = <7>; funnel_in0_in_stm: endpoint { remote-endpoint = <&stm_out_funnel_in0>; }; }; }; }; funnel_in1: funnel@0x6042000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6042000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-in1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { funnel_in1_out_funnel_merg: endpoint { remote-endpoint = <&funnel_merg_in_funnel_in1>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <2>; funnel_in1_in_funnel_dl_south: endpoint { remote-endpoint = <&funnel_dl_south_out_funnel_in1>; }; }; port@1 { reg = <3>; funnel_in1_in_modem_etm0: endpoint { remote-endpoint = <&modem_etm0_out_funnel_in1>; }; }; port@2 { reg = <4>; funnel_in1_in_replicator_swao: endpoint { remote-endpoint = <&replicator_swao_out_funnel_in1>; }; }; port@3 { reg = <6>; funnel_in1_in_funnel_dl_north: endpoint { remote-endpoint = <&funnel_dl_north_out_funnel_in1>; }; }; }; }; funnel_in2: funnel@0x6043000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6043000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-in2"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port@0 { funnel_in2_out_funnel_merg: endpoint { remote-endpoint = <&funnel_merg_in_funnel_in2>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <2>; funnel_in2_in_funnel_apss_merg: endpoint { remote-endpoint = <&funnel_apss_merg_out_funnel_in2>; }; }; port@1 { reg = <3>; funnel_in2_in_funnel_gfx: endpoint { remote-endpoint = <&funnel_gfx_out_funnel_in2>; }; }; port@2 { reg = <4>; funnel_in2_in_tpda_modem: endpoint { remote-endpoint = <&tpda_modem_out_funnel_in2>; }; }; }; }; funnel_gfx: funnel@0x6943000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; status = "disabled"; reg = <0x6943000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-gfx"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { funnel_gfx_out_funnel_in2: endpoint { remote-endpoint = <&funnel_in2_in_funnel_gfx>; }; }; }; }; tpda: tpda@6004000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b969>; reg = <0x6004000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda"; qcom,tpda-atid = <65>; qcom,bc-elem-size = <10 32>, <13 32>; qcom,tc-elem-size = <13 32>; qcom,dsb-elem-size = <0 32>, <2 32>, <3 32>, <5 32>, <6 32>, <10 32>, <11 32>, <13 32>; qcom,cmb-elem-size = <3 64>, <7 64>, <10 64>, <13 64>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpda_out_funnel_qatb: endpoint { remote-endpoint = <&funnel_qatb_in_tpda>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_in_funnel_dl_mm: endpoint { remote-endpoint = <&funnel_dl_mm_out_tpda>; }; }; port@1 { reg = <1>; tpda_in_funnel_dl_mm1: endpoint { remote-endpoint = <&funnel_dl_mm1_out_tpda>; }; }; port@2 { reg = <2>; tpda_in_tpdm_center: endpoint { remote-endpoint = <&tpdm_center_out_tpda>; }; }; port@3 { reg = <4>; tpda_in_funnel_lpass: endpoint { remote-endpoint = <&funnel_lpass_out_tpda>; }; }; port@4 { reg = <5>; tpda_in_funnel_turing: endpoint { remote-endpoint = <&funnel_turing_out_tpda>; }; }; port@5 { reg = <6>; tpda_in_funnel_ddr_0: endpoint { remote-endpoint = <&funnel_ddr_0_out_tpda>; }; }; port@6 { reg = <8>; tpda_in_tpdm_vsense: endpoint { remote-endpoint = <&tpdm_vsense_out_tpda>; }; }; port@7 { reg = <10>; tpda_in_tpdm_prng: endpoint { remote-endpoint = <&tpdm_prng_out_tpda>; }; }; port@8 { reg = <13>; tpda_in_tpdm_pimem: endpoint { remote-endpoint = <&tpdm_pimem_out_tpda>; }; }; }; }; tpda_modem: tpda@6832000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b969>; reg = <0x6832000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-modem"; qcom,tpda-atid = <67>; qcom,dsb-elem-size = <0 32>; qcom,cmb-elem-size = <0 64>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpda_modem_out_funnel_in2: endpoint { remote-endpoint = <&funnel_in2_in_tpda_modem>; }; }; }; in-ports { port { tpda_modem_in_tpdm_modem: endpoint { remote-endpoint = <&tpdm_modem_out_tpda_modem>; }; }; }; }; tpdm_modem: tpdm@6830000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6830000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-modem"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_modem_out_tpda_modem: endpoint { remote-endpoint = <&tpda_modem_in_tpdm_modem>; }; }; }; }; funnel_lpass: funnel@6846000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6846000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-lpass"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { reg = <0>; funnel_lpass_out_tpda: endpoint { remote-endpoint = <&tpda_in_funnel_lpass>; }; }; }; in-ports { port { reg = <0>; funnel_lpass_in_tpdm_lpass: endpoint { remote-endpoint = <&tpdm_lpass_out_funnel_lpass>; }; }; }; }; funnel_lpass_1: funnel_1@6846000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6867020 0x10>, <0x6846000 0x1000>; reg-names = "funnel-base-dummy", "funnel-base-real"; coresight-name = "coresight-funnel-lpass-1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,duplicate-funnel; out-ports { port { reg = <0>; funnel_lpass_1_out_funnel_qatb: endpoint { remote-endpoint = <&funnel_qatb_in_funnel_lpass_1>; }; }; }; in-ports { port { reg = <2>; funnel_lpass_1_in_audio_etm0: endpoint { remote-endpoint = <&audio_etm0_out_funnel_lpass_1>; }; }; }; }; tpdm_lpass: tpdm@6844000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6844000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-lpass"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,msr-fix-req; out-ports { port { tpdm_lpass_out_funnel_lpass: endpoint { remote-endpoint = <&funnel_lpass_in_tpdm_lpass>; }; }; }; }; tpdm_center: tpdm@6c28000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6c28000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-center"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,msr-fix-req; out-ports { port { tpdm_center_out_tpda: endpoint { remote-endpoint = <&tpda_in_tpdm_center>; }; }; }; }; tpdm_dl_north: tpdm@6ac0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6ac0000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-dl-north"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,msr-fix-req; out-ports { port { tpdm_dl_north_out_tpda_dl_north: endpoint { remote-endpoint = <&tpda_dl_north_in_tpdm_dl_north>; }; }; }; }; tpda_dl_north: tpda@6ac1000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b969>; reg = <0x06ac1000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-dl-north"; qcom,tpda-atid = <97>; qcom,cmb-elem-size = <0 32>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { reg = <0>; tpda_dl_north_out_funnel_dl_north: endpoint { remote-endpoint = <&funnel_dl_north_in_tpda_dl_north>; }; }; }; in-ports { port { reg = <0>; tpda_dl_north_in_tpdm_dl_north: endpoint { remote-endpoint = <&tpdm_dl_north_out_tpda_dl_north>; }; }; }; }; funnel_dl_south: funnel@69c2000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x69c2000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-dl-south"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { funnel_dl_south_out_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_in_funnel_dl_south>; }; }; }; in-ports { port { funnel_dl_south_in_tpdm_dl_south: endpoint { remote-endpoint = <&tpdm_dl_south_out_funnel_dl_south>; }; }; }; }; tpdm_dl_south: tpdm@69c0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x69c0000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-dl-south"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_dl_south_out_funnel_dl_south: endpoint { remote-endpoint = <&funnel_dl_south_in_tpdm_dl_south>; }; }; }; }; funnel_dl_north: funnel@6ac2000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6ac2000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-dl-north"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { funnel_dl_north_out_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_in_funnel_dl_north>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_dl_north_in_tpda_dl_north: endpoint { remote-endpoint = <&tpda_dl_north_out_funnel_dl_north>; }; }; port@1 { reg = <1>; funnel_dl_north_in_tpdm_wcss: endpoint { remote-endpoint = <&tpdm_wcss_out_funnel_dl_north>; }; }; }; }; tpdm_wcss: tpdm@699c000 { compatible = "qcom,coresight-dummy"; coresight-name = "coresight-tpdm-wcss"; qcom,dummy-source; out-ports { port { tpdm_wcss_out_funnel_dl_north: endpoint { remote-endpoint = <&funnel_dl_north_in_tpdm_wcss>; }; }; }; }; tpdm_prng: tpdm@684c000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x684c000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-prng"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_prng_out_tpda: endpoint { remote-endpoint = <&tpda_in_tpdm_prng>; }; }; }; }; funnel_spss: funnel@6883000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6883000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-spss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port@0 { reg = <0>; funnel_spss_out_funnel_in0: endpoint { remote-endpoint = <&funnel_in0_in_funnel_spss>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_spss_in_tpda_spss: endpoint { remote-endpoint = <&tpda_spss_out_funnel_spss>; }; }; port@1 { reg = <1>; funnel_spss_in_spss_etm0: endpoint { remote-endpoint = <&spss_etm0_out_funnel_spss>; }; }; }; }; tpda_spss: tpda@6882000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b969>; reg = <0x06882000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-spss"; qcom,tpda-atid = <70>; qcom,cmb-elem-size = <0 32>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port@0 { reg = <0>; tpda_spss_out_funnel_spss: endpoint { remote-endpoint = <&funnel_spss_in_tpda_spss>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <0>; tpda_spss_in_tpdm_spss: endpoint { remote-endpoint = <&tpdm_spss_out_tpda_spss>; }; }; }; }; tpdm_spss: tpdm@6880000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6880000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-spss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_spss_out_tpda_spss: endpoint { remote-endpoint = <&tpda_spss_in_tpdm_spss>; }; }; }; }; spss_etm0 { compatible = "qcom,coresight-dummy"; coresight-name = "coresight-spss-etm0"; qcom,dummy-source; out-ports { port { spss_etm0_out_funnel_spss: endpoint { remote-endpoint = <&funnel_spss_in_spss_etm0>; }; }; }; }; tpdm_qm: tpdm@69d0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x69d0000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-qm"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { tpdm_qm_out_funnel_dl_mm: endpoint { remote-endpoint = <&funnel_dl_mm_in_tpdm_qm>; }; }; }; tpda_apss: tpda@7862000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b969>; reg = <0x7862000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-apss"; qcom,tpda-atid = <66>; qcom,dsb-elem-size = <0 32>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { reg = <0>; tpda_apss_out_funnel_apss_merg: endpoint { remote-endpoint = <&funnel_apss_merg_in_tpda_apss>; }; }; }; in-ports { port { reg = <0>; tpda_apss_in_tpdm_apss: endpoint { remote-endpoint = <&tpdm_apss_out_tpda_apss>; }; }; }; }; tpdm_apss: tpdm@7860000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x7860000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-apss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { tpdm_apss_out_tpda_apss: endpoint { remote-endpoint = <&tpda_apss_in_tpdm_apss>; }; }; }; tpda_llm_silver: tpda@78c0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b969>; reg = <0x78c0000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-llm-silver"; qcom,tpda-atid = <72>; qcom,cmb-elem-size = <0 32>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { reg = <0>; tpda_llm_silver_out_funnel_apss_merg: endpoint { remote-endpoint = <&funnel_apss_merg_in_tpda_llm_silver>; }; }; }; in-ports { port { reg = <0>; tpda_llm_silver_in_tpdm_llm_silver: endpoint { remote-endpoint = <&tpdm_llm_silver_out_tpda_llm_silver>; }; }; }; }; tpdm_llm_silver: tpdm@78a0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x78a0000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-llm-silver"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { tpdm_llm_silver_out_tpda_llm_silver: endpoint { remote-endpoint = <&tpda_llm_silver_in_tpdm_llm_silver>; }; }; }; tpda_llm_gold: tpda@78d0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b969>; reg = <0x78d0000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-llm-gold"; qcom,tpda-atid = <73>; qcom,cmb-elem-size = <0 32>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_llm_gold_out_funnel_apss_merg: endpoint { remote-endpoint = <&funnel_apss_merg_in_tpda_llm_gold>; }; }; }; in-ports { port { reg = <0>; tpda_llm_gold_in_tpdm_llm_gold: endpoint { remote-endpoint = <&tpdm_llm_gold_out_tpda_llm_gold>; }; }; }; }; tpdm_llm_gold: tpdm@78b0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x78b0000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-llm-gold"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_llm_gold_out_tpda_llm_gold: endpoint { remote-endpoint = <&tpda_llm_gold_in_tpdm_llm_gold>; }; }; }; }; funnel_dl_mm: funnel@6c0b000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6c0b000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-dl-mm"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { reg = <0>; funnel_dl_mm_out_tpda: endpoint { remote-endpoint = <&tpda_in_funnel_dl_mm>; }; }; }; in-ports { port { reg = <0>; funnel_dl_mm_in_tpdm_qm: endpoint { remote-endpoint = <&tpdm_qm_out_funnel_dl_mm>; }; }; }; }; funnel_dl_mm1: funnel_1@6c0b000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6867000 0x10>, <0x6c0b000 0x1000>; reg-names = "funnel-base-dummy", "funnel-base-real"; coresight-name = "coresight-funnel-dl-mm1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,duplicate-funnel; out-ports { #address-cells = <1>; #size-cells = <0>; port { reg = <0>; funnel_dl_mm1_out_tpda: endpoint { remote-endpoint = <&tpda_in_funnel_dl_mm1>; }; }; }; in-ports { port { reg = <1>; funnel_dl_mm1_in_tpdm_mm: endpoint { remote-endpoint = <&tpdm_mm_out_funnel_dl_mm1>; }; }; }; }; tpdm_mm: tpdm@6c08000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6c08000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-mm"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,msr-fix-req; out-ports { port { tpdm_mm_out_funnel_dl_mm1: endpoint { remote-endpoint = <&funnel_dl_mm1_in_tpdm_mm>; }; }; }; }; funnel_turing: funnel@6861000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6861000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-turing"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { reg = <0>; funnel_turing_out_tpda: endpoint { remote-endpoint = <&tpda_in_funnel_turing>; }; }; }; in-ports { port { reg = <0>; funnel_turing_in_tpdm_turing: endpoint { remote-endpoint = <&tpdm_turing_out_funnel_turing>; }; }; }; }; funnel_turing_1: funnel_1@6861000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6867010 0x10>, <0x6861000 0x1000>; reg-names = "funnel-base-dummy", "funnel-base-real"; coresight-name = "coresight-funnel-turing-1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,duplicate-funnel; out-ports { port { reg = <0>; funnel_turing_1_out_funnel_qatb: endpoint { remote-endpoint = <&funnel_qatb_in_funnel_turing_1>; }; }; }; in-ports { port { reg = <1>; funnel_turing_1_in_turing_etm0: endpoint { remote-endpoint = <&turing_etm0_out_funnel_turing_1>; }; }; }; }; tpdm_turing: tpdm@6860000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6860000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-turing"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,msr-fix-req; out-ports { port { tpdm_turing_out_funnel_turing: endpoint { remote-endpoint = <&funnel_turing_in_tpdm_turing>; }; }; }; }; funnel_ddr_0: funnel@6a05000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6a05000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-ddr-0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { funnel_ddr_0_out_tpda: endpoint { remote-endpoint = <&tpda_in_funnel_ddr_0>; }; }; }; in-ports { port { funnel_ddr_0_in_tpdm_ddr: endpoint { remote-endpoint = <&tpdm_ddr_out_funnel_ddr_0>; }; }; }; }; tpdm_ddr: tpdm@6A00000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x06A00000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-ddr"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,msr-fix-req; out-ports { port { tpdm_ddr_out_funnel_ddr_0: endpoint { remote-endpoint = <&funnel_ddr_0_in_tpdm_ddr>; }; }; }; }; tpdm_pimem: tpdm@6850000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6850000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-pimem"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_pimem_out_tpda: endpoint { remote-endpoint = <&tpda_in_tpdm_pimem>; }; }; }; }; tpdm_vsense: tpdm@6840000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x6840000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-vsense"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_vsense_out_tpda: endpoint { remote-endpoint = <&tpda_in_tpdm_vsense>; }; }; }; }; tpda_olc: tpda@7832000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b969>; reg = <0x7832000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-olc"; qcom,tpda-atid = <69>; qcom,cmb-elem-size = <0 64>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpda_olc_out_funnel_apss_merg: endpoint { remote-endpoint = <&funnel_apss_merg_in_tpda_olc>; }; }; }; in-ports { port { tpda_olc_in_tpdm_olc: endpoint { remote-endpoint = <&tpdm_olc_out_tpda_olc>; }; }; }; }; tpdm_olc: tpdm@7830000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b968>; reg = <0x7830000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-olc"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_olc_out_tpda_olc: endpoint { remote-endpoint = <&tpda_olc_in_tpdm_olc>; }; }; }; }; funnel_qatb: funnel@6005000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x6005000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-qatb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { funnel_qatb_out_funnel_in0: endpoint { remote-endpoint = <&funnel_in0_in_funnel_qatb>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <0>; funnel_qatb_in_tpda: endpoint { remote-endpoint = <&tpda_out_funnel_qatb>; }; }; port@2 { reg = <4>; funnel_qatb_in_funnel_lpass_1: endpoint { remote-endpoint = <&funnel_lpass_1_out_funnel_qatb>; }; }; port@3 { reg = <5>; funnel_qatb_in_funnel_turing_1: endpoint { remote-endpoint = <&funnel_turing_1_out_funnel_qatb>; }; }; }; }; cti0_apss: cti@78e0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x78e0000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-apss_cti0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti1_apss: cti@78f0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x78f0000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-apss_cti1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti2_apss: cti@7900000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x7900000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-apss_cti2"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti0_ddr0: cti@6a02000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6a02000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-ddr_dl_0_cti_0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti1_ddr0: cti@6a03000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6a03000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-ddr_dl_0_cti_1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti0_ddr1: cti@6a10000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6a10000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-ddr_dl_1_cti_0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti1_ddr1: cti@6a11000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6a11000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-ddr_dl_1_cti_1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti0_dlmm: cti@6c09000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6c09000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-dlmm_cti0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti1_dlmm: cti@6c0a000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6c0a000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-dlmm_cti1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti0_dlct: cti@6c29000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6c29000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-dlct_cti0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti1_dlct: cti@6c2a000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6c2a000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-dlct_cti1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti0: cti@6010000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6010000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti1: cti@6011000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6011000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti2: cti@6012000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6012000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti2"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,cti-gpio-trigout = <4>; pinctrl-names = "cti-trigout-pctrl"; pinctrl-0 = <&trigout_a>; }; cti3: cti@6013000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6013000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti3"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti4: cti@6014000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6014000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti4"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti5: cti@6015000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6015000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti5"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti6: cti@6016000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6016000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti6"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti7: cti@6017000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6017000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti7"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti8: cti@6018000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6018000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti8"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti9: cti@6019000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6019000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti9"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti10: cti@601a000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x601a000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti10"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti11: cti@601b000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x601b000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti11"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti12: cti@601c000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x601c000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti12"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti13: cti@601d000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x601d000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti13"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti14: cti@601e000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x601e000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti14"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti15: cti@601f000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x601f000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti15"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti_cpu0: cti@7020000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x7020000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-cpu0"; cpu = <&CPU0>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti_cpu1: cti@7120000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x7120000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-cpu1"; cpu = <&CPU1>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti_cpu2: cti@7220000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x7220000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-cpu2"; cpu = <&CPU2>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti_cpu3: cti@7320000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x7320000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-cpu3"; cpu = <&CPU3>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti_cpu4: cti@7420000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x7420000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-cpu4"; cpu = <&CPU4>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti_cpu5: cti@7520000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x7520000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-cpu5"; cpu = <&CPU5>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti_cpu6: cti@7620000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x7620000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-cpu6"; cpu = <&CPU6>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti_cpu7: cti@7720000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x7720000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-cpu7"; cpu = <&CPU7>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti0_swao:cti@6b04000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b966>; reg = <0x6b04000 0x1000>; reg-names = "cti-base"; coresight-name = "coresight-cti-swao_cti0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; ipcb_tgu: tgu@6b0c000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b999>; reg = <0x06B0C000 0x1000>; reg-names = "tgu-base"; tgu-steps = <3>; tgu-conditions = <4>; tgu-regs = <4>; tgu-timer-counters = <8>; coresight-name = "coresight-tgu-ipcb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; turing_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-name = "coresight-turing-etm0"; qcom,inst-id = <13>; out-ports { port { turing_etm0_out_funnel_turing_1: endpoint { remote-endpoint = <&funnel_turing_1_in_turing_etm0>; }; }; }; }; dummy_eud: dummy_sink { compatible = "qcom,coresight-dummy"; coresight-name = "coresight-eud"; qcom,dummy-sink; out-ports { port { eud_in_replicator_swao: endpoint { remote-endpoint = <&replicator_swao_out_eud>; }; }; }; }; modem_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-name = "coresight-modem-etm0"; qcom,inst-id = <2>; out-ports { port { modem_etm0_out_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_in_modem_etm0>; }; }; }; }; audio_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-name = "coresight-audio-etm0"; qcom,inst-id = <5>; out-ports { port { audio_etm0_out_funnel_lpass_1: endpoint { remote-endpoint = <&funnel_lpass_1_in_audio_etm0>; }; }; }; }; ssc_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-name = "coresight-ssc-etm0"; qcom,inst-id = <8>; out-ports { port { ssc_etm0_out_funnel_swao: endpoint { remote-endpoint = <&funnel_swao_in_ssc_etm0>; }; }; }; }; funnel_apss_merg: funnel@7810000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x7810000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-apss-merg"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port@0 { reg = <0>; funnel_apss_merg_out_funnel_in2: endpoint { remote-endpoint = <&funnel_in2_in_funnel_apss_merg>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <0>; funnel_apss_merg_in_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_out_funnel_apss_merg>; }; }; port@2 { reg = <2>; funnel_apss_merg_in_tpda_olc: endpoint { remote-endpoint = <&tpda_olc_out_funnel_apss_merg>; }; }; port@3 { reg = <3>; funnel_apss_merg_in_tpda_llm_silver: endpoint { remote-endpoint = <&tpda_llm_silver_out_funnel_apss_merg>; }; }; port@4 { reg = <4>; funnel_apss_merg_in_tpda_llm_gold: endpoint { remote-endpoint = <&tpda_llm_gold_out_funnel_apss_merg>; }; }; port@5 { reg = <5>; funnel_apss_merg_in_tpda_apss: endpoint { remote-endpoint = <&tpda_apss_out_funnel_apss_merg>; }; }; }; }; etm0: etm@7040000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x7040000 0x1000>; cpu = <&CPU0>; qcom,tupwr-disable; coresight-name = "coresight-etm0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { etm0_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm0>; }; }; }; }; etm1: etm@7140000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x7140000 0x1000>; cpu = <&CPU1>; qcom,tupwr-disable; coresight-name = "coresight-etm1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { etm1_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm1>; }; }; }; }; etm2: etm@7240000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x7240000 0x1000>; cpu = <&CPU2>; qcom,tupwr-disable; coresight-name = "coresight-etm2"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { etm2_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm2>; }; }; }; }; etm3: etm@7340000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x7340000 0x1000>; cpu = <&CPU3>; qcom,tupwr-disable; coresight-name = "coresight-etm3"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { etm3_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm3>; }; }; }; }; etm4: etm@7440000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x7440000 0x1000>; cpu = <&CPU4>; qcom,tupwr-disable; coresight-name = "coresight-etm4"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { etm4_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm4>; }; }; }; }; etm5: etm@7540000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x7540000 0x1000>; cpu = <&CPU5>; qcom,tupwr-disable; coresight-name = "coresight-etm5"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { etm5_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm5>; }; }; }; }; etm6: etm@7640000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x7640000 0x1000>; cpu = <&CPU6>; qcom,tupwr-disable; coresight-name = "coresight-etm6"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { etm6_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm6>; }; }; }; }; etm7: etm@7740000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x7740000 0x1000>; cpu = <&CPU7>; qcom,tupwr-disable; coresight-name = "coresight-etm7"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { etm7_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm7>; }; }; }; }; funnel_apss: funnel@7800000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x7800000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-apss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port@0 { reg = <0>; funnel_apss_out_funnel_apss_merg: endpoint { remote-endpoint = <&funnel_apss_merg_in_funnel_apss>; }; }; }; in-ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <0>; funnel_apss_in_etm0: endpoint { remote-endpoint = <&etm0_out_funnel_apss>; }; }; port@2 { reg = <1>; funnel_apss_in_etm1: endpoint { remote-endpoint = <&etm1_out_funnel_apss>; }; }; port@3 { reg = <2>; funnel_apss_in_etm2: endpoint { remote-endpoint = <&etm2_out_funnel_apss>; }; }; port@4 { reg = <3>; funnel_apss_in_etm3: endpoint { remote-endpoint = <&etm3_out_funnel_apss>; }; }; port@5 { reg = <4>; funnel_apss_in_etm4: endpoint { remote-endpoint = <&etm4_out_funnel_apss>; }; }; port@6 { reg = <5>; funnel_apss_in_etm5: endpoint { remote-endpoint = <&etm5_out_funnel_apss>; }; }; port@7 { reg = <6>; funnel_apss_in_etm6: endpoint { remote-endpoint = <&etm6_out_funnel_apss>; }; }; port@8 { reg = <7>; funnel_apss_in_etm7: endpoint { remote-endpoint = <&etm7_out_funnel_apss>; }; }; }; }; };