50 lines
1.7 KiB
Text
50 lines
1.7 KiB
Text
Qualcomm Technologies, Inc. GENI I3C master block
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Generic bindings document for GENI I3C master controller driver.
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Required properties:
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- compatible: shall be "qcom,geni-i3c".
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- clocks: shall reference the se clock.
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- clock-names: shall contain clock name corresponding to the serial engine.
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- interrupts: the interrupt line connected to this I3C master.
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- reg: I3C master registers.
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- qcom,wrapper-core: Wrapper QUPv3 core containing this I3C controller.
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- qcom,ibi-ctrl-id: IBI controller instance number.
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Optional properties:
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- se-clock-frequency: Source serial clock frequency to use.
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- dfs-index: Dynamic frequency scaling table index to use.
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Mandatory properties defined by the generic binding (see
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Documentation/devicetree/bindings/i3c/i3c.txt for more details):
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- #address-cells: shall be set to 3.
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- #size-cells: shall be set to 0.
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Optional properties defined by the generic binding (see
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Documentation/devicetree/bindings/i3c/i3c.txt for more details):
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- i2c-scl-hz: frequency for i2c transfers.
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- i3c-scl-hz: frequency for i3c transfers.
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I3C device connected on the bus follow the generic description (see
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Documentation/devicetree/bindings/i3c/i3c.txt for more details).
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Example:
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i3c0: i3c-master@980000 {
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compatible = "qcom,geni-i3c";
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reg = <0x980000 0x4000>,
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<0xec30000 0x10000>;
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clock-names = "se-clk", "m-ahb", "s-ahb";
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clocks = <&clock_gcc GCC_QUPV3_WRAP0_S0_CLK>,
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<&clock_gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
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<&clock_gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&qupv3_se0_i3c_active>;
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pinctrl-1 = <&qupv3_se0_i3c_sleep>;
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interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <3>;
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#size-cells = <0>;
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qcom,wrapper-core = <&qupv3_0>;
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qcom,ibi-ctrl-id = <0>;
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};
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