135 lines
3.5 KiB
Text
135 lines
3.5 KiB
Text
Qualcomm Technologies, Inc. SLPI Pin controller
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This DT bindings describes the Pin controller driver
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being added for supporting SLPI (Sensor Low Power Island) TLMM
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from QTI chipsets.
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Following properties are for SLPI Pin controller device main node.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be "qcom,slpi-pinctrl"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Base address and size of the SLPI TLMM register space.
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- qcom,num-pins:
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Usage: required
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Value type: <u32>
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Definition: Number of PINs supported by the SLPI TLMM.
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- clock-names:
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Usage: required
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value type: <string>
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Definition: Should be "ssc-clk"
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- clocks:
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Usage: required
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value type: Phandle to ssc clk device node
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Definition: Handles to clocks specified in "clock-names" property.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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The pin configuration nodes act as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for a
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pin or a list of pins. This configuration can include the
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mux function to select on those pin(s), and various pin configuration
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parameters, as listed below.
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SUBNODES:
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The name of each subnode is not important; all subnodes should be enumerated
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and processed purely based on their content.
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Each subnode only affects those parameters that are explicitly listed. In
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other words, a subnode that lists a mux function but no pin configuration
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parameters implies no information about any pin configuration parameters.
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Similarly, a pin subnode that describes a pullup parameter implies no
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information about e.g. the mux function.
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The following generic properties as defined in pinctrl-bindings.txt are valid
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to specify in a pin configuration subnode:
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- pins:
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Usage: required
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Value type: <string-array>
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Definition: List of gpio pins affected by the properties specified in
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this subnode. Valid pins are: gpio0-gpio31 for LPI.
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- function:
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Usage: required
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Value type: <string>
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Definition: Specify the alternative function to be configured for the
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specified pins. Valid values are:
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"gpio",
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"func1",
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"func2",
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"func3",
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"func4",
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"func5"
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- bias-disable:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as no pull.
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- bias-pull-down:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as pull down.
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- bias-bus-hold:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as bus-keeper mode.
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- bias-pull-up:
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Usage: optional
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Value type: <empty>
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Definition: The specified pins should be configured as pull up.
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- qcom,drive-strength:
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Usage: optional
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Value type: <u32>
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Definition: Selects the drive strength for the specified pins.
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Example:
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slpi_tlmm: slpi_pinctrl@2b40000 {
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compatible = "qcom,slpi-pinctrl";
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qcom,num-pins = <14>;
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clock-names = "ssc-clk";
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clocks = <&clock_scc SCC_QUPV3_S_HCLK_CLK>;
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reg = <0x02b40000 0x20000>;
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slpi_mclk0_active: slpi_mclk0_active {
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mux {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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function = "func2";
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};
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config {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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drive-strength = <8>;
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bias-disable;
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};
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};
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slpi_mclk0_sleep: slpi_mclk0_sleep {
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mux {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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function = "func2";
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};
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config {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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