64 lines
2.6 KiB
Text
64 lines
2.6 KiB
Text
* Qualcomm Technologies, Inc. Timestamp Counter(TSC) based PTP clock
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TSC module is a timestamp generator, which runs a 64 bit counter for
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system timekeeping.
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ETU is event timestamp module, which captures the timestamp from TSC
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and global counter bus for a given event. The event is selected from
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a set of GPIOs and SW triggered events. The design is parameterized
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to detect multiple events, using different “slices”.
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One slice is used for every event.
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Required properties:
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- compatible: should contain the compatibility string.
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"qcom,tsc"
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- reg: address and length of the TSC registers.
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Address and length of the ETU registers(optional).
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- reg-names: must contain "tsc", "etu" (optional).
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- clocks: list of clock phandles required to access TSC/ETU.
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- clock-names: list of clock names for the above clock phandles.
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- assigned-clocks: clock phandles to assign clock rates.
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- assigned-clock-rates: clock rates in HZ.
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Optional properties:
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- qcom,tsc-nsec-update: boolean property to indicate the TSC counters
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have values in nanoseconds, rather than in secs
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and nanoseconds.
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- qcom,tsc-hw-preload: boolean property to indicate the TSC supports
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the hw preload feature.
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- qcom,etu-slice: array of ETU slice numbers corresponding to the ETU sel.
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In case this property is not defined the sel number will be
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considered as the slice number for ETU offset calculation.
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- qcom,etu-event-sel: array of ETU event sel numbers for the corresponding
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ETU slice numbers.
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- qcom,etu-event-names: ETU event sel names for the corresponding
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event sel numbers.
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- interrupts: interrupt numbers associated with the ETU slice.
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- interrupt-names: names corresponding to the above interrupt numbers.
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- pinctrl-<#> : pinctrl configurations
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- pinctrl-names: pinctrl names
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Example:
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tsc@1da0000 {
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compatible = "qcom,tsc";
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reg = <0x1da0000 0x2000>, <0x01db0000 0x10000>;
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reg-names = "tsc", "etu";
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clocks = <&gcc GCC_TSC_CFG_AHB_CLK>, <&gcc GCC_TSC_CNTR_CLK >,
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<&gcc GCC_TSC_ETU_CLK>;
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clock-names = "cfg_ahb", "cntr", "etu";
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assigned-clocks = <&gcc GCC_TSC_CNTR_CLK>, <&gcc GCC_TSC_ETU_CLK>;
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assigned-clock-rates = <500000000> , <500000000>;
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qcom,etu-slice = <1 5>;
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qcom,etu-event-sel = <1 3>;
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qcom,etu-event-names = "gps_pps", "tod_pps";
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interrupts = <GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "tod_pps", "gps_pps";
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pinctrl-names = "default";
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pinctrl-0 = <&etu_tod_pps_active>, <&etu_gps_pps_active>;
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};
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