328 lines
10 KiB
Text
328 lines
10 KiB
Text
#include <bindings/qcom,audio-ext-clk.h>
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#include <bindings/qcom,bolero-clk-rsc.h>
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#include <bindings/audio-codec-port-types.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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&bolero_cdc {
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qcom,num-macros = <3>;
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qcom,bolero-version = <5>;
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bolero-clk-rsc-mngr {
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compatible = "qcom,bolero-clk-rsc-mngr";
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qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
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<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
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qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
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qcom,va_mclk_mode_muxsel = <0x0a7a0000>;
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clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
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"va_core_clk", "va_npl_clk";
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clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
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<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
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<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
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};
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tx_macro: tx-macro@a620000 {
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compatible = "qcom,tx-macro";
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reg = <0xa620000 0x0>;
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clock-names = "tx_core_clk", "tx_npl_clk";
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clocks = <&clock_audio_tx_1 0>,
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<&clock_audio_tx_2 0>;
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qcom,tx-dmic-sample-rate = <2400000>;
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qcom,is-used-swr-gpio = <0>;
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};
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rx_macro: rx-macro@a600000 {
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compatible = "qcom,rx-macro";
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reg = <0xa600000 0x0>;
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clock-names = "rx_core_clk", "rx_npl_clk";
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clocks = <&clock_audio_rx_1 0>,
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<&clock_audio_rx_2 0>;
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qcom,rx-swr-gpios = <&rx_swr_gpios>;
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qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
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qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>;
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qcom,default-clk-id = <TX_CORE_CLK>;
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swr1: rx_swr_master {
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compatible = "qcom,swr-mstr";
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#address-cells = <2>;
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#size-cells = <0>;
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clock-names = "lpass_audio_hw_vote";
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clocks = <&lpass_audio_hw_vote 0>;
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qcom,swr-master-version = <0x01060000>;
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qcom,swr_master_id = <2>;
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qcom,swrm-hctl-reg = <0x0a6a9098>;
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qcom,mipi-sdw-block-packing-mode = <1>;
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swrm-io-base = <0xa610000 0x0>;
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interrupts = <0 297 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "swr_master_irq";
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qcom,swr-num-ports = <5>;
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qcom,swr-port-mapping = <1 HPH_L 0x1>,
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<1 HPH_R 0x2>, <2 CLSH 0x1>,
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<3 COMP_L 0x1>, <3 COMP_R 0x2>,
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<4 LO 0x1>, <5 DSD_L 0x1>,
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<5 DSD_R 0x2>;
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qcom,swr-num-dev = <1>;
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qcom,disable-div2-clk-switch = <1>;
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qcom,swr-clock-stop-mode0 = <1>;
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wcd937x_rx_slave: wcd937x-rx-slave {
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compatible = "qcom,wcd937x-slave";
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reg = <0x0A 0x01170224>;
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};
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};
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};
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va_macro: va-macro@a730000 {
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compatible = "qcom,va-macro";
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reg = <0xa730000 0x0>;
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clock-names = "lpass_audio_hw_vote";
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clocks = <&lpass_audio_hw_vote 0>;
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qcom,va-dmic-sample-rate = <600000>;
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qcom,va-clk-mux-select = <1>;
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qcom,va-island-mode-muxsel = <0x0a7a0000>;
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qcom,default-clk-id = <TX_CORE_CLK>;
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qcom,is-used-swr-gpio = <1>;
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qcom,va-swr-gpios = <&va_swr_gpios>;
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swr0: va_swr_master {
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compatible = "qcom,swr-mstr";
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#address-cells = <2>;
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#size-cells = <0>;
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clock-names = "lpass_audio_hw_vote";
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clocks = <&lpass_audio_hw_vote 0>;
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qcom,swr-master-version = <0x01060000>;
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qcom,swr_master_id = <3>;
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qcom,swrm-hctl-reg = <0x0a7ec100>;
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qcom,mipi-sdw-block-packing-mode = <1>;
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swrm-io-base = <0xa740000 0x0>;
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interrupts =
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<0 296 IRQ_TYPE_LEVEL_HIGH>,
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<0 79 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "swr_master_irq", "swr_wake_irq";
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qcom,swr-wakeup-required = <1>;
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qcom,swr-num-ports = <3>;
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qcom,swr-port-mapping = <1 SWRM_TX1_CH1 0x1>,
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<1 SWRM_TX1_CH2 0x2>,
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<1 SWRM_TX1_CH3 0x4>, <1 SWRM_TX1_CH4 0x8>,
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<2 SWRM_TX2_CH1 0x1>, <2 SWRM_TX2_CH2 0x2>,
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<2 SWRM_TX2_CH3 0x4>, <2 SWRM_TX2_CH4 0x8>,
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<3 SWRM_TX3_CH1 0x1>, <3 SWRM_TX3_CH2 0x2>,
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<3 SWRM_TX3_CH3 0x4>, <3 SWRM_TX3_CH4 0x8>;
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qcom,swr-num-dev = <1>;
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qcom,swr-clock-stop-mode0 = <1>;
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qcom,swr-mstr-irq-wakeup-capable = <1>;
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qcom,is-always-on = <1>;//check
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wcd937x_tx_slave: wcd937x-tx-slave {
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compatible = "qcom,wcd937x-slave";
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reg = <0x0A 0x01170223>;
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};
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};
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};
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wcd937x_codec: wcd937x-codec {
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compatible = "qcom,wcd937x-codec";
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qcom,split-codec = <1>;
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qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
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<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
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<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
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<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
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<4 DSD_R 0x2 0 DSD_R>;
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qcom,tx_swr_ch_map = <0 ADC1 0x1 4800000 SWRM_TX1_CH1>,
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<1 ADC2 0x1 4800000 SWRM_TX2_CH1>,
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<1 ADC3 0x2 4800000 SWRM_TX2_CH2>,
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<2 DMIC0 0x1 0 SWRM_TX1_CH4>,
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<2 DMIC1 0x2 0 SWRM_TX2_CH1>,
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<2 MBHC 0x4 4800000 SWRM_TX2_CH2>,
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<3 DMIC2 0x1 0 SWRM_TX2_CH3>,
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<3 DMIC3 0x2 0 SWRM_TX2_CH4>,
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<3 DMIC4 0x4 0 SWRM_TX3_CH1>,
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<3 DMIC5 0x8 0 SWRM_TX3_CH2>;
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qcom,swr-tx-port-params =
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<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
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<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
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<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL2 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL2 LANE0>,
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<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>;
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qcom,wcd-rst-gpio-node = <&wcd937x_rst_gpio>;
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qcom,rx-slave = <&wcd937x_rx_slave>;
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qcom,tx-slave = <&wcd937x_tx_slave>;
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cdc-vdd-rxtx-supply = <&L9A>;
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qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
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qcom,cdc-vdd-rxtx-current = <10000>;
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cdc-vddpx-supply = <&L9A>;
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qcom,cdc-vddpx-voltage = <1800000 1800000>;
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qcom,cdc-vddpx-current = <20000>;
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cdc-vdd-buck-supply = <&L14A>;
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qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
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qcom,cdc-vdd-buck-current = <650000>;
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qcom,cdc-micbias1-mv = <1800>;
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qcom,cdc-micbias2-mv = <1800>;
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qcom,cdc-micbias3-mv = <1800>;
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qcom,cdc-static-supplies = "cdc-vdd-rxtx",
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"cdc-vddpx";
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qcom,cdc-on-demand-supplies = "cdc-vdd-buck";
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};
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};
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&spf_core_platform {
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bengal_snd: sound {
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qcom,model = "bengal-idp-snd-card";
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qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
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qcom,wcn-btfm = <1>;
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qcom,va-bolero-codec = <1>;
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qcom,rxtx-bolero-codec = <1>;
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qcom,audio-routing =
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"AMIC1", "Analog Mic1",
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"AMIC1", "MIC BIAS1",
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"AMIC2", "Analog Mic2",
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"AMIC2", "MIC BIAS2",
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"AMIC3", "Analog Mic3",
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"AMIC3", "MIC BIAS3",
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"TX DMIC0", "Digital Mic0",
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"TX DMIC0", "MIC BIAS1",
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"TX DMIC1", "Digital Mic1",
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"TX DMIC1", "MIC BIAS1",
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"TX DMIC2", "Digital Mic2",
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"TX DMIC2", "MIC BIAS3",
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"TX DMIC3", "Digital Mic3",
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"TX DMIC3", "MIC BIAS3",
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"IN1_HPHL", "HPHL_OUT",
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"IN2_HPHR", "HPHR_OUT",
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"IN3_AUX", "AUX_OUT",
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"RX_TX DEC0_INP", "TX DEC0 MUX",
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"RX_TX DEC1_INP", "TX DEC1 MUX",
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"RX_TX DEC2_INP", "TX DEC2 MUX",
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"RX_TX DEC3_INP", "TX DEC3 MUX",
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"SpkrMono WSA_IN", "AUX",
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"TX SWR_INPUT", "WCD_TX_OUTPUT",
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"VA SWR_INPUT", "VA_SWR_CLK",
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"VA SWR_INPUT", "WCD_TX_OUTPUT",
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"TX_AIF1 CAP", "VA_SWR_CLK",
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"TX_AIF2 CAP", "VA_SWR_CLK",
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"TX_AIF3 CAP", "VA_SWR_CLK",
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"VA DMIC0", "Digital Mic0",
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"VA DMIC1", "Digital Mic1",
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"VA DMIC2", "Digital Mic2",
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"VA DMIC3", "Digital Mic3",
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"VA DMIC0", "VA MIC BIAS1",
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"VA DMIC1", "VA MIC BIAS1",
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"VA DMIC2", "VA MIC BIAS3",
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"VA DMIC3", "VA MIC BIAS3";
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qcom,msm-mbhc-usbc-audio-supported = <0>;
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qcom,msm-mbhc-hphl-swh = <1>;
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qcom,msm-mbhc-gnd-swh = <1>;
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qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
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qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>;
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nvmem-cells = <&adsp_variant>;
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nvmem-cell-names = "adsp_variant";
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asoc-codec = <&stub_codec>, <&bolero_cdc>,
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<&wcd937x_codec> , <&wsa881x_i2c_e>;
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asoc-codec-names = "msm-stub-codec.1", "bolero-codec",
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"wcd937x_codec", "wsa-codec0";
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qcom,wsa-max-devs = <1>;
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//qcom,wsa-devs = <&wsa881x_i2c_e>;
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qcom,wsa-aux-dev-prefix = "SpkrMono";
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qcom,msm_audio_ssr_devs = <&audio_gpr>, <&bolero_cdc>,
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<&lpi_tlmm>;
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};
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};
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&qupv3_se1_i2c {
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wsa881x_i2c_e: wsa881x-i2c-codec@e {
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compatible = "qcom,wsa881x-i2c-codec";
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reg = <0x0e>;
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clock-names = "wsa_mclk";
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clocks = <&wsa881x_analog_clk 0>;
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qcom,wsa-analog-clk-gpio = <&wsa881x_analog_clk_gpio>;
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qcom,wsa-analog-reset-gpio = <&wsa881x_analog_reset_gpio>;
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qcom,wsa-prefix = "SpkrMono";
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};
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wsa881x_i2c_44: wsa881x-i2c-codec@44 {
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compatible = "qcom,wsa881x-i2c-codec";
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reg = <0x044>;
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};
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};
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&soc {
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wcd937x_rst_gpio: msm_cdc_pinctrl@92 {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&wcd937x_reset_active>;
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pinctrl-1 = <&wcd937x_reset_sleep>;
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#gpio-cells = <0>;
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};
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wsa881x_analog_reset_gpio: msm_cdc_pinctrl@106 {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&spkr_1_sd_n_active>;
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pinctrl-1 = <&spkr_1_sd_n_sleep>;
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#gpio-cells = <0>;
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};
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wsa881x_analog_clk: wsa_ana_clk {
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compatible = "qcom,audio-ref-clk";
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qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_2>;
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qcom,codec-lpass-ext-clk-freq = <9600000>;
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qcom,codec-lpass-clk-id = <0x301>;
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#clock-cells = <1>;
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};
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clock_audio_rx_1: rx_core_clk {
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compatible = "qcom,audio-ref-clk";
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qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
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qcom,codec-lpass-ext-clk-freq = <22579200>;
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qcom,codec-lpass-clk-id = <0x30E>;
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#clock-cells = <1>;
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};
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clock_audio_rx_2: rx_npl_clk {
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compatible = "qcom,audio-ref-clk";
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qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
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qcom,codec-lpass-ext-clk-freq = <22579200>;
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qcom,codec-lpass-clk-id = <0x30F>;
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#clock-cells = <1>;
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};
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clock_audio_tx_1: tx_core_clk {
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compatible = "qcom,audio-ref-clk";
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qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
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qcom,codec-lpass-ext-clk-freq = <19200000>;
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qcom,codec-lpass-clk-id = <0x30C>;
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#clock-cells = <1>;
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};
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clock_audio_tx_2: tx_npl_clk {
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compatible = "qcom,audio-ref-clk";
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qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
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qcom,codec-lpass-ext-clk-freq = <19200000>;
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qcom,codec-lpass-clk-id = <0x30D>;
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#clock-cells = <1>;
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};
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clock_audio_va_1: va_core_clk {
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compatible = "qcom,audio-ref-clk";
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qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
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qcom,codec-lpass-ext-clk-freq = <19200000>;
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qcom,codec-lpass-clk-id = <0x30B>;
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#clock-cells = <1>;
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};
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clock_audio_va_2: va_npl_clk {
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compatible = "qcom,audio-ref-clk";
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qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
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qcom,codec-lpass-ext-clk-freq = <19200000>;
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qcom,codec-lpass-clk-id = <0x310>;
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#clock-cells = <1>;
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};
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};
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&adsp_loader {
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nvmem-cells = <&adsp_variant>;
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nvmem-cell-names = "adsp_variant";
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adsp-fw-names = "adsp2";
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adsp-fw-bit-values = <0x1>;
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};
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