180 lines
4.1 KiB
Text
180 lines
4.1 KiB
Text
#include "sm8150-gpu.dtsi"
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/* GPU power level overrides */
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&msm_gpu {
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/* Updated chip ID */
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qcom,chipid = <0x06040001>;
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/* Power level to start throttling */
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qcom,throttle-pwrlevel = <0>;
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qcom,bus-table-ddr =
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<MHZ_TO_KBPS(0, 4)>, /* index=0 */
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<MHZ_TO_KBPS(200, 4)>, /* index=1 */
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<MHZ_TO_KBPS(300, 4)>, /* index=2 */
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<MHZ_TO_KBPS(451, 4)>, /* index=3 */
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<MHZ_TO_KBPS(547, 4)>, /* index=4 */
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<MHZ_TO_KBPS(681, 4)>, /* index=5 */
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<MHZ_TO_KBPS(768, 4)>, /* index=6 */
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<MHZ_TO_KBPS(1017, 4)>, /* index=7 */
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<MHZ_TO_KBPS(1353, 4)>, /* index=8 */
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<MHZ_TO_KBPS(1555, 4)>, /* index=9 */
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<MHZ_TO_KBPS(1804, 4)>, /* index=10 */
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<MHZ_TO_KBPS(2092, 4)>; /* index=11 */
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/delete-property/qcom,initial-pwrlevel;
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/delete-node/qcom,gpu-pwrlevels;
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/delete-node/qcom,gpu-pwrlevel-bins;
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qcom,gpu-pwrlevel-bins {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible="qcom,gpu-pwrlevel-bins";
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qcom,gpu-pwrlevels-0 {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,speed-bin = <0>;
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qcom,initial-pwrlevel = <4>;
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <700000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <8>;
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qcom,bus-max = <11>;
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};
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <675000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
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qcom,bus-freq = <8>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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};
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <585000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
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qcom,bus-freq = <7>;
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qcom,bus-min = <6>;
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qcom,bus-max = <11>;
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};
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <500000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
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qcom,bus-freq = <7>;
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qcom,bus-min = <6>;
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qcom,bus-max = <11>;
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};
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-freq = <427000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <5>;
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qcom,bus-max = <9>;
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};
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/* Vote for SVS_L1 voltage for 345MHz instead of SVS */
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-freq = <345000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <3>;
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qcom,bus-min = <3>;
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qcom,bus-max = <8>;
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};
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/* Vote for SVS_L1 voltage for 257MHz instead of LOW_SVS */
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qcom,gpu-pwrlevel@6 {
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reg = <6>;
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qcom,gpu-freq = <257000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <2>;
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qcom,bus-min = <1>;
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qcom,bus-max = <8>;
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};
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qcom,gpu-pwrlevel@7 {
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reg = <7>;
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qcom,gpu-freq = <0>;
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qcom,level = <RPMH_REGULATOR_LEVEL_RETENTION>;
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qcom,bus-freq = <0>;
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qcom,bus-min = <0>;
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qcom,bus-max = <0>;
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};
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};
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qcom,gpu-pwrlevels-1 {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,speed-bin = <1>;
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qcom,initial-pwrlevel = <2>;
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <500000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
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qcom,bus-freq = <7>;
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qcom,bus-min = <6>;
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qcom,bus-max = <11>;
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};
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <427000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <5>;
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qcom,bus-max = <9>;
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};
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/* Vote for SVS_L1 voltage for 345MHz instead of SVS */
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <345000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <3>;
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qcom,bus-min = <3>;
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qcom,bus-max = <8>;
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};
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/* Vote for SVS_L1 voltage for 257MHz instead of LOW_SVS */
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <257000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <2>;
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qcom,bus-min = <1>;
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qcom,bus-max = <8>;
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};
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-freq = <0>;
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qcom,level = <RPMH_REGULATOR_LEVEL_RETENTION>;
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qcom,bus-freq = <0>;
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qcom,bus-min = <0>;
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qcom,bus-max = <0>;
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};
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};
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};
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};
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&gmu {
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reg = <0x2c6a000 0x30000>,
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<0xb290000 0x10000>,
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<0xb490000 0x10000>;
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reg-names = "kgsl_gmu_reg",
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"kgsl_gmu_pdc_cfg",
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"kgsl_gmu_pdc_seq";
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};
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