200 lines
3.4 KiB
Text
200 lines
3.4 KiB
Text
#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/qcom,gcc-kalama.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include "kalama-pmic-overlay.dtsi"
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&chosen {
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};
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&arch_timer {
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clock-frequency = <192000>;
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};
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&memtimer {
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clock-frequency = <192000>;
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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usb_nop_phy: usb_nop_phy {
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compatible = "usb-nop-xceiv";
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};
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usb_emu_phy: phy@a784000 {
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compatible = "qcom,usb-emu-phy";
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reg = <0x0a784000 0x9500>;
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qcom,emu-init-seq = <0x100000 0x20
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0x0 0x20
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0x000101F0 0x20
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0x00100000 0x3c
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0x0 0x3c
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0x0010060 0x3c>;
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};
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pcie0: qcom,pcie@1c00000 {
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reg = <0x01c00000 0x3000>,
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<0x01c06000 0x2000>,
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<0x60000000 0xf1d>,
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<0x60000f20 0xa8>,
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<0x60001000 0x1000>,
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<0x60100000 0x100000>,
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<0x01c05000 0x1000>;
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reg-names = "parf", "phy", "dm_core", "elbi", "iatu", "conf",
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"rumi";
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linux,pci-domain = <0>;
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qcom,target-link-speed = <0x1>;
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qcom,link-check-max-count = <200>; /* 1 sec */
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qcom,no-l0s-supported;
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qcom,no-l1-supported;
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qcom,no-l1ss-supported;
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qcom,no-aux-clk-sync;
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status = "ok";
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};
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};
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&usb_qmp_dp_phy {
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status = "disabled";
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};
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&eusb2_phy0 {
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status = "disabled";
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};
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&usb0 {
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dwc3@a600000 {
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usb-phy = <&usb_emu_phy>, <&usb_nop_phy>;
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dr_mode = "peripheral";
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maximum-speed = "high-speed";
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};
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};
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&sdhc_2 {
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status = "ok";
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vdd-supply = <&pm_humu_l9>;
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qcom,vdd-voltage-level = <2950000 2960000>;
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qcom,vdd-current-level = <0 800000>;
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vdd-io-supply = <&pm_humu_l8>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 5600>;
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cap-sd-highspeed;
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max-frequency = <50000000>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
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qcom,iommu-dma = "bypass";
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};
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&ufsphy_mem {
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compatible = "qcom,ufs-phy-qrbtc-sdm845";
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vdda-phy-supply = <&pm_v6e_l1>;
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vdda-pll-supply = <&pm_v6e_l3>;
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vdda-phy-max-microamp = <154000>;
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vdda-pll-max-microamp = <19100>;
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status = "ok";
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};
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&ufshc_mem {
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limit-tx-hs-gear = <1>;
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limit-rx-hs-gear = <1>;
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limit-rate = <2>; /* HS Rate-B */
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vcc-supply = <&pm_humu_l17>;
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vcc-max-microamp = <1300000>;
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vccq-supply = <&pm_v6g_l1>;
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vccq-max-microamp = <1200000>;
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qcom,vddp-ref-clk-supply = <&pm_v6g_l1>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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qcom,disable-lpm;
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rpm-level = <0>;
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spm-level = <0>;
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qcom,iommu-dma = "bypass";
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clock-names =
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"core_clk",
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"bus_aggr_clk",
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"iface_clk",
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"core_clk_unipro",
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"core_clk_ice",
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"ref_clk",
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"tx_lane0_sync_clk",
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"rx_lane0_sync_clk",
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"rx_lane1_sync_clk";
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clocks =
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<&gcc GCC_UFS_PHY_AXI_CLK>,
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<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
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<&gcc GCC_UFS_PHY_AHB_CLK>,
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<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
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<&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
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<&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
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<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
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<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
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freq-table-hz =
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<75000000 300000000>,
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<0 0>,
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<0 0>,
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<75000000 300000000>,
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<100000000 403000000>,
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<0 0>,
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<0 0>,
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<0 0>,
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<0 0>;
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status = "ok";
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};
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&SILVER_OFF {
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status = "nok";
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};
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&GOLD_OFF {
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status = "nok";
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};
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&CLUSTER_PWR_DN {
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status = "nok";
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};
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&APSS_OFF {
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status = "nok";
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};
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&tsens0 {
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status = "disabled";
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};
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&tsens1 {
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status = "disabled";
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};
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&tsens2 {
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status = "disabled";
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};
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&bwmon_ddr {
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qcom,hw-timer-hz = <192000>;
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};
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&bwmon_llcc {
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qcom,hw-timer-hz = <192000>;
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};
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