53 lines
1.7 KiB
C
53 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_SDM_GPU_CC_SDM845_H
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#define _DT_BINDINGS_CLK_SDM_GPU_CC_SDM845_H
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/* GPUCC clock registers */
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#define GPU_CC_ACD_AHB_CLK 0
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#define GPU_CC_ACD_CXO_CLK 1
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#define GPU_CC_CRC_AHB_CLK 2
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#define GPU_CC_CX_APB_CLK 3
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#define GPU_CC_CX_GMU_CLK 4
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#define GPU_CC_CX_QDSS_AT_CLK 5
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#define GPU_CC_CX_QDSS_TRIG_CLK 6
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#define GPU_CC_CX_QDSS_TSCTR_CLK 7
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#define GPU_CC_CX_SNOC_DVM_CLK 8
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#define GPU_CC_CXO_AON_CLK 9
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#define GPU_CC_CXO_CLK 10
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#define GPU_CC_GX_GMU_CLK 11
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#define GPU_CC_GX_QDSS_TSCTR_CLK 12
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#define GPU_CC_GX_VSENSE_CLK 13
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#define GPU_CC_PLL0 14
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#define GPU_CC_PLL0_OUT_EVEN 15
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#define GPU_CC_PLL0_OUT_MAIN 16
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#define GPU_CC_PLL0_OUT_ODD 17
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#define GPU_CC_PLL1 18
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#define GPU_CC_PLL1_OUT_EVEN 19
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#define GPU_CC_PLL1_OUT_MAIN 20
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#define GPU_CC_PLL1_OUT_ODD 21
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#define GPU_CC_SLEEP_CLK 22
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#define GPU_CC_GMU_CLK_SRC 23
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#define GPU_CC_CX_GFX3D_CLK 24
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#define GPU_CC_CX_GFX3D_SLV_CLK 25
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#define GPU_CC_GX_GFX3D_CLK_SRC 26
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#define GPU_CC_GX_GFX3D_CLK 27
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/* GPU_CC GDSCRs */
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#define GPU_CX_GDSC 0
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#define GPU_GX_GDSC 1
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/* GPUCC reset clock registers */
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#define GPUCC_GPU_CC_ACD_BCR 0
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#define GPUCC_GPU_CC_CX_BCR 1
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#define GPUCC_GPU_CC_GFX3D_AON_BCR 2
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#define GPUCC_GPU_CC_GMU_BCR 3
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#define GPUCC_GPU_CC_GX_BCR 4
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#define GPUCC_GPU_CC_SPDM_BCR 5
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#define GPUCC_GPU_CC_XO_BCR 6
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#endif
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