70 lines
2.7 KiB
C
70 lines
2.7 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_AON_CC_KHAJE_H
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#define _DT_BINDINGS_CLK_QCOM_LPASS_AON_CC_KHAJE_H
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/* LPASS_AON_CC clocks */
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#define LPASS_AON_CC_AHB_TIMEOUT_CLK 0
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#define LPASS_AON_CC_AON_H_CLK 1
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#define LPASS_AON_CC_AUDIO_HM_H_CLK 2
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#define LPASS_AON_CC_AUDIO_HM_SLEEP_CLK 3
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#define LPASS_AON_CC_BUS_ALT_CLK 4
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#define LPASS_AON_CC_CDIV_TX_MCLK_DIV_CLK_SRC 5
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#define LPASS_AON_CC_CDIV_VA_DIV_CLK_SRC 6
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#define LPASS_AON_CC_CPR_CLK 7
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#define LPASS_AON_CC_CPR_CLK_SRC 8
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#define LPASS_AON_CC_CSR_H_CLK 9
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#define LPASS_AON_CC_MAIN_RCG_CLK_SRC 10
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#define LPASS_AON_CC_MCC_ACCESS_CLK 11
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#define LPASS_AON_CC_PDC_GDS_CLK 12
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#define LPASS_AON_CC_PDC_H_CLK 13
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#define LPASS_AON_CC_PLL 14
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#define LPASS_AON_CC_PLL_OUT_EVEN 15
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#define LPASS_AON_CC_PLL_OUT_ODD 16
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#define LPASS_AON_CC_Q6_AHBM_CLK 17
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#define LPASS_AON_CC_Q6_AHBS_CLK 18
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#define LPASS_AON_CC_Q6_ATBM_CLK 19
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#define LPASS_AON_CC_Q6_XO_CLK 20
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#define LPASS_AON_CC_Q6_XO_CLK_SRC 21
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#define LPASS_AON_CC_Q6_XPU2_CLIENT_CLK 22
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#define LPASS_AON_CC_Q6_XPU2_CONFIG_CLK 23
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#define LPASS_AON_CC_QSM_XO_CLK 24
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#define LPASS_AON_CC_RO_CLK 25
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#define LPASS_AON_CC_RSC_HCLK_CLK 26
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#define LPASS_AON_CC_SLEEP_CLK 27
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#define LPASS_AON_CC_SSC_H_CLK 28
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#define LPASS_AON_CC_TX_MCLK_2X_CLK 29
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#define LPASS_AON_CC_TX_MCLK_CLK 30
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#define LPASS_AON_CC_TX_MCLK_RCG_CLK_SRC 31
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#define LPASS_AON_CC_VA_2X_CLK 32
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#define LPASS_AON_CC_VA_CLK 33
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#define LPASS_AON_CC_VA_MEM0_CLK 34
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#define LPASS_AON_CC_VA_RCG_CLK_SRC 35
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#define LPASS_AON_CC_VA_XPU2_CLIENT_CLK 36
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#define LPASS_AON_CC_VS_VDDCX_CLK 37
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#define LPASS_AON_CC_VS_VDDCX_CLK_SRC 38
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#define LPASS_AON_CC_VS_VDDMX_CLK 39
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#define LPASS_AON_CC_VS_VDDMX_CLK_SRC 40
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#define LPASS_QDSP6SS_SLEEP_CLK 41
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#define LPASS_QDSP6SS_XO_CLK 42
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/* LPASS_AON_CC resets */
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#define LPASS_AON_CC_LPASS_AON_CC_AHB_TIMEOUT_BCR 0
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#define LPASS_AON_CC_LPASS_AON_CC_BUS_BCR 1
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#define LPASS_AON_CC_LPASS_AON_CC_CPR_BCR 2
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#define LPASS_AON_CC_LPASS_AON_CC_PDC_GDS_BCR 3
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#define LPASS_AON_CC_LPASS_AON_CC_Q6_AHB_BCR 4
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#define LPASS_AON_CC_LPASS_AON_CC_Q6_XO_BCR 5
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#define LPASS_AON_CC_LPASS_AON_CC_Q6_XPU2_CONFIG_BCR 6
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#define LPASS_AON_CC_LPASS_AON_CC_RO_BCR 7
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#define LPASS_AON_CC_LPASS_AON_CC_RSC_HCLK_BCR 8
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#define LPASS_AON_CC_LPASS_AON_CC_SLEEP_BCR 9
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#define LPASS_AON_CC_LPASS_AON_CC_TX_MCLK_BCR 10
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#define LPASS_AON_CC_LPASS_AON_CC_VA_BCR 11
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#define LPASS_AON_CC_LPASS_AON_CC_VA_MEM_BCR 12
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#define LPASS_AON_CC_LPASS_AON_CC_VS_BCR 13
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#endif
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