151 lines
4 KiB
C
151 lines
4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _CRYPTO_QTI_COMMON_H
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#define _CRYPTO_QTI_COMMON_H
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#include <linux/blk-crypto.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#define RAW_SECRET_SIZE 32
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#define QTI_ICE_MAX_BIST_CHECK_COUNT 100
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#define QTI_ICE_TYPE_NAME_LEN 8
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/* Storage types for crypto */
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#define UFS_CE 10
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#define SDCC_CE 20
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struct ice_mmio_data {
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void __iomem *ice_base_mmio;
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#if (IS_ENABLED(CONFIG_QTI_HW_KEY_MANAGER) || IS_ENABLED(CONFIG_QTI_HW_KEY_MANAGER_V1))
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void __iomem *ice_hwkm_mmio;
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#endif
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#if IS_ENABLED(CONFIG_QTI_HW_KEY_MANAGER_V1)
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struct device *dev;
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void __iomem *km_base;
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struct resource *km_res;
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struct list_head clk_list_head;
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bool is_hwkm_clk_available;
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bool is_hwkm_enabled;
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#endif
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};
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struct crypto_vops_qti_entry {
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void __iomem *icemmio_base;
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void __iomem *hwkm_slave_mmio_base;
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uint32_t ice_hw_version;
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uint8_t ice_dev_type[QTI_ICE_TYPE_NAME_LEN];
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uint32_t flags;
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};
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#if IS_ENABLED(CONFIG_QTI_CRYPTO_COMMON)
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int crypto_qti_init_crypto(void *mmio_data);
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int crypto_qti_enable(void *mmio_data);
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void crypto_qti_disable(void);
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int crypto_qti_debug(const struct ice_mmio_data *mmio_data);
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int crypto_qti_keyslot_program(const struct ice_mmio_data *mmio_data,
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const struct blk_crypto_key *key,
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unsigned int slot, u8 data_unit_mask,
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int capid, int storage_type);
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int crypto_qti_keyslot_evict(const struct ice_mmio_data *mmio_data,
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unsigned int slot, int storage_type);
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int crypto_qti_derive_raw_secret(const u8 *wrapped_key,
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unsigned int wrapped_key_size, u8 *secret,
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unsigned int secret_size);
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#if IS_ENABLED(CONFIG_QTI_CRYPTO_FDE)
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/* MSM ICE Crypto Data Unit of target DUN of Transfer Request */
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enum ice_crypto_data_unit {
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ICE_CRYPTO_DATA_UNIT_512_B = 0,
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ICE_CRYPTO_DATA_UNIT_1_KB = 1,
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ICE_CRYPTO_DATA_UNIT_2_KB = 2,
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ICE_CRYPTO_DATA_UNIT_4_KB = 3,
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ICE_CRYPTO_DATA_UNIT_8_KB = 4,
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ICE_CRYPTO_DATA_UNIT_16_KB = 5,
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ICE_CRYPTO_DATA_UNIT_32_KB = 6,
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ICE_CRYPTO_DATA_UNIT_64_KB = 7,
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};
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struct request;
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enum ice_cryto_algo_mode {
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ICE_CRYPTO_ALGO_MODE_AES_ECB = 0x0,
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ICE_CRYPTO_ALGO_MODE_AES_XTS = 0x3,
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};
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enum ice_crpto_key_size {
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ICE_CRYPTO_KEY_SIZE_128 = 0x0,
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ICE_CRYPTO_KEY_SIZE_256 = 0x2,
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};
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struct ice_crypto_setting {
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enum ice_crpto_key_size key_size;
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enum ice_cryto_algo_mode algo_mode;
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short key_index;
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};
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struct ice_data_setting {
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struct ice_crypto_setting crypto_data;
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bool sw_forced_context_switch;
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bool decr_bypass;
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bool encr_bypass;
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};
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typedef void (*ice_error_cb)(void *, u32 error);
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int crypto_qti_ice_setup_ice_hw(const char *storage_type, int enable);
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int crypto_qti_ice_config_start(struct request *req,
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struct ice_data_setting *setting);
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unsigned int crypto_qti_ice_get_num_fde_slots(void);
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int crypto_qti_ice_init_fde_node(struct device *dev);
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#else /* CONFIG_QTI_CRYPTO_FDE */
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static inline int crypto_qti_ice_setup_ice_hw(const char *storage_type, int enable)
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{
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return 0;
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}
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#endif /* CONFIG_QTI_CRYPTO_FDE */
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#else
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static inline int crypto_qti_init_crypto(void *mmio_data)
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{
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return -EOPNOTSUPP;
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}
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static inline int crypto_qti_enable(void *mmio_data)
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{
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return -EOPNOTSUPP;
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}
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static inline void crypto_qti_disable(void)
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{}
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static inline int crypto_qti_debug(void)
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{
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return -EOPNOTSUPP;
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}
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static inline int crypto_qti_keyslot_program(
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const struct ice_mmio_data *mmio_data,
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const struct blk_crypto_key *key,
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unsigned int slot,
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u8 data_unit_mask,
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int capid, int storage_type)
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{
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return -EOPNOTSUPP;
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}
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static inline int crypto_qti_keyslot_evict(const struct ice_mmio_data *mmio_data,
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unsigned int slot, int storage_type)
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{
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return -EOPNOTSUPP;
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}
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static inline int crypto_qti_derive_raw_secret(
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const u8 *wrapped_key,
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unsigned int wrapped_key_size,
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u8 *secret,
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unsigned int secret_size)
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{
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return -EOPNOTSUPP;
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}
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#endif /* CONFIG_QTI_CRYPTO_COMMON */
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#endif /* _CRYPTO_QTI_COMMON_H */
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