128 lines
3.5 KiB
Text
128 lines
3.5 KiB
Text
Qualcomm Technologies, Inc. Global Clock & Reset Controller Binding
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------------------------------------------------
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Required properties :
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- compatible : shall contain only one of the following:
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"qcom,gcc-apq8064"
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"qcom,gcc-apq8084"
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"qcom,gcc-ipq8064"
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"qcom,gcc-ipq4019"
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"qcom,gcc-ipq8074"
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"qcom,gcc-msm8660"
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"qcom,gcc-msm8916"
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"qcom,gcc-msm8960"
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"qcom,gcc-msm8974"
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"qcom,gcc-msm8974pro"
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"qcom,gcc-msm8974pro-ac"
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"qcom,gcc-msm8994"
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"qcom,gcc-msm8996"
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"qcom,gcc-msm8998"
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"qcom,gcc-mdm9615"
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"qcom,gcc-qcs404"
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"qcom,gcc-sdm630"
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"qcom,gcc-sdm660"
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"qcom,sdm845-gcc"
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"qcom,sdm845-gcc-v2"
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"qcom,sdm845-gcc-v2.1"
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"qcom,lahaina-gcc"
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"qcom,sm8150-gcc"
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"qcom,gcc-sm8250"
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"qcom,sm8150-gcc-v2"
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"qcom,sa8155-gcc"
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"qcom,sa8155-gcc-v2"
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"qcom,shima-gcc"
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"qcom,holi-gcc"
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"qcom,sdxlemur-gcc"
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"qcom,waipio-gcc"
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"qcom,diwali-gcc"
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"qcom,kalama-gcc"
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"qcom,kalama-gcc-v2"
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"qcom,cinder-gcc"
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"qcom,cinder-gcc-v2"
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"qcom,khaje-gcc"
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"qcom,gcc-sc8180x"
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"qcom,monaco-gcc"
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"qcom,sdxpinn-gcc"
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"qcom,scuba-gcc"
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"qcom,sdxbaagha-gcc"
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"qcom,lemans-gcc"
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"qcom,sa410m-gcc"
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"qcom,direwolf-gcc"
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"qcom,crow-gcc"
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"qcom,monaco_auto-gcc"
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"qcom,trinket-gcc"
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"qcom,sdm670-gcc"
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- reg : shall contain base register location and length
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- vdd_cx-supply: The vdd_cx logic rail supply.
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- #clock-cells : shall contain 1
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- #reset-cells : shall contain 1
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Optional properties :
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- #power-domain-cells : shall contain 1
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- QTI TSENS (thermal sensor device) on some devices can
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be part of GCC and hence the TSENS properties can also be
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part of the GCC/clock-controller node.
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For more details on the TSENS properties please refer
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Documentation/devicetree/bindings/thermal/qcom-tsens.txt
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- protected-clocks : Protected clock specifier list as per common clock
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binding.
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- qcom,critical-clocks : List of clock specifiers that should be enabled during
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probe and not registered with the clock framework.
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- qcom,critical-devices : List of device phandles whose associated clocks
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should be enabled during probe and not registered with the clock framework.
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Example:
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clock-controller@900000 {
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compatible = "qcom,gcc-msm8960";
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reg = <0x900000 0x4000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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Example of GCC with TSENS properties:
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clock-controller@900000 {
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compatible = "qcom,gcc-apq8064";
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reg = <0x00900000 0x4000>;
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nvmem-cells = <&tsens_calib>, <&tsens_backup>;
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nvmem-cell-names = "calib", "calib_backup";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#thermal-sensor-cells = <1>;
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};
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Example of GCC with protected-clocks properties:
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clock-controller@100000 {
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compatible = "qcom,sdm845-gcc";
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reg = <0x100000 0x1f0000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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protected-clocks = <GCC_QSPI_CORE_CLK>,
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<GCC_QSPI_CORE_CLK_SRC>,
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
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<GCC_LPASS_Q6_AXI_CLK>,
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<GCC_LPASS_SWAY_CLK>;
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};
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Example of GCC with qcom,critical-clocks properties:
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clock-controller@100000 {
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compatible = "qcom,waipio-gcc", "syscon";
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reg = <0x100000 0x1f4200>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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qcom,critical-clocks = <GCC_QUPV3_WRAP0_S5_CLK>,
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<GCC_QUPV3_WRAP_0_M_AHB_CLK>,
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<GCC_QUPV3_WRAP_0_S_AHB_CLK>;
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};
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Example of GCC with qcom,critical-devices properties:
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clock-controller@100000 {
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compatible = "qcom,waipio-gcc", "syscon";
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reg = <0x100000 0x1f4200>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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qcom,critical-devices = <&qupv3_se5_i2c>;
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};
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