46 lines
1.7 KiB
Text
46 lines
1.7 KiB
Text
Qualcomm Technologies, Inc. GENI Serial Engine Driver
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GENI Serial Engine Driver is used to configure and read the configuration
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from the Serial Engines on Qualcomm Technologies, Inc. Universal Peripheral
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(QUPv3) core. It is also used to enable the stage1 IOMMU translation and
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manage resources associated with the QUPv3 core.
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Required properties:
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- compatible: Must be "qcom,qupv3-geni-se".
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- reg: Must contain QUPv3 register address and length.
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- qcom,bus-mas-id: Master Endpoint ID for bus driver.
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- qcom,bus-slv-id: Slave Endpoint ID for bus driver.
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Optional properties:
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- qcom,iommu-s1-bypass: Boolean flag to bypass IOMMU stage 1 translation.
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- qcom,msm-bus,num-paths: Number of paths to put vote for.
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- qcom,msm-bus,vectors-bus-ids: Master and slave Endpoint IDs for DDR
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and Corex/2x paths.
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- interconnect-names: "qup-core" for the qup master to slave path
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"snoc-llcc" middle path from SNOC to GEMNOC
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"qup-ddr" for the qup master to DDR path
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This way ensure the path from aggre1_noc ->
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system_noc -> gem_noc -> mc_virt is complete.
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- interconnects: Master to Slave endpoint nodes for the required paths.
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Optional subnodes:
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qcom,iommu_qupv3_geni_se_cb: Child node representing the QUPV3 context
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bank.
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Subnode Required properties:
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- compatible : Must be "qcom,qupv3-geni-se-cb";
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- iommus: A list of phandle and IOMMU specifier pairs that
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describe the IOMMU master interfaces of the device.
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Example:
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qupv3_0: qcom,qupv3_0_geni_se@8c0000 {
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compatible = "qcom,qupv3-geni-se";
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reg = <0x8c0000 0x6000>;
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qcom,bus-mas-id = <100>;
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qcom,bus-slv-id = <300>;
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iommu_qupv3_0_geni_se_cb: qcom,iommu_qupv3_0_geni_se_cb {
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compatible = "qcom,qupv3-geni-se-cb";
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iommus = <&apps_smmu 0x1 0x0>;
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};
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}
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