203 lines
6.3 KiB
C
203 lines
6.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_LEMANS_H
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#define __DT_BINDINGS_INTERCONNECT_QCOM_LEMANS_H
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#define MASTER_GPU_TCU 0
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#define MASTER_PCIE_TCU 1
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#define MASTER_SYS_TCU 2
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#define MASTER_APPSS_PROC 3
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#define MASTER_LLCC 4
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#define MASTER_CNOC_LPASS_AG_NOC 5
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#define MASTER_GIC_AHB 6
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#define MASTER_CDSP_NOC_CFG 7
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#define MASTER_CDSPB_NOC_CFG 8
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#define MASTER_QDSS_BAM 9
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#define MASTER_QUP_0 10
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#define MASTER_QUP_1 11
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#define MASTER_QUP_2 12
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#define MASTER_A1NOC_SNOC 13
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#define MASTER_A2NOC_SNOC 14
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#define MASTER_CAMNOC_HF 15
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#define MASTER_CAMNOC_ICP 16
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#define MASTER_CAMNOC_SF 17
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#define MASTER_COMPUTE_NOC 18
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#define MASTER_COMPUTE_NOC_1 19
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#define MASTER_CNOC_A2NOC 20
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#define MASTER_CNOC_DC_NOC 21
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#define MASTER_GEM_NOC_CFG 22
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#define MASTER_GEM_NOC_CNOC 23
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#define MASTER_GEM_NOC_PCIE_SNOC 24
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#define MASTER_GPDSP_SAIL 25
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#define MASTER_GFX3D 26
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#define MASTER_LPASS_ANOC 27
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#define MASTER_MDP0 28
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#define MASTER_MDP1 29
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#define MASTER_MDP_CORE1_0 30
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#define MASTER_MDP_CORE1_1 31
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#define MASTER_MNOC_HF_MEM_NOC 32
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#define MASTER_CNOC_MNOC_HF_CFG 33
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#define MASTER_MNOC_SF_MEM_NOC 34
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#define MASTER_CNOC_MNOC_SF_CFG 35
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#define MASTER_ANOC_PCIE_GEM_NOC 36
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#define MASTER_SNOC_CFG 37
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#define MASTER_SNOC_GC_MEM_NOC 38
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#define MASTER_SNOC_SF_MEM_NOC 39
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#define MASTER_VIDEO_P0 40
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#define MASTER_VIDEO_P1 41
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#define MASTER_VIDEO_PROC 42
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#define MASTER_VIDEO_V_PROC 43
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#define MASTER_QUP_CORE_0 44
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#define MASTER_QUP_CORE_1 45
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#define MASTER_QUP_CORE_2 46
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#define MASTER_QUP_CORE_3 47
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#define MASTER_CRYPTO_CORE0 48
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#define MASTER_CRYPTO_CORE1 49
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#define MASTER_DSP0 50
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#define MASTER_DSP1 51
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#define MASTER_IPA 52
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#define MASTER_LPASS_PROC 53
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#define MASTER_CDSP_PROC 54
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#define MASTER_CDSP_PROC_B 55
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#define MASTER_PIMEM 56
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#define MASTER_QUP_3 57
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#define MASTER_EMAC 58
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#define MASTER_EMAC_1 59
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#define MASTER_GIC 60
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#define MASTER_PCIE_0 61
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#define MASTER_PCIE_1 62
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#define MASTER_QDSS_ETR_0 63
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#define MASTER_QDSS_ETR_1 64
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#define MASTER_SDC 65
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#define MASTER_UFS_CARD 66
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#define MASTER_UFS_MEM 67
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#define MASTER_USB2 68
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#define MASTER_USB3_0 69
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#define MASTER_USB3_1 70
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#define SLAVE_EBI1 512
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#define SLAVE_AHB2PHY_0 513
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#define SLAVE_AHB2PHY_1 514
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#define SLAVE_AHB2PHY_2 515
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#define SLAVE_AHB2PHY_3 516
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#define SLAVE_ANOC_THROTTLE_CFG 517
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#define SLAVE_AOSS 518
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#define SLAVE_APPSS 519
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#define SLAVE_BOOT_ROM 520
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#define SLAVE_CAMERA_CFG 521
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#define SLAVE_CAMERA_NRT_THROTTLE_CFG 522
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#define SLAVE_CAMERA_RT_THROTTLE_CFG 523
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#define SLAVE_CLK_CTL 524
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#define SLAVE_CDSP_CFG 525
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#define SLAVE_CDSP1_CFG 526
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#define SLAVE_RBCPR_CX_CFG 527
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#define SLAVE_RBCPR_MMCX_CFG 528
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#define SLAVE_RBCPR_MX_CFG 529
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#define SLAVE_CPR_NSPCX 530
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#define SLAVE_CRYPTO_0_CFG 531
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#define SLAVE_CX_RDPM 532
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#define SLAVE_DISPLAY_CFG 533
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#define SLAVE_DISPLAY_RT_THROTTLE_CFG 534
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#define SLAVE_DISPLAY1_CFG 535
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#define SLAVE_DISPLAY1_RT_THROTTLE_CFG 536
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#define SLAVE_EMAC_CFG 537
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#define SLAVE_EMAC1_CFG 538
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#define SLAVE_GP_DSP0_CFG 539
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#define SLAVE_GP_DSP1_CFG 540
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#define SLAVE_GPDSP0_THROTTLE_CFG 541
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#define SLAVE_GPDSP1_THROTTLE_CFG 542
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#define SLAVE_GPU_TCU_THROTTLE_CFG 543
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#define SLAVE_GFX3D_CFG 544
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#define SLAVE_HWKM 545
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#define SLAVE_IMEM_CFG 546
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#define SLAVE_IPA_CFG 547
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#define SLAVE_IPC_ROUTER_CFG 548
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#define SLAVE_LLCC_CFG 549
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#define SLAVE_LPASS 550
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#define SLAVE_LPASS_CORE_CFG 551
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#define SLAVE_LPASS_LPI_CFG 552
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#define SLAVE_LPASS_MPU_CFG 553
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#define SLAVE_LPASS_THROTTLE_CFG 554
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#define SLAVE_LPASS_TOP_CFG 555
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#define SLAVE_MX_RDPM 556
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#define SLAVE_MXC_RDPM 557
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#define SLAVE_PCIE_0_CFG 558
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#define SLAVE_PCIE_1_CFG 559
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#define SLAVE_PCIE_RSC_CFG 560
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#define SLAVE_PCIE_TCU_THROTTLE_CFG 561
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#define SLAVE_PCIE_THROTTLE_CFG 562
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#define SLAVE_PDM 563
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#define SLAVE_PIMEM_CFG 564
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#define SLAVE_PKA_WRAPPER_CFG 565
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#define SLAVE_QDSS_CFG 566
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#define SLAVE_QM_CFG 567
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#define SLAVE_QM_MPU_CFG 568
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#define SLAVE_QUP_0 569
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#define SLAVE_QUP_1 570
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#define SLAVE_QUP_2 571
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#define SLAVE_QUP_3 572
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#define SLAVE_SAIL_THROTTLE_CFG 573
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#define SLAVE_SDC1 574
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#define SLAVE_SECURITY 575
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#define SLAVE_SNOC_THROTTLE_CFG 576
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#define SLAVE_TCSR 577
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#define SLAVE_TLMM 578
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#define SLAVE_TSC_CFG 579
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#define SLAVE_UFS_CARD_CFG 580
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#define SLAVE_UFS_MEM_CFG 581
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#define SLAVE_USB2 582
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#define SLAVE_USB3_0 583
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#define SLAVE_USB3_1 584
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#define SLAVE_VENUS_CFG 585
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#define SLAVE_VENUS_CVP_THROTTLE_CFG 586
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#define SLAVE_VENUS_V_CPU_THROTTLE_CFG 587
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#define SLAVE_VENUS_VCODEC_THROTTLE_CFG 588
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#define SLAVE_A1NOC_SNOC 589
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#define SLAVE_A2NOC_SNOC 590
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#define SLAVE_DDRSS_CFG 591
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#define SLAVE_GEM_NOC_CNOC 592
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#define SLAVE_GEM_NOC_CFG 593
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#define SLAVE_SNOC_GEM_NOC_GC 594
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#define SLAVE_SNOC_GEM_NOC_SF 595
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#define SLAVE_GP_DSP_SAIL_NOC 596
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#define SLAVE_GPDSP_NOC_CFG 597
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#define SLAVE_HCP_A 598
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#define SLAVE_LLCC 599
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#define SLAVE_MNOC_HF_MEM_NOC 600
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#define SLAVE_MNOC_SF_MEM_NOC 601
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#define SLAVE_CNOC_MNOC_HF_CFG 602
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#define SLAVE_CNOC_MNOC_SF_CFG 603
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#define SLAVE_CDSP_MEM_NOC 604
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#define SLAVE_CDSPB_MEM_NOC 605
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#define SLAVE_HCP_B 606
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#define SLAVE_GEM_NOC_PCIE_CNOC 607
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#define SLAVE_PCIE_ANOC_CFG 608
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#define SLAVE_ANOC_PCIE_GEM_NOC 609
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#define SLAVE_SNOC_CFG 610
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#define SLAVE_LPASS_SNOC 611
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#define SLAVE_QUP_CORE_0 612
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#define SLAVE_QUP_CORE_1 613
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#define SLAVE_QUP_CORE_2 614
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#define SLAVE_QUP_CORE_3 615
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#define SLAVE_BOOT_IMEM 616
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#define SLAVE_IMEM 617
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#define SLAVE_PIMEM 618
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#define SLAVE_SERVICE_NSP_NOC 619
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#define SLAVE_SERVICE_NSPB_NOC 620
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#define SLAVE_SERVICE_GEM_NOC_1 621
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#define SLAVE_SERVICE_MNOC_HF 622
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#define SLAVE_SERVICE_MNOC_SF 623
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#define SLAVE_SERVICES_LPASS_AML_NOC 624
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#define SLAVE_SERVICE_LPASS_AG_NOC 625
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#define SLAVE_SERVICE_GEM_NOC_2 626
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#define SLAVE_SERVICE_SNOC 627
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#define SLAVE_SERVICE_GEM_NOC 628
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#define SLAVE_SERVICE_GEM_NOC2 629
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#define SLAVE_PCIE_0 630
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#define SLAVE_PCIE_1 631
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#define SLAVE_QDSS_STM 632
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#define SLAVE_TCU 633
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#endif
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