From 45cf36cb63eb297be0b909cd28aae26da6b48472 Mon Sep 17 00:00:00 2001
From: Abhishek Chauhan <abchauha@qti.qualcomm.com>
Date: Mon, 24 May 2021 14:35:53 -0700
Subject: [PATCH] ARM: dts: msm: add ntn3 ipa pcie changes

Update IPA iossv2 pcie configuration changes.

Change-Id: I22536d8ab315dcb968a331d468aedb4e5aab81a9
---
 qcom/sdxlemur-mtp-cpe.dtsi | 69 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 69 insertions(+)

diff --git a/qcom/sdxlemur-mtp-cpe.dtsi b/qcom/sdxlemur-mtp-cpe.dtsi
index f6993fafd059..38cdf380631b 100644
--- a/qcom/sdxlemur-mtp-cpe.dtsi
+++ b/qcom/sdxlemur-mtp-cpe.dtsi
@@ -32,6 +32,48 @@
 		enable-active-high;
 		regulator-enable-ramp-delay = <2400>;
 	};
+
+	ioss_qps615_rx: qps615_rx@eth {
+		qcom,dir-rx;
+		qcom,rx-filter-ip;
+
+		qcom,ring-size = <128>;
+		qcom,buff-size = <2048>;
+
+		qcom,mod-count-min = <64>;
+		qcom,mod-count-max = <64>;
+		qcom,mod-usecs-min = <30>;
+		qcom,mod-usecs-max = <60>;
+	};
+
+	ioss_qps615_tx: qps615_tx@eth {
+		qcom,dir-tx;
+		qcom,ring-size = <512>;
+		qcom,buff-size = <2048>;
+
+		qcom,mod-count-min = <64>;
+		qcom,mod-count-max = <64>;
+		qcom,mod-usecs-min = <30>;
+		qcom,mod-usecs-max = <60>;
+	};
+
+	ioss_qps615_eth0: qps615@eth0 {
+		qcom,name = "eth0";
+		qcom,ioss_instance = <0>;
+
+		qcom,ioss_channels =
+			<&ioss_qps615_rx>,
+			<&ioss_qps615_tx>;
+	};
+
+	ioss_qps615_eth1: qps615@eth1 {
+		qcom,name = "eth1";
+		qcom,ioss_instance = <0>;
+
+		qcom,ioss_channels =
+			<&ioss_qps615_rx>,
+			<&ioss_qps615_tx>;
+	};
 };
 
 &i2c_5 {
@@ -94,6 +136,19 @@
 		/* BDF 2.3.0 */
 		pcie0_bus2_dev3_fn0: pcie0_bus2_dev3_fn0 {
 			reg = <0x1800 0x0 0x0 0x0 0x0>;
+			qps615_eth0,qps615_eth0@pcie0_rp {
+				reg = <0x0 0x0 0x0 0x0 0x0>;
+
+				compatible = "qcom,ioss-v2-device";
+				qcom,ioss = <&ioss>;
+				qcom,ioss_interfaces = <&ioss_qps615_eth0>;
+
+				/* ipa shares this group */
+				qcom,iommu-group = <&ipa_eth_group1>;
+
+				#address-cells = <1>;
+				#size-cells = <1>;
+			};
 			/* BDF 5.0.0 */
 			pcie0_bus5_dev0_fn0: pcie0_ntn3_eth0 {
 				reg = <0x0 0x0 0x0 0x0 0x0>;
@@ -102,6 +157,20 @@
 					qcom,iommu-dma = "atomic";
 				};
 			};
+
+			qps615_eth1,qps615_eth1@pcie0_rp {
+				reg = <0x100 0x0 0x0 0x0 0x0>;
+
+				compatible = "qcom,ioss-v2-device";
+				qcom,ioss = <&ioss>;
+				qcom,ioss_interfaces = <&ioss_qps615_eth1>;
+
+				/* ipa shares this group */
+				qcom,iommu-group = <&ipa_eth_group1>;
+
+				#address-cells = <1>;
+				#size-cells = <1>;
+			};
 			/* BDF 5.0.1 */
 			pcie0_bus5_dev0_fn1: pcie0_ntn3_eth1 {
 				reg = <0x100 0x0 0x0 0x0 0x0>;