From 00d232ff7901b9797a23e2c39f9bbb0e253c21cb Mon Sep 17 00:00:00 2001 From: Mahesh Kumar Sharma Date: Thu, 3 Dec 2020 16:18:33 -0800 Subject: [PATCH] ARM: dts: msm: Add entry to handle XO clock gpio In order to avoid leakage, GPIO 201 mapped to XO clock needs to be pulled high for 2 ms and pull it low to prevent leakage. Add an entry for GPIO201 in lahaina pro overlay files. Change-Id: I5311bf9bcd4bd624a46cce2a62ac65551fd76f06 --- qcom/lahaina-cdp-hsp-pro.dtsi | 4 ++++ qcom/lahaina-mtp-hsp-pro.dtsi | 4 ++++ qcom/lahaina-pinctrl.dtsi | 14 ++++++++++++++ qcom/lahaina-qrd-hsp-pro.dtsi | 4 ++++ 4 files changed, 26 insertions(+) diff --git a/qcom/lahaina-cdp-hsp-pro.dtsi b/qcom/lahaina-cdp-hsp-pro.dtsi index fdf9ed586642..e8144ecd531b 100644 --- a/qcom/lahaina-cdp-hsp-pro.dtsi +++ b/qcom/lahaina-cdp-hsp-pro.dtsi @@ -1 +1,5 @@ #include "lahaina-cdp.dtsi" +&bluetooth { + pinctrl-1 = <&wcnss_en_sleep>; + qcom,xo-reset-gpio = <&tlmm 201 0>; /* XO */ +}; diff --git a/qcom/lahaina-mtp-hsp-pro.dtsi b/qcom/lahaina-mtp-hsp-pro.dtsi index af2a598d00ab..a4949402b4b8 100644 --- a/qcom/lahaina-mtp-hsp-pro.dtsi +++ b/qcom/lahaina-mtp-hsp-pro.dtsi @@ -1 +1,5 @@ #include "lahaina-mtp.dtsi" +&bluetooth { + pinctrl-1 = <&wcnss_en_sleep>; + qcom,xo-reset-gpio = <&tlmm 201 0>; /* XO */ +}; diff --git a/qcom/lahaina-pinctrl.dtsi b/qcom/lahaina-pinctrl.dtsi index 3c81288625d9..242b9485c6eb 100644 --- a/qcom/lahaina-pinctrl.dtsi +++ b/qcom/lahaina-pinctrl.dtsi @@ -13,6 +13,20 @@ }; }; + wcnss_en_sleep: wcnss_en_sleep { + mux { + pins = "gpio201"; + function = "gpio"; + }; + + config { + pins = "gpio201"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + }; + trigout_a: trigout_a { mux { pins = "gpio14"; diff --git a/qcom/lahaina-qrd-hsp-pro.dtsi b/qcom/lahaina-qrd-hsp-pro.dtsi index 74843fc49873..cc529f0f8c8c 100644 --- a/qcom/lahaina-qrd-hsp-pro.dtsi +++ b/qcom/lahaina-qrd-hsp-pro.dtsi @@ -1 +1,5 @@ #include "lahaina-qrd.dtsi" +&bluetooth { + pinctrl-1 = <&wcnss_en_sleep>; + qcom,xo-reset-gpio = <&tlmm 201 0>; /* XO */ +};