diff --git a/bindings/iommu/arm,smmu.txt b/bindings/iommu/arm,smmu.txt
index 9e3e515e4e96..29e79cddee88 100644
--- a/bindings/iommu/arm,smmu.txt
+++ b/bindings/iommu/arm,smmu.txt
@@ -182,6 +182,13 @@ conditions.
 		  that interconnect votes will be maintained irrespective of
 		  the CPUSS' state (awake or asleep).
 
+- qcom,power-always-on:
+		  Boolean property which indicates that votes for power
+		  resources (i.e. regulators, clocks, buses) should
+		  always be maintained. This is required when the latency
+		  for the SMMU's operation is greatly increased by adding and
+		  removing votes for power resources.
+
 ** Deprecated properties:
 
 - mmu-masters (deprecated in favour of the generic "iommus" binding) :
diff --git a/qcom/msm-arm-smmu-holi.dtsi b/qcom/msm-arm-smmu-holi.dtsi
index 20343e67832b..0b7fb0427195 100644
--- a/qcom/msm-arm-smmu-holi.dtsi
+++ b/qcom/msm-arm-smmu-holi.dtsi
@@ -7,6 +7,7 @@
 		#iommu-cells = <1>;
 		qcom,use-3-lvl-tables;
 		#global-interrupts = <2>;
+		qcom,power-always-on;
 		qcom,regulator-names = "vdd";
 		vdd-supply = <&gpu_cx_gdsc>;
 		clock-names = "gcc_gpu_memnoc_gfx_clk";
diff --git a/qcom/msm-arm-smmu-lahaina.dtsi b/qcom/msm-arm-smmu-lahaina.dtsi
index de6054d5d612..f373834017d1 100644
--- a/qcom/msm-arm-smmu-lahaina.dtsi
+++ b/qcom/msm-arm-smmu-lahaina.dtsi
@@ -15,6 +15,7 @@
 		#address-cells = <1>;
 		ranges;
 		dma-coherent;
+		qcom,power-always-on;
 		qcom,regulator-names = "vdd";
 		vdd-supply = <&gpu_cc_cx_gdsc>;
 
diff --git a/qcom/msm-arm-smmu-shima.dtsi b/qcom/msm-arm-smmu-shima.dtsi
index c9c71235d746..4867686e4486 100644
--- a/qcom/msm-arm-smmu-shima.dtsi
+++ b/qcom/msm-arm-smmu-shima.dtsi
@@ -15,6 +15,7 @@
 		#address-cells = <1>;
 		ranges;
 		dma-coherent;
+		qcom,power-always-on;
 		qcom,regulator-names = "vdd";
 		vdd-supply = <&gpu_cx_gdsc>;