From 018178a6668f79aeb2623c30f4bd49facda38fd5 Mon Sep 17 00:00:00 2001
From: Shreyas K K <shrekk@qti.qualcomm.com>
Date: Mon, 28 Sep 2020 11:50:35 +0530
Subject: [PATCH] ARM: dts: msm: Add PMU device nodes for SM8150

Add CPU PMU and LLCC PMU device nodes for SM8150.

Change-Id: I57f075796324dd4c27140504dc2ff9133dbda1cf
---
 qcom/sm8150.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi
index 288adf57c10f..e8c7eba2c749 100644
--- a/qcom/sm8150.dtsi
+++ b/qcom/sm8150.dtsi
@@ -727,6 +727,12 @@
 		};
 	};
 
+	llcc_pmu: llcc-pmu@90cc000 {
+		compatible = "qcom,llcc-pmu-ver2";
+		reg = <0x090cc000 0x300>;
+		reg-names = "lagg-base";
+	};
+
 	llcc_bw_opp_table: llcc-bw-opp-table {
 		compatible = "operating-points-v2";
 		BW_OPP_ENTRY( 150, 16); /*  2288 MB/s */
@@ -990,6 +996,12 @@
 		};
 	};
 
+	cpu_pmu: cpu-pmu {
+		compatible = "arm,armv8-pmuv3";
+		qcom,irq-is-percpu;
+		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	qcom,msm-rtb {
 		compatible = "qcom,msm-rtb";
 		qcom,rtb-size = <0x100000>;