From 46d06ca5d9e86fbeb05abbd88a523b981220f17d Mon Sep 17 00:00:00 2001
From: Yuanfang Zhang <yuanfang@qti.qualcomm.com>
Date: Tue, 24 Nov 2020 17:57:07 +0800
Subject: [PATCH] ARM: dts: msm: modify dcc_ram_offset for sdxlemur

Modify dcc_ram_offset to 0x12000 on sdxlemur.

Change-Id: Iadb7d0ce55976cb9a29fdc6d57b4ea46783bc6b1
---
 qcom/sdxlemur.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qcom/sdxlemur.dtsi b/qcom/sdxlemur.dtsi
index c761d1ea5c55..f31fbbd269c9 100644
--- a/qcom/sdxlemur.dtsi
+++ b/qcom/sdxlemur.dtsi
@@ -185,7 +185,7 @@
 		qcom,transaction_timeout = <0>;
 
 		reg-names = "dcc-base", "dcc-ram-base";
-		dcc-ram-offset = <0x800>;
+		dcc-ram-offset = <0x12000>;
 	};
 
 	wdog: qcom,wdt@17817000 {