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asoc: codecs: bolero: enable gpio and clk in right sequence

Browse source 
Enable soundwire gpio before enabling soundwire clock
so that bus clash does not happen when interrupts are
received.

Change-Id: I40983b8837373f1ea7ac8fa6add7c56225ff0592
Signed-off-by: Karthikeyan Mani <kmani@codeaurora.org>
This commit is contained in:
Karthikeyan Mani 2019-02-26 18:48:15 -08:00
commit 01f1ba49be
3 changed files with 15 additions and 9 deletions
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8
asoc/codecs/bolero/rx-macro.c
View file

@ -3262,8 +3262,12 @@ static int rx_swrm_clock(void *handle, bool enable)
__func__, (enable ? "enable" : "disable"));
if (enable) {
if (rx_priv->swr_clk_users == 0) {
msm_cdc_pinctrl_select_active_state(
rx_priv->rx_swr_gpio_p);
ret = rx_macro_mclk_enable(rx_priv, 1, true);
if (ret < 0) {
msm_cdc_pinctrl_select_sleep_state(
rx_priv->rx_swr_gpio_p);
dev_err(rx_priv->dev,
"%s: rx request clock enable failed\n",
__func__);
@ -3281,8 +3285,6 @@ static int rx_swrm_clock(void *handle, bool enable)
BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x00);
rx_priv->reset_swr = false;
msm_cdc_pinctrl_select_active_state(
rx_priv->rx_swr_gpio_p);
}
rx_priv->swr_clk_users++;
} else {
@ -3298,9 +3300,9 @@ static int rx_swrm_clock(void *handle, bool enable)
regmap_update_bits(regmap,
BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
0x01, 0x00);
rx_macro_mclk_enable(rx_priv, 0, true);
msm_cdc_pinctrl_select_sleep_state(
rx_priv->rx_swr_gpio_p);
rx_macro_mclk_enable(rx_priv, 0, true);
}
}
dev_dbg(rx_priv->dev, "%s: swrm clock users %d\n",

8
asoc/codecs/bolero/tx-macro.c
View file

@ -1437,8 +1437,12 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
__func__, (enable ? "enable" : "disable"));
if (enable) {
if (tx_priv->swr_clk_users == 0) {
msm_cdc_pinctrl_select_active_state(
tx_priv->tx_swr_gpio_p);
ret = tx_macro_mclk_enable(tx_priv, 1);
if (ret < 0) {
msm_cdc_pinctrl_select_sleep_state(
tx_priv->tx_swr_gpio_p);
dev_err(tx_priv->dev,
"%s: request clock enable failed\n",
__func__);
@ -1456,8 +1460,6 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x00);
tx_priv->reset_swr = false;
msm_cdc_pinctrl_select_active_state(
tx_priv->tx_swr_gpio_p);
}
tx_priv->swr_clk_users++;
} else {
@ -1472,9 +1474,9 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
regmap_update_bits(regmap,
BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
0x01, 0x00);
tx_macro_mclk_enable(tx_priv, 0);
msm_cdc_pinctrl_select_sleep_state(
tx_priv->tx_swr_gpio_p);
tx_macro_mclk_enable(tx_priv, 0);
}
}
dev_dbg(tx_priv->dev, "%s: swrm clock users %d\n",

8
asoc/codecs/bolero/wsa-macro.c
View file

@ -2570,8 +2570,12 @@ static int wsa_swrm_clock(void *handle, bool enable)
__func__, (enable ? "enable" : "disable"));
if (enable) {
if (wsa_priv->swr_clk_users == 0) {
msm_cdc_pinctrl_select_active_state(
wsa_priv->wsa_swr_gpio_p);
ret = wsa_macro_mclk_enable(wsa_priv, 1, true);
if (ret < 0) {
msm_cdc_pinctrl_select_sleep_state(
wsa_priv->wsa_swr_gpio_p);
dev_err(wsa_priv->dev,
"%s: wsa request clock enable failed\n",
__func__);
@ -2589,8 +2593,6 @@ static int wsa_swrm_clock(void *handle, bool enable)
BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x00);
wsa_priv->reset_swr = false;
msm_cdc_pinctrl_select_active_state(
wsa_priv->wsa_swr_gpio_p);
}
wsa_priv->swr_clk_users++;
} else {
@ -2605,9 +2607,9 @@ static int wsa_swrm_clock(void *handle, bool enable)
regmap_update_bits(regmap,
BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
0x01, 0x00);
wsa_macro_mclk_enable(wsa_priv, 0, true);
msm_cdc_pinctrl_select_sleep_state(
wsa_priv->wsa_swr_gpio_p);
wsa_macro_mclk_enable(wsa_priv, 0, true);
}
}
dev_dbg(wsa_priv->dev, "%s: swrm clock users %d\n",