diff --git a/drivers/backlight/lm3697/ti-lmu.h b/drivers/backlight/lm3697/ti-lmu.h index 092ea11aa05a..09ae353b4672 100644 --- a/drivers/backlight/lm3697/ti-lmu.h +++ b/drivers/backlight/lm3697/ti-lmu.h @@ -21,11 +21,6 @@ #define LMU_EVENT_MONITOR_DONE 0x01 enum ti_lmu_id { - LM3532, - LM3631, - LM3632, - LM3633, - LM3695, LM3697, LMU_MAX_ID, }; @@ -59,20 +54,6 @@ enum ti_lmu_max_current { LMU_IMAX_30mA, }; -enum lm363x_regulator_id { - LM3627X_BOOST, /* Boost output */ - LM3627X_LDO_POS, /* Positive display bias output */ - LM3627X_LDO_NEG, /* Negative display bias output */ - LM3631_BOOST, /* Boost output */ - LM3631_LDO_CONT, /* Display panel controller */ - LM3631_LDO_OREF, /* Gamma reference */ - LM3631_LDO_POS, /* Positive display bias output */ - LM3631_LDO_NEG, /* Negative display bias output */ - LM3632_BOOST, /* Boost output */ - LM3632_LDO_POS, /* Positive display bias output */ - LM3632_LDO_NEG, /* Negative display bias output */ -}; - /** * struct ti_lmu * diff --git a/drivers/backlight/lm3697/ti_lm3697.c b/drivers/backlight/lm3697/ti_lm3697.c index 97752f66d7c3..f72e48d416f7 100644 --- a/drivers/backlight/lm3697/ti_lm3697.c +++ b/drivers/backlight/lm3697/ti_lm3697.c @@ -50,13 +50,6 @@ static int ti_lmu_enable_hw(struct ti_lmu *lmu, enum ti_lmu_id id) /* Delay about 1ms after HW enable pin control */ usleep_range(1000, 1500); - /* LM3631 has additional power up sequence - enable LCD_EN bit. */ - if (id == LM3631) { - return regmap_update_bits(lmu->regmap, LM3631_REG_DEVCTRL, - LM3631_LCD_EN_MASK, - LM3631_LCD_EN_MASK); - } - return 0; } @@ -66,70 +59,6 @@ static void ti_lmu_disable_hw(struct ti_lmu *lmu) gpio_set_value(lmu->en_gpio, 0); } -static struct mfd_cell lm3532_devices[] = { - { - .name = "ti-lmu-backlight", - .id = LM3532, - .of_compatible = "ti,lm3532-backlight", - }, -}; - -#define LM363X_REGULATOR(_id) \ -{ \ - .name = "lm363x-regulator", \ - .id = _id, \ - .of_compatible = "ti,lm363x-regulator", \ -} \ - -static struct mfd_cell lm3631_devices[] = { - LM363X_REGULATOR(LM3631_BOOST), - LM363X_REGULATOR(LM3631_LDO_CONT), - LM363X_REGULATOR(LM3631_LDO_OREF), - LM363X_REGULATOR(LM3631_LDO_POS), - LM363X_REGULATOR(LM3631_LDO_NEG), - { - .name = "ti-lmu-backlight", - .id = LM3631, - .of_compatible = "ti,lm3631-backlight", - }, -}; - -static struct mfd_cell lm3632_devices[] = { - LM363X_REGULATOR(LM3632_BOOST), - LM363X_REGULATOR(LM3632_LDO_POS), - LM363X_REGULATOR(LM3632_LDO_NEG), - { - .name = "ti-lmu-backlight", - .id = LM3632, - .of_compatible = "ti,lm3632-backlight", - }, -}; - -static struct mfd_cell lm3633_devices[] = { - { - .name = "ti-lmu-backlight", - .id = LM3633, - .of_compatible = "ti,lm3633-backlight", - }, - { - .name = "lm3633-leds", - .of_compatible = "ti,lm3633-leds", - }, - /* Monitoring driver for open/short circuit detection */ - { - .name = "ti-lmu-fault-monitor", - .id = LM3633, - .of_compatible = "ti,lm3633-fault-monitor", - }, -}; - -static struct mfd_cell lm3695_devices[] = { - { - .name = "ti-lmu-backlight", - .id = LM3695, - .of_compatible = "ti,lm3695-backlight", - }, -}; static struct mfd_cell lm3697_devices[] = { { @@ -153,19 +82,9 @@ static const struct ti_lmu_data chip##_data = \ .max_register = max_reg, \ } \ -TI_LMU_DATA(lm3532, LM3532_MAX_REG); -TI_LMU_DATA(lm3631, LM3631_MAX_REG); -TI_LMU_DATA(lm3632, LM3632_MAX_REG); -TI_LMU_DATA(lm3633, LM3633_MAX_REG); -TI_LMU_DATA(lm3695, LM3695_MAX_REG); TI_LMU_DATA(lm3697, LM3697_MAX_REG); static const struct of_device_id ti_lmu_of_match[] = { - { .compatible = "ti,lm3532", .data = &lm3532_data }, - { .compatible = "ti,lm3631", .data = &lm3631_data }, - { .compatible = "ti,lm3632", .data = &lm3632_data }, - { .compatible = "ti,lm3633", .data = &lm3633_data }, - { .compatible = "ti,lm3695", .data = &lm3695_data }, { .compatible = "ti,lm3697", .data = &lm3697_data }, { } }; @@ -242,11 +161,6 @@ static int ti_lmu_remove(struct i2c_client *cl) } static const struct i2c_device_id ti_lmu_ids[] = { - { "lm3532", LM3532 }, - { "lm3631", LM3631 }, - { "lm3632", LM3632 }, - { "lm3633", LM3633 }, - { "lm3695", LM3695 }, { "lm3697", LM3697 }, { } }; diff --git a/drivers/backlight/lm3697/ti_lm3697.h b/drivers/backlight/lm3697/ti_lm3697.h index f2818010a743..2070430a133f 100644 --- a/drivers/backlight/lm3697/ti_lm3697.h +++ b/drivers/backlight/lm3697/ti_lm3697.h @@ -29,117 +29,6 @@ #define LMU_BL_GET_MASK(x) ((x >> 8) & 0xFF) #define LMU_BL_GET_VAL(x) ((x >> 16) & 0xFF) -#define LM3532_INIT_ZONE_0 \ - LMU_BL_REG(LM3532_REG_ZONE_CFG_A, LM3532_ZONE_MASK, LM3532_ZONE_0) -#define LM3532_INIT_ZONE_1 \ - LMU_BL_REG(LM3532_REG_ZONE_CFG_B, LM3532_ZONE_MASK, LM3532_ZONE_1) -#define LM3532_INIT_ZONE_2 \ - LMU_BL_REG(LM3532_REG_ZONE_CFG_C, LM3532_ZONE_MASK, LM3532_ZONE_2) -#define LM3532_CHANNEL_1 \ - LMU_BL_REG(LM3532_REG_OUTPUT_CFG, LM3532_ILED1_CFG_MASK, \ - LM3532_ILED1_CFG_SHIFT) -#define LM3532_CHANNEL_2 \ - LMU_BL_REG(LM3532_REG_OUTPUT_CFG, LM3532_ILED2_CFG_MASK, \ - LM3532_ILED2_CFG_SHIFT) -#define LM3532_CHANNEL_3 \ - LMU_BL_REG(LM3532_REG_OUTPUT_CFG, LM3532_ILED3_CFG_MASK, \ - LM3532_ILED3_CFG_SHIFT) -#define LM3532_MODE_PWM_A \ - LMU_BL_REG(LM3532_REG_PWM_A_CFG, LM3532_PWM_A_MASK, LM3532_PWM_ZONE_0) -#define LM3532_MODE_PWM_B \ - LMU_BL_REG(LM3532_REG_PWM_B_CFG, LM3532_PWM_B_MASK, LM3532_PWM_ZONE_1) -#define LM3532_MODE_PWM_C \ - LMU_BL_REG(LM3532_REG_PWM_C_CFG, LM3532_PWM_C_MASK, LM3532_PWM_ZONE_2) -#define LM3532_RAMPUP \ - LMU_BL_REG(LM3532_REG_RAMPUP, LM3532_RAMPUP_MASK, LM3532_RAMPUP_SHIFT) -#define LM3532_RAMPDN \ - LMU_BL_REG(LM3532_REG_RAMPDN, LM3532_RAMPDN_MASK, LM3532_RAMPDN_SHIFT) - -#define LM3627X_INIT_OVP_25V \ - LMU_BL_REG(LM3627X_REG_CONFIG1, LM3627X_OVP_MASK, LM3627X_OVP_25V) -#define LM3627X_INIT_SWFREQ_1MHZ \ - LMU_BL_REG(LM3627X_REG_CONFIG2, LM3627X_SWFREQ_MASK, LM3627X_SWFREQ_1MHZ) -#define LM36272_SINGLE_CHANNEL \ - LMU_BL_REG(LM3627X_REG_ENABLE, LM36272_BL_CHANNEL_MASK, \ - LM36272_BL_SINGLE_CHANNEL) -#define LM36272_DUAL_CHANNEL \ - LMU_BL_REG(LM3627X_REG_ENABLE, LM36272_BL_CHANNEL_MASK, \ - LM36272_BL_DUAL_CHANNEL) -#define LM36274_CHANNEL_1 \ - LMU_BL_REG(LM3627X_REG_ENABLE, LM36274_BL_CHANNEL_1, \ - LM36274_BL_CHANNEL_1) -#define LM36274_CHANNEL_2 \ - LMU_BL_REG(LM3627X_REG_ENABLE, LM36274_BL_CHANNEL_2, \ - LM36274_BL_CHANNEL_2) -#define LM36274_CHANNEL_3 \ - LMU_BL_REG(LM3627X_REG_ENABLE, LM36274_BL_CHANNEL_3, \ - LM36274_BL_CHANNEL_3) -#define LM36274_CHANNEL_4 \ - LMU_BL_REG(LM3627X_REG_ENABLE, LM36274_BL_CHANNEL_4, \ - LM36274_BL_CHANNEL_4) -#define LM3627X_MODE_PWM \ - LMU_BL_REG(LM3627X_REG_CONFIG1, LM3627X_PWM_MASK, LM3627X_PWM_MODE) - -#define LM3631_INIT_BRT_MODE \ - LMU_BL_REG(LM3631_REG_BRT_MODE, LM3631_MODE_MASK, LM3631_DEFAULT_MODE) -#define LM3631_INIT_DIMMING_MODE \ - LMU_BL_REG(LM3631_REG_BL_CFG, LM3631_MAP_MASK, LM3631_EXPONENTIAL_MAP) -#define LM3631_SINGLE_CHANNEL \ - LMU_BL_REG(LM3631_REG_BL_CFG, LM3631_BL_CHANNEL_MASK, \ - LM3631_BL_SINGLE_CHANNEL) -#define LM3631_DUAL_CHANNEL \ - LMU_BL_REG(LM3631_REG_BL_CFG, LM3631_BL_CHANNEL_MASK, \ - LM3631_BL_DUAL_CHANNEL) -#define LM3631_RAMP \ - LMU_BL_REG(LM3631_REG_SLOPE, LM3631_SLOPE_MASK, LM3631_SLOPE_SHIFT) - -#define LM3632_INIT_OVP_25V \ - LMU_BL_REG(LM3632_REG_CONFIG1, LM3632_OVP_MASK, LM3632_OVP_25V) -#define LM3632_INIT_SWFREQ_1MHZ \ - LMU_BL_REG(LM3632_REG_CONFIG2, LM3632_SWFREQ_MASK, LM3632_SWFREQ_1MHZ) -#define LM3632_SINGLE_CHANNEL \ - LMU_BL_REG(LM3632_REG_ENABLE, LM3632_BL_CHANNEL_MASK, \ - LM3632_BL_SINGLE_CHANNEL) -#define LM3632_DUAL_CHANNEL \ - LMU_BL_REG(LM3632_REG_ENABLE, LM3632_BL_CHANNEL_MASK, \ - LM3632_BL_DUAL_CHANNEL) -#define LM3632_MODE_PWM \ - LMU_BL_REG(LM3632_REG_IO_CTRL, LM3632_PWM_MASK, LM3632_PWM_MODE) - -#define LM3633_INIT_OVP_40V \ - LMU_BL_REG(LM3633_REG_BOOST_CFG, LM3633_OVP_MASK, LM3633_OVP_40V) -#define LM3633_INIT_RAMP_SELECT \ - LMU_BL_REG(LM3633_REG_BL_RAMP_CONF, LM3633_BL_RAMP_MASK, \ - LM3633_BL_RAMP_EACH) -#define LM3633_CHANNEL_HVLED1 \ - LMU_BL_REG(LM3633_REG_HVLED_OUTPUT_CFG, LM3633_HVLED1_CFG_MASK, \ - LM3633_HVLED1_CFG_SHIFT) -#define LM3633_CHANNEL_HVLED2 \ - LMU_BL_REG(LM3633_REG_HVLED_OUTPUT_CFG, LM3633_HVLED2_CFG_MASK, \ - LM3633_HVLED2_CFG_SHIFT) -#define LM3633_CHANNEL_HVLED3 \ - LMU_BL_REG(LM3633_REG_HVLED_OUTPUT_CFG, LM3633_HVLED3_CFG_MASK, \ - LM3633_HVLED3_CFG_SHIFT) -#define LM3633_MODE_PWM_A \ - LMU_BL_REG(LM3633_REG_PWM_CFG, LM3633_PWM_A_MASK, LM3633_PWM_A_MASK) -#define LM3633_MODE_PWM_B \ - LMU_BL_REG(LM3633_REG_PWM_CFG, LM3633_PWM_B_MASK, LM3633_PWM_B_MASK) -#define LM3633_RAMPUP \ - LMU_BL_REG(LM3633_REG_BL0_RAMP, LM3633_BL_RAMPUP_MASK, \ - LM3633_BL_RAMPUP_SHIFT) -#define LM3633_RAMPDN \ - LMU_BL_REG(LM3633_REG_BL0_RAMP, LM3633_BL_RAMPDN_MASK, \ - LM3633_BL_RAMPDN_SHIFT) - -#define LM3695_INIT_BRT_MODE \ - LMU_BL_REG(LM3695_REG_GP, LM3695_BRT_RW_MASK, LM3695_BRT_RW_MASK) -#define LM3695_SINGLE_CHANNEL \ - LMU_BL_REG(LM3695_REG_GP, LM3695_BL_CHANNEL_MASK, \ - LM3695_BL_SINGLE_CHANNEL) -#define LM3695_DUAL_CHANNEL \ - LMU_BL_REG(LM3695_REG_GP, LM3695_BL_CHANNEL_MASK, \ - LM3695_BL_DUAL_CHANNEL) - #define LM3697_INIT_RAMP_SELECT \ LMU_BL_REG(LM3697_REG_RAMP_CONF, LM3697_RAMP_MASK, LM3697_RAMP_EACH) #define LM3697_CHANNEL_1 \ @@ -160,13 +49,6 @@ #define LM3697_RAMPDN \ LMU_BL_REG(LM3697_REG_BL0_RAMP, LM3697_RAMPDN_MASK, LM3697_RAMPDN_SHIFT) -#define LM3532_MAX_CHANNELS 3 -#define LM36272_MAX_CHANNELS 2 -#define LM36274_MAX_CHANNELS 4 -#define LM3631_MAX_CHANNELS 2 -#define LM3632_MAX_CHANNELS 2 -#define LM3633_MAX_CHANNELS 3 -#define LM3695_MAX_CHANNELS 2 #define LM3697_MAX_CHANNELS 3 #define MAX_BRIGHTNESS_8BIT 255 diff --git a/drivers/backlight/lm3697/ti_lm3697_backlight.c b/drivers/backlight/lm3697/ti_lm3697_backlight.c index bf96c86c1f76..5471147610eb 100644 --- a/drivers/backlight/lm3697/ti_lm3697_backlight.c +++ b/drivers/backlight/lm3697/ti_lm3697_backlight.c @@ -138,7 +138,7 @@ static int dump_i2c_reg(struct ti_lmu_bl_chip *chip) { struct regmap *regmap = chip->lmu->regmap; int ret_val = 0; -#if 1 + regmap_read(regmap, 0x10, &ret_val); pr_err("[bkl] %s read 0x10 = 0x%x\n", __func__, ret_val); regmap_read(regmap, 0x1A, &ret_val); @@ -155,54 +155,6 @@ static int dump_i2c_reg(struct ti_lmu_bl_chip *chip) pr_err("[bkl] %s read 0x18 = 0x%x\n", __func__, ret_val); regmap_read(regmap, 0x16, &ret_val); pr_err("[bkl] %s read 0x16 = 0x%x\n", __func__, ret_val); -#else - regmap_read(regmap, 0x00, &ret_val); - pr_err("[bkl] %s read 0x00 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x01, &ret_val); - pr_err("[bkl] %s read 0x01 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x10, &ret_val); - pr_err("[bkl] %s read 0x10 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x11, &ret_val); - pr_err("[bkl] %s read 0x11 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x12, &ret_val); - pr_err("[bkl] %s read 0x12 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x13, &ret_val); - pr_err("[bkl] %s read 0x13 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x14, &ret_val); - pr_err("[bkl] %s read 0x14 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x15, &ret_val); - pr_err("[bkl] %s read 0x15 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x16, &ret_val); - pr_err("[bkl] %s read 0x16 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x17, &ret_val); - pr_err("[bkl] %s read 0x17 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x18, &ret_val); - pr_err("[bkl] %s read 0x18 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x19, &ret_val); - pr_err("[bkl] %s read 0x19 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x1A, &ret_val); - pr_err("[bkl] %s read 0x1A = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x1B, &ret_val); - pr_err("[bkl] %s read 0x1B = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x1C, &ret_val); - pr_err("[bkl] %s read 0x1C = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x20, &ret_val); - pr_err("[bkl] %s read 0x20 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x21, &ret_val); - pr_err("[bkl] %s read 0x21 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x22, &ret_val); - pr_err("[bkl] %s read 0x22 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x23, &ret_val); - pr_err("[bkl] %s read 0x23 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x24, &ret_val); - pr_err("[bkl] %s read 0x24 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0xB0, &ret_val); - pr_err("[bkl] %s read 0xB0 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0xB2, &ret_val); - pr_err("[bkl] %s read 0xB2 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0xB4, &ret_val); - pr_err("[bkl] %s read 0xB4 = 0x%x\n", __func__, ret_val); -#endif return 0; } @@ -243,8 +195,6 @@ static int ti_lmu_backlight_enable(struct ti_lmu_bl *lmu_bl, int enable) struct regmap *regmap = chip->lmu->regmap; unsigned long enable_time = chip->cfg->reginfo->enable_usec; u8 *reg = chip->cfg->reginfo->enable; - //u8 offset = chip->cfg->reginfo->enable_offset; - //u8 mask = BIT(lmu_bl->bank_id) << offset; if (!reg) return -EINVAL; @@ -254,8 +204,6 @@ static int ti_lmu_backlight_enable(struct ti_lmu_bl *lmu_bl, int enable) else return regmap_write(regmap, *reg, 0x00); - dump_i2c_reg(chip); - if (enable_time > 0) usleep_range(enable_time, enable_time + 100); } @@ -339,16 +287,13 @@ static int ti_lmu_backlight_update_brightness_register(struct ti_lmu_bl *lmu_bl, if (!reginfo->brightness_lsb) return -EINVAL; - // i = brightness; - // brightness = translate_value[i]; - reg = reginfo->brightness_lsb[lmu_bl->bank_id]; ret = regmap_update_bits(regmap, reg, LMU_BACKLIGHT_11BIT_LSB_MASK, brightness); if (ret) return ret; - pr_err("[bkl][after]11bit %s brightness = %d\n", __func__, brightness); + pr_debug("[bkl][after]11bit %s brightness = %d\n", __func__, brightness); val = (brightness >> LMU_BACKLIGHT_11BIT_MSB_SHIFT) & 0xFF; } else { val = brightness & 0xFF; @@ -357,7 +302,6 @@ static int ti_lmu_backlight_update_brightness_register(struct ti_lmu_bl *lmu_bl, reg = reginfo->brightness_msb[lmu_bl->bank_id]; ret = regmap_write(regmap, reg, val); - dump_i2c_reg(lmu_bl->chip); return ret; } static int ti_lmu_backlight_set_brightness(int brightness) @@ -375,17 +319,12 @@ static int ti_lmu_backlight_set_brightness(int brightness) return ret; } - /*if (lmu_bl->mode == BL_PWM_BASED) - ti_lmu_backlight_pwm_ctrl(lmu_bl, brightness, - bl_dev->props.max_brightness);*/ - return ti_lmu_backlight_update_brightness_register(lmu_bl, brightness); } int lm3697_set_brightness(int brightness) { printk(KERN_INFO "[bkl][before]%s brightness = %d\n", __func__, brightness); - //return ti_lmu_backlight_update_brightness_register(bl_chip->lmu_bl, brightness); return ti_lmu_backlight_set_brightness(brightness); } @@ -425,44 +364,6 @@ static const struct backlight_ops lmu_backlight_ops = { .get_brightness = ti_lmu_backlight_get_brightness, }; -#if 0 -static int of_property_count_elems_of_size(const struct device_node *np, - const char *propname, int elem_size) -{ - struct property *prop = of_find_property(np, propname, NULL); - - if (!prop) - return -EINVAL; - if (!prop->value) - return -ENODATA; - - if (prop->length % elem_size != 0) { - pr_err("size of %s in node %s is not a multiple of %d\n", - propname, np->full_name, elem_size); - return -EINVAL; - } - - return prop->length / elem_size; -} - -/** - * of_property_count_u32_elems - Count the number of u32 elements in a property - * - * @np: device node from which the property value is to be read. - * @propname: name of the property to be searched. - * - * Search for a property in a device node and count the number of u32 elements - * in it. Returns number of elements on sucess, -EINVAL if the property does - * not exist or its length does not match a multiple of u32 and -ENODATA if the - * property does not have a value. - */ -static int of_property_count_u32_elems(const struct device_node *np, - const char *propname) -{ - return of_property_count_elems_of_size(np, propname, sizeof(u32)); -} -#endif - static int ti_lmu_backlight_of_get_ctrl_bank(struct device_node *np, struct ti_lmu_bl *lmu_bl) { @@ -561,73 +462,6 @@ static int ti_lmu_backlight_of_create(struct ti_lmu_bl_chip *chip, return 0; } -#if 0 -static int ti_lmu_backlight_create_channel(struct ti_lmu_bl *lmu_bl) -{ - struct regmap *regmap = lmu_bl->chip->lmu->regmap; - u32 *reg = lmu_bl->chip->cfg->reginfo->channel; - int num_channels = lmu_bl->chip->cfg->num_channels; - int i, ret; - u8 val; - - /* - * How to create backlight output channels: - * Check 'led_sources' bit and update registers. - * - * 1) Dual channel configuration - * The 1st register data is used for single channel. - * The 2nd register data is used for dual channel. - * - * 2) Multiple channel configuration - * Each register data is mapped to bank ID. - * Bit shift operation is defined in channel registers. - * - * Channel register data consists of address, mask, value. - * Driver can get each data by using LMU_BL_GET_ADDR(), - * LMU_BL_GET_MASK(), LMU_BL_GET_VAL(). - */ - - if (num_channels == NUM_DUAL_CHANNEL) { - if (lmu_bl->led_sources == LMU_BACKLIGHT_DUAL_CHANNEL_USED) - ++reg; - - return regmap_update_bits(regmap, LMU_BL_GET_ADDR(*reg), - LMU_BL_GET_MASK(*reg), - LMU_BL_GET_VAL(*reg)); - } - - for (i = 0; i < num_channels; i++) { - if (!reg) - break; - - /* - * The result of LMU_BL_GET_VAL() - * - * Register set value. One bank controls multiple channels. - * LM36274 data should be configured with 'single_bank_used'. - * Otherwise, the result is shift bit. - * The bank_id should be shifted for the channel configuration. - */ - - if (test_bit(i, &lmu_bl->led_sources)) { - if (lmu_bl->chip->cfg->single_bank_used) - val = LMU_BL_GET_VAL(*reg); - else - val = lmu_bl->bank_id << LMU_BL_GET_VAL(*reg); - - ret = regmap_update_bits(regmap, LMU_BL_GET_ADDR(*reg), - LMU_BL_GET_MASK(*reg), val); - if (ret) - return ret; - } - - reg++; - } - - return 0; -} -#endif - static int ti_lmu_backlight_update_ctrl_mode(struct ti_lmu_bl *lmu_bl) { struct regmap *regmap = lmu_bl->chip->lmu->regmap; @@ -731,10 +565,6 @@ static int ti_lmu_backlight_configure(struct ti_lmu_bl *lmu_bl) { int ret; - //ret = ti_lmu_backlight_create_channel(lmu_bl); - //if (ret) - // return ret; - ret = ti_lmu_backlight_update_ctrl_mode(lmu_bl); if (ret) return ret; @@ -745,9 +575,6 @@ static int ti_lmu_backlight_configure(struct ti_lmu_bl *lmu_bl) static int ti_lmu_backlight_init(struct ti_lmu_bl_chip *chip) { struct regmap *regmap = chip->lmu->regmap; - //u32 *reg = chip->cfg->reginfo->init; - //int num_init = chip->cfg->reginfo->num_init; - //int i, ret; pr_err("[bkl] %s enter\n", __func__); /* * 'init' register data consists of address, mask, value. @@ -755,25 +582,6 @@ static int ti_lmu_backlight_init(struct ti_lmu_bl_chip *chip) * LMU_BL_GET_MASK(), LMU_BL_GET_VAL(). */ -#if 0 - for (i = 0; i < num_init; i++) { - if (!reg) - break; - - ret = regmap_update_bits(regmap, LMU_BL_GET_ADDR(*reg), - LMU_BL_GET_MASK(*reg), - LMU_BL_GET_VAL(*reg)); - pr_err("%s ADDR = 0x%x, MASK = 0x%x, VAL = 0x%x\n", __func__, - LMU_BL_GET_ADDR(*reg), - LMU_BL_GET_MASK(*reg), - LMU_BL_GET_VAL(*reg)); - - if (ret) - return ret; - - reg++; - } -#else regmap_write(regmap, 0x10, 0x07); regmap_write(regmap, 0x12, 0x11); regmap_write(regmap, 0x16, 0x01); @@ -785,7 +593,7 @@ static int ti_lmu_backlight_init(struct ti_lmu_bl_chip *chip) regmap_write(regmap, 0x23, 0xFF); regmap_write(regmap, 0x24, 0x02); regmap_write(regmap, 0xB4, 0x03); -#endif + pr_err("[bkl] %s finish\n", __func__); return 0; @@ -840,24 +648,7 @@ static ssize_t i2c_reg_dump_show(struct device *dev, struct regmap *regmap = bl_chip->lmu->regmap; int ret_val = 0; -#if 0 - regmap_read(regmap, 0x10, &ret_val); - pr_err("[bkl] %s read 0x10 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x1A, &ret_val); - pr_err("[bkl] %s read 0x1A = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x1C, &ret_val); - pr_err("[bkl] %s read 0x1C = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x22, &ret_val); - pr_err("[bkl] %s read 0x22 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x23, &ret_val); - pr_err("[bkl] %s read 0x23 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x24, &ret_val); - pr_err("[bkl] %s read 0x24 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x18, &ret_val); - pr_err("[bkl] %s read 0x18 = 0x%x\n", __func__, ret_val); - regmap_read(regmap, 0x16, &ret_val); - pr_err("[bkl] %s read 0x16 = 0x%x\n", __func__, ret_val); -#else + regmap_read(regmap, 0x00, &ret_val); pr_err("[bkl] %s read 0x00 = 0x%x\n", __func__, ret_val); regmap_read(regmap, 0x01, &ret_val); @@ -904,7 +695,6 @@ static ssize_t i2c_reg_dump_show(struct device *dev, pr_err("[bkl] %s read 0xB2 = 0x%x\n", __func__, ret_val); regmap_read(regmap, 0xB4, &ret_val); pr_err("[bkl] %s read 0xB4 = 0x%x\n", __func__, ret_val); -#endif ret = snprintf(buf, PAGE_SIZE, "reg dump done \n"); return ret; @@ -912,6 +702,31 @@ static ssize_t i2c_reg_dump_show(struct device *dev, DEVICE_ATTR(i2c_reg_dump, S_IRUGO, i2c_reg_dump_show, NULL); +static int ti_lm3697_read_chipid(struct ti_lmu_bl_chip *chip) +{ + int ret_val = 0; + unsigned char cnt = 0; + struct regmap *regmap = chip->lmu->regmap; + + while (cnt < 5) + { + regmap_read(regmap, 0x00, &ret_val); + switch (ret_val) + { + case 0x01: + pr_info("%s ti_lm3697 detected\n",__func__); + return 0; + default: + pr_info("%s unsupported device revision (0x%x)\n", + __func__, ret_val); + break; + } + cnt++; + msleep(2); + } + + return -EINVAL; +} static struct ti_lmu_bl_chip * ti_lmu_backlight_register(struct device *dev, struct ti_lmu *lmu, const struct ti_lmu_bl_cfg *cfg) @@ -920,18 +735,16 @@ ti_lmu_backlight_register(struct device *dev, struct ti_lmu *lmu, struct ti_lmu_bl *each; int i, ret; - pr_err("[bkl] %s enter\n", __func__); + pr_debug("[bkl] %s enter\n", __func__); if (!cfg) { dev_err(dev, "Operation is not configured\n"); - return ERR_PTR(-EINVAL); + goto err_ein; } chip = devm_kzalloc(dev, sizeof(*chip), 0); - if (!chip){ - - return ERR_PTR(-ENOMEM); -} + if (!chip) + goto err_eno; chip->dev = dev; chip->lmu = lmu; @@ -939,37 +752,34 @@ ti_lmu_backlight_register(struct device *dev, struct ti_lmu *lmu, ret = ti_lmu_backlight_of_create(chip, dev->of_node); if (ret){ - return ERR_PTR(ret); + goto err_init; } - dump_i2c_reg(chip); -#if 0 - ret = ti_lmu_backlight_init(chip); - if (ret) { - dev_err(dev, "Backlight init err: %d\n", ret); - return ERR_PTR(ret); + ret = ti_lm3697_read_chipid(chip); + if (ret < 0) + { + pr_err("%s : ID idenfy failed\n", __func__); + goto err_id; } -#endif for (i = 0; i < chip->num_backlights; i++) { each = chip->lmu_bl + i; ret = ti_lmu_backlight_configure(each); if (ret) { dev_err(dev, "[bkl] Backlight config err: %d\n", ret); - return ERR_PTR(ret); + goto err_each; } ret = ti_lmu_backlight_add_device(dev, each); if (ret) { dev_err(dev, "[bkl] Backlight device err: %d\n", ret); - return ERR_PTR(ret); + goto err_add; } - //backlight_update_status(each->bl_dev); } ret = ti_lmu_backlight_init(chip); if (ret) { dev_err(dev, "Backlight init err: %d\n", ret); - return ERR_PTR(ret); + goto err_init; } dump_i2c_reg(chip); @@ -984,6 +794,21 @@ ti_lmu_backlight_register(struct device *dev, struct ti_lmu *lmu, pr_err("[bkl] %s finish\n", __func__); return chip; + +err_id: + gpio_free(chip->lmu->en_gpio); + kfree(chip); +err_init: + kfree(chip); +err_add: + kfree(dev); + kfree(each); +err_each: + kfree(each); +err_ein: + return ERR_PTR(-EINVAL); +err_eno: + return ERR_PTR(-ENOMEM); } static void ti_lmu_backlight_unregister(struct ti_lmu_bl_chip *chip) @@ -1024,11 +849,6 @@ static int ti_lmu_backlight_probe(struct platform_device *pdev) pr_err("[bkl] %s enter\n", __func__); - /* set PM439_GPIO4 output ,HIGH and enable */ - //spmi_register_write(0xC340,0x11); - //spmi_register_write(0xC346,0x80); - //writel_relaxed(0x11,0xC340); - //writel_relaxed(0x80,0xC346); chip = ti_lmu_backlight_register(dev, lmu, &lmu_bl_cfg[pdev->id]); if (IS_ERR(chip)) diff --git a/drivers/backlight/lm3697/ti_lm3697_backlight_data.c b/drivers/backlight/lm3697/ti_lm3697_backlight_data.c index 258830029b1e..f2ed06f15c79 100644 --- a/drivers/backlight/lm3697/ti_lm3697_backlight_data.c +++ b/drivers/backlight/lm3697/ti_lm3697_backlight_data.c @@ -16,170 +16,6 @@ #include "ti_lm3697_regulator.h" #include "ti-lmu.h" -/* LM3532 */ -static u32 lm3532_init_regs[] = { - LM3532_INIT_ZONE_0, - LM3532_INIT_ZONE_1, - LM3532_INIT_ZONE_2, -}; - -static u32 lm3532_channel_regs[] = { - LM3532_CHANNEL_1, - LM3532_CHANNEL_2, - LM3532_CHANNEL_3, -}; - -static u32 lm3532_mode_regs[] = { - LM3532_MODE_PWM_A, - LM3532_MODE_PWM_B, - LM3532_MODE_PWM_C, -}; - -static u32 lm3532_ramp_regs[] = { - LM3532_RAMPUP, - LM3532_RAMPDN, -}; - -static u8 lm3532_enable_reg = LM3532_REG_ENABLE; - -static u8 lm3532_brightness_regs[] = { - LM3532_REG_BRT_A, - LM3532_REG_BRT_B, - LM3532_REG_BRT_C, -}; - -static const struct ti_lmu_bl_reg lm3532_reg_info = { - .init = lm3532_init_regs, - .num_init = ARRAY_SIZE(lm3532_init_regs), - .channel = lm3532_channel_regs, - .mode = lm3532_mode_regs, - .ramp = lm3532_ramp_regs, - .enable = &lm3532_enable_reg, - .brightness_msb = lm3532_brightness_regs, -}; - -/* LM3631 */ -static u32 lm3631_init_regs[] = { - LM3631_INIT_BRT_MODE, - LM3631_INIT_DIMMING_MODE, -}; - -static u32 lm3631_channel_regs[] = { - LM3631_SINGLE_CHANNEL, - LM3631_DUAL_CHANNEL, -}; - -static u32 lm3631_ramp_reg = LM3631_RAMP; -static u8 lm3631_enable_reg = LM3631_REG_DEVCTRL; -static u8 lm3631_brightness_msb_reg = LM3631_REG_BRT_MSB; -static u8 lm3631_brightness_lsb_reg = LM3631_REG_BRT_LSB; - -static const struct ti_lmu_bl_reg lm3631_reg_info = { - .init = lm3631_init_regs, - .num_init = ARRAY_SIZE(lm3631_init_regs), - .channel = lm3631_channel_regs, - .ramp = &lm3631_ramp_reg, - .enable = &lm3631_enable_reg, - .brightness_msb = &lm3631_brightness_msb_reg, - .brightness_lsb = &lm3631_brightness_lsb_reg, -}; - -/* LM3632 */ -static u32 lm3632_init_regs[] = { - LM3632_INIT_OVP_25V, - LM3632_INIT_SWFREQ_1MHZ, -}; - -static u32 lm3632_channel_regs[] = { - LM3632_SINGLE_CHANNEL, - LM3632_DUAL_CHANNEL, -}; - -static u32 lm3632_mode_reg = LM3632_MODE_PWM; -static u8 lm3632_enable_reg = LM3632_REG_ENABLE; -static u8 lm3632_brightness_msb_reg = LM3632_REG_BRT_MSB; -static u8 lm3632_brightness_lsb_reg = LM3632_REG_BRT_LSB; - -static const struct ti_lmu_bl_reg lm3632_reg_info = { - .init = lm3632_init_regs, - .num_init = ARRAY_SIZE(lm3632_init_regs), - .channel = lm3632_channel_regs, - .mode = &lm3632_mode_reg, - .enable = &lm3632_enable_reg, - .brightness_msb = &lm3632_brightness_msb_reg, - .brightness_lsb = &lm3632_brightness_lsb_reg, -}; - -/* LM3633 */ -static u32 lm3633_init_regs[] = { - LM3633_INIT_OVP_40V, - LM3633_INIT_RAMP_SELECT, -}; - -static u32 lm3633_channel_regs[] = { - LM3633_CHANNEL_HVLED1, - LM3633_CHANNEL_HVLED2, - LM3633_CHANNEL_HVLED3, -}; - -static u32 lm3633_mode_regs[] = { - LM3633_MODE_PWM_A, - LM3633_MODE_PWM_B, -}; - -static u32 lm3633_ramp_regs[] = { - LM3633_RAMPUP, - LM3633_RAMPDN, -}; - -static u8 lm3633_enable_reg = LM3633_REG_ENABLE; - -static u8 lm3633_brightness_msb_regs[] = { - LM3633_REG_BRT_HVLED_A_MSB, - LM3633_REG_BRT_HVLED_B_MSB, -}; - -static u8 lm3633_brightness_lsb_regs[] = { - LM3633_REG_BRT_HVLED_A_LSB, - LM3633_REG_BRT_HVLED_B_LSB, -}; - -static const struct ti_lmu_bl_reg lm3633_reg_info = { - .init = lm3633_init_regs, - .num_init = ARRAY_SIZE(lm3633_init_regs), - .channel = lm3633_channel_regs, - .mode = lm3633_mode_regs, - .ramp = lm3633_ramp_regs, - .ramp_reg_offset = 1, /* For LM3633_REG_BL1_RAMPUP/DN */ - .enable = &lm3633_enable_reg, - .brightness_msb = lm3633_brightness_msb_regs, - .brightness_lsb = lm3633_brightness_lsb_regs, -}; - -/* LM3695 */ -static u32 lm3695_init_regs[] = { - LM3695_INIT_BRT_MODE, -}; - -static u32 lm3695_channel_regs[] = { - LM3695_SINGLE_CHANNEL, - LM3695_DUAL_CHANNEL, -}; - -static u8 lm3695_enable_reg = LM3695_REG_GP; -static u8 lm3695_brightness_msb_reg = LM3695_REG_BRT_MSB; -static u8 lm3695_brightness_lsb_reg = LM3695_REG_BRT_LSB; - -static const struct ti_lmu_bl_reg lm3695_reg_info = { - .init = lm3695_init_regs, - .num_init = ARRAY_SIZE(lm3695_init_regs), - .channel = lm3695_channel_regs, - .enable = &lm3695_enable_reg, - .enable_usec = 600, - .brightness_msb = &lm3695_brightness_msb_reg, - .brightness_lsb = &lm3695_brightness_lsb_reg, -}; - /* LM3697 */ static u32 lm3697_init_regs[] = { //LM3697_INIT_RAMP_SELECT, @@ -228,55 +64,11 @@ static const struct ti_lmu_bl_reg lm3697_reg_info = { .brightness_lsb = lm3697_brightness_lsb_regs, }; -static int lm3532_ramp_table[] = { 0, 1, 2, 4, 8, 16, 32, 65 }; - -static int lm3631_ramp_table[] = { - 0, 1, 2, 5, 10, 20, 50, 100, - 250, 500, 750, 1000, 1500, 2000, 3000, 4000, -}; - static int common_ramp_table[] = { 2, 250, 500, 1000, 2000, 4000, 8000, 16000, }; struct ti_lmu_bl_cfg lmu_bl_cfg[LMU_MAX_ID] = { - { - .reginfo = &lm3532_reg_info, - .num_channels = LM3532_MAX_CHANNELS, - .max_brightness = MAX_BRIGHTNESS_8BIT, - .pwm_action = UPDATE_PWM_AND_BRT_REGISTER, - .ramp_table = lm3532_ramp_table, - .size_ramp = ARRAY_SIZE(lm3532_ramp_table), - }, - { - .reginfo = &lm3631_reg_info, - .num_channels = LM3631_MAX_CHANNELS, - .max_brightness = MAX_BRIGHTNESS_11BIT, - .pwm_action = UPDATE_PWM_ONLY, - .ramp_table = lm3631_ramp_table, - .size_ramp = ARRAY_SIZE(lm3631_ramp_table), - }, - { - .reginfo = &lm3632_reg_info, - .num_channels = LM3632_MAX_CHANNELS, - .max_brightness = MAX_BRIGHTNESS_11BIT, - .pwm_action = UPDATE_PWM_ONLY, - }, - { - .reginfo = &lm3633_reg_info, - .num_channels = LM3633_MAX_CHANNELS, - .max_brightness = MAX_BRIGHTNESS_11BIT, - .pwm_action = UPDATE_MAX_BRT, - .ramp_table = common_ramp_table, - .size_ramp = ARRAY_SIZE(common_ramp_table), - .fault_monitor_used = true, - }, - { - .reginfo = &lm3695_reg_info, - .num_channels = LM3695_MAX_CHANNELS, - .max_brightness = MAX_BRIGHTNESS_11BIT, - .pwm_action = UPDATE_PWM_AND_BRT_REGISTER, - }, { .reginfo = &lm3697_reg_info, .num_channels = LM3697_MAX_CHANNELS, diff --git a/drivers/backlight/lm3697/ti_lm3697_regulator.h b/drivers/backlight/lm3697/ti_lm3697_regulator.h index 0779918c8315..343188bbacc3 100644 --- a/drivers/backlight/lm3697/ti_lm3697_regulator.h +++ b/drivers/backlight/lm3697/ti_lm3697_regulator.h @@ -15,269 +15,6 @@ #include -/* LM3532 */ -#define LM3532_REG_OUTPUT_CFG 0x10 -#define LM3532_ILED1_CFG_MASK 0x03 -#define LM3532_ILED2_CFG_MASK 0x0C -#define LM3532_ILED3_CFG_MASK 0x30 -#define LM3532_ILED1_CFG_SHIFT 0 -#define LM3532_ILED2_CFG_SHIFT 2 -#define LM3532_ILED3_CFG_SHIFT 4 - -#define LM3532_REG_RAMPUP 0x12 -#define LM3532_REG_RAMPDN LM3532_REG_RAMPUP -#define LM3532_RAMPUP_MASK 0x07 -#define LM3532_RAMPUP_SHIFT 0 -#define LM3532_RAMPDN_MASK 0x38 -#define LM3532_RAMPDN_SHIFT 3 - -#define LM3532_REG_ENABLE 0x1D - -#define LM3532_REG_PWM_A_CFG 0x13 -#define LM3532_PWM_A_MASK 0x05 /* zone 0 */ -#define LM3532_PWM_ZONE_0 BIT(2) - -#define LM3532_REG_PWM_B_CFG 0x14 -#define LM3532_PWM_B_MASK 0x09 /* zone 1 */ -#define LM3532_PWM_ZONE_1 BIT(3) - -#define LM3532_REG_PWM_C_CFG 0x15 -#define LM3532_PWM_C_MASK 0x11 /* zone 2 */ -#define LM3532_PWM_ZONE_2 BIT(4) - -#define LM3532_REG_ZONE_CFG_A 0x16 -#define LM3532_REG_ZONE_CFG_B 0x18 -#define LM3532_REG_ZONE_CFG_C 0x1A -#define LM3532_ZONE_MASK (BIT(2) | BIT(3) | BIT(4)) -#define LM3532_ZONE_0 0 -#define LM3532_ZONE_1 BIT(2) -#define LM3532_ZONE_2 BIT(3) - -#define LM3532_REG_BRT_A 0x70 /* zone 0 */ -#define LM3532_REG_BRT_B 0x76 /* zone 1 */ -#define LM3532_REG_BRT_C 0x7C /* zone 2 */ - -#define LM3532_MAX_REG 0x7E - -/* LM36272 and LM36274 */ -#define LM3627X_REG_CONFIG1 0x02 -#define LM3627X_OVP_MASK (BIT(5) | BIT(6) | BIT(7)) -#define LM3627X_OVP_17V 0 -#define LM3627X_OVP_21V BIT(5) -#define LM3627X_OVP_25V BIT(6) -#define LM3627X_OVP_29V (BIT(5) | BIT(6)) -#define LM3627X_PWM_MASK BIT(0) -#define LM3627X_PWM_MODE BIT(0) - -#define LM3627X_REG_CONFIG2 0x03 -#define LM3627X_SWFREQ_MASK BIT(7) -#define LM3627X_SWFREQ_1MHZ BIT(7) - -#define LM3627X_REG_BRT_LSB 0x04 -#define LM3627X_REG_BRT_MSB 0x05 - -#define LM3627X_REG_ENABLE 0x08 -#define LM3627X_BL_ENABLE_OFFSET 4 -#define LM36272_BL_CHANNEL_MASK (BIT(0) | BIT(1)) -#define LM36272_BL_SINGLE_CHANNEL BIT(0) -#define LM36272_BL_DUAL_CHANNEL (BIT(0) | BIT(1)) -#define LM36274_BL_CHANNEL_1 BIT(0) -#define LM36274_BL_CHANNEL_2 BIT(1) -#define LM36274_BL_CHANNEL_3 BIT(2) -#define LM36274_BL_CHANNEL_4 BIT(3) - -#define LM3627X_REG_BIAS_CONFIG 0x09 -#define LM3627X_EXT_EN_MASK BIT(0) -#define LM3627X_EN_VNEG_MASK BIT(1) -#define LM3627X_EN_VPOS_MASK BIT(2) -#define LM3627X_BIAS_MASK (BIT(5) | BIT(6) | BIT(7)) -#define LM3627X_BIAS_DEFAULT BIT(7) -#define LM3627X_BIAS_AUTO (BIT(5) | BIT(7)) -#define LM3627X_BIAS_WAKE1 (BIT(6) | BIT(7)) -#define LM3627X_BIAS_WAKE2 (BIT(5) | BIT(6) | BIT(7)) - -#define LM3627X_REG_VOUT_BOOST 0x0C -#define LM3627X_REG_VOUT_POS 0x0D -#define LM3627X_REG_VOUT_NEG 0x0E -#define LM3627X_VOUT_MASK 0x3F - -#define LM3627X_MAX_REG 0x13 - -/* LM3631 */ -#define LM3631_REG_DEVCTRL 0x00 -#define LM3631_LCD_EN_MASK BIT(1) -#define LM3631_BL_EN_MASK BIT(0) - -#define LM3631_REG_BRT_LSB 0x01 -#define LM3631_REG_BRT_MSB 0x02 - -#define LM3631_REG_BL_CFG 0x06 -#define LM3631_BL_CHANNEL_MASK BIT(3) -#define LM3631_BL_DUAL_CHANNEL 0 -#define LM3631_BL_SINGLE_CHANNEL BIT(3) -#define LM3631_MAP_MASK BIT(5) -#define LM3631_EXPONENTIAL_MAP 0 - -#define LM3631_REG_BRT_MODE 0x08 -#define LM3631_MODE_MASK (BIT(1) | BIT(2) | BIT(3)) -#define LM3631_DEFAULT_MODE (BIT(1) | BIT(3)) - -#define LM3631_REG_SLOPE 0x09 -#define LM3631_SLOPE_MASK 0xF0 -#define LM3631_SLOPE_SHIFT 4 - -#define LM3631_REG_LDO_CTRL1 0x0A -#define LM3631_EN_OREF_MASK BIT(0) -#define LM3631_EN_VNEG_MASK BIT(1) -#define LM3631_EN_VPOS_MASK BIT(2) - -#define LM3631_REG_LDO_CTRL2 0x0B -#define LM3631_EN_CONT_MASK BIT(0) - -#define LM3631_REG_VOUT_CONT 0x0C -#define LM3631_VOUT_CONT_MASK (BIT(6) | BIT(7)) - -#define LM3631_REG_VOUT_BOOST 0x0C -#define LM3631_REG_VOUT_POS 0x0D -#define LM3631_REG_VOUT_NEG 0x0E -#define LM3631_REG_VOUT_OREF 0x0F -#define LM3631_VOUT_MASK 0x3F - -#define LM3631_REG_ENTIME_VCONT 0x0B -#define LM3631_ENTIME_CONT_MASK 0x70 - -#define LM3631_REG_ENTIME_VOREF 0x0F -#define LM3631_REG_ENTIME_VPOS 0x10 -#define LM3631_REG_ENTIME_VNEG 0x11 -#define LM3631_ENTIME_MASK 0xF0 -#define LM3631_ENTIME_SHIFT 4 - -#define LM3631_MAX_REG 0x16 - -/* LM3632 */ -#define LM3632_REG_CONFIG1 0x02 -#define LM3632_OVP_MASK (BIT(5) | BIT(6) | BIT(7)) -#define LM3632_OVP_25V BIT(6) - -#define LM3632_REG_CONFIG2 0x03 -#define LM3632_SWFREQ_MASK BIT(7) -#define LM3632_SWFREQ_1MHZ BIT(7) - -#define LM3632_REG_BRT_LSB 0x04 -#define LM3632_REG_BRT_MSB 0x05 - -#define LM3632_REG_IO_CTRL 0x09 -#define LM3632_PWM_MASK BIT(6) -#define LM3632_I2C_MODE 0 -#define LM3632_PWM_MODE BIT(6) - -#define LM3632_REG_ENABLE 0x0A -#define LM3632_BL_EN_MASK BIT(0) -#define LM3632_BL_CHANNEL_MASK (BIT(3) | BIT(4)) -#define LM3632_BL_SINGLE_CHANNEL BIT(4) -#define LM3632_BL_DUAL_CHANNEL BIT(3) - -#define LM3632_REG_BIAS_CONFIG 0x0C -#define LM3632_EXT_EN_MASK BIT(0) -#define LM3632_EN_VNEG_MASK BIT(1) -#define LM3632_EN_VPOS_MASK BIT(2) - -#define LM3632_REG_VOUT_BOOST 0x0D -#define LM3632_REG_VOUT_POS 0x0E -#define LM3632_REG_VOUT_NEG 0x0F -#define LM3632_VOUT_MASK 0x3F - -#define LM3632_MAX_REG 0x10 - -/* LM3633 */ -#define LM3633_REG_HVLED_OUTPUT_CFG 0x10 -#define LM3633_HVLED1_CFG_MASK BIT(0) -#define LM3633_HVLED2_CFG_MASK BIT(1) -#define LM3633_HVLED3_CFG_MASK BIT(2) -#define LM3633_HVLED1_CFG_SHIFT 0 -#define LM3633_HVLED2_CFG_SHIFT 1 -#define LM3633_HVLED3_CFG_SHIFT 2 - -#define LM3633_REG_BANK_SEL 0x11 - -#define LM3633_REG_BL0_RAMP 0x12 -#define LM3633_REG_BL1_RAMP 0x13 -#define LM3633_BL_RAMPUP_MASK 0xF0 -#define LM3633_BL_RAMPUP_SHIFT 4 -#define LM3633_BL_RAMPDN_MASK 0x0F -#define LM3633_BL_RAMPDN_SHIFT 0 - -#define LM3633_REG_BL_RAMP_CONF 0x1B -#define LM3633_BL_RAMP_MASK 0x0F -#define LM3633_BL_RAMP_EACH 0x05 - -#define LM3633_REG_PTN0_RAMP 0x1C -#define LM3633_REG_PTN1_RAMP 0x1D -#define LM3633_PTN_RAMPUP_MASK 0x70 -#define LM3633_PTN_RAMPUP_SHIFT 4 -#define LM3633_PTN_RAMPDN_MASK 0x07 -#define LM3633_PTN_RAMPDN_SHIFT 0 - -#define LM3633_REG_LED_MAPPING_MODE 0x1F -#define LM3633_LED_EXPONENTIAL BIT(1) - -#define LM3633_REG_IMAX_HVLED_A 0x20 -#define LM3633_REG_IMAX_HVLED_B 0x21 -#define LM3633_REG_IMAX_LVLED_BASE 0x22 - -#define LM3633_REG_BL_FEEDBACK_ENABLE 0x28 - -#define LM3633_REG_ENABLE 0x2B -#define LM3633_LED_BANK_OFFSET 2 - -#define LM3633_REG_PATTERN 0x2C - -#define LM3633_REG_BOOST_CFG 0x2D -#define LM3633_OVP_MASK (BIT(1) | BIT(2)) -#define LM3633_OVP_40V 0x6 - -#define LM3633_REG_PWM_CFG 0x2F -#define LM3633_PWM_A_MASK BIT(0) -#define LM3633_PWM_B_MASK BIT(1) - -#define LM3633_REG_BRT_HVLED_A_LSB 0x40 -#define LM3633_REG_BRT_HVLED_A_MSB 0x41 -#define LM3633_REG_BRT_HVLED_B_LSB 0x42 -#define LM3633_REG_BRT_HVLED_B_MSB 0x43 - -#define LM3633_REG_BRT_LVLED_BASE 0x44 - -#define LM3633_REG_PTN_DELAY 0x50 - -#define LM3633_REG_PTN_LOWTIME 0x51 - -#define LM3633_REG_PTN_HIGHTIME 0x52 - -#define LM3633_REG_PTN_LOWBRT 0x53 - -#define LM3633_REG_PTN_HIGHBRT LM3633_REG_BRT_LVLED_BASE - -#define LM3633_REG_BL_OPEN_FAULT_STATUS 0xB0 - -#define LM3633_REG_BL_SHORT_FAULT_STATUS 0xB2 - -#define LM3633_REG_MONITOR_ENABLE 0xB4 - -#define LM3633_MAX_REG 0xB4 - -/* LM3695 */ -#define LM3695_REG_GP 0x10 -#define LM3695_BL_CHANNEL_MASK BIT(3) -#define LM3695_BL_DUAL_CHANNEL 0 -#define LM3695_BL_SINGLE_CHANNEL BIT(3) -#define LM3695_BRT_RW_MASK BIT(2) -#define LM3695_BL_EN_MASK BIT(0) - -#define LM3695_REG_BRT_LSB 0x13 -#define LM3695_REG_BRT_MSB 0x14 - -#define LM3695_MAX_REG 0x14 - /* LM3697 */ #define LM3697_REG_HVLED_OUTPUT_CFG 0x10 #define LM3697_HVLED1_CFG_MASK BIT(0)