From 240335dcfa53cba5ce389a653d3a849544313219 Mon Sep 17 00:00:00 2001 From: Saurabh Sahu Date: Tue, 9 Mar 2021 10:33:21 +0530 Subject: [PATCH] ARM: dts: msm: Add GPUCC clock node and GDSCs for MONACO GPUCC clock nodes is required for clocks client to request, so add support for the same. Also add the GDSCs required by clients for MONACO. Change-Id: I2eb3f35e48a1f7f44c93df64384cee1af871416a --- qcom/monaco-gdsc.dtsi | 4 ++-- qcom/monaco.dtsi | 11 ++++++++--- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/qcom/monaco-gdsc.dtsi b/qcom/monaco-gdsc.dtsi index 88829cb6e9fa..d68823eeb79e 100644 --- a/qcom/monaco-gdsc.dtsi +++ b/qcom/monaco-gdsc.dtsi @@ -71,7 +71,7 @@ }; gpu_cx_gdsc: qcom,gdsc@5994064 { - compatible = "regulator-fixed"; + compatible = "qcom,gdsc"; reg = <0x5994064 0x4>; regulator-name = "gpu_cx_gdsc"; hw-ctl-addr = <&gpu_cx_hw_ctrl>; @@ -80,7 +80,7 @@ }; gpu_gx_gdsc: qcom,gdsc@599400c { - compatible = "regulator-fixed"; + compatible = "qcom,gdsc"; reg = <0x599400c 0x4>; regulator-name = "gpu_gx_gdsc"; sw-reset = <&gpu_gx_sw_reset>; diff --git a/qcom/monaco.dtsi b/qcom/monaco.dtsi index 3e9883ccbcad..4b96b0aa38ca 100644 --- a/qcom/monaco.dtsi +++ b/qcom/monaco.dtsi @@ -710,9 +710,14 @@ #reset-cells = <1>; }; - gpucc: clock-controller@5994000 { - compatible = "qcom,dummycc"; - clock-output-names = "gpucc_clocks"; + gpucc: clock-controller@5990000 { + compatible = "qcom,monaco-gpucc", "syscon"; + reg = <0x5990000 0x9000>; + reg-names = "cc_base"; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&gcc GPLL0>; + clock-names = "bi_tcxo", "bi_tcxo_ao", "gpll0_out_main"; + vdd_cx-supply = <&VDD_CX_LEVEL>; #clock-cells = <1>; #reset-cells = <1>; };