From 02e9cae6bce45d220686ddc077812890d2571230 Mon Sep 17 00:00:00 2001
From: Nadav Levintov <nadavl@qti.qualcomm.com>
Date: Thu, 23 Apr 2020 14:04:04 +0300
Subject: [PATCH] ARM: dts: msm: add qcom,ipa-gpi_event_rp_ddr property

Added a new property, which will determine if event
ring RP would be read from event context register or
from DDR location.

Change-Id: I171cb2fad87008ef2bda8752e498ecb932f4dfc8
---
 qcom/lahaina.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index a38cdcb80ab9..7251c84383ae 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -4349,6 +4349,7 @@
 		qcom,wan-use-skb-page;
 		qcom,rmnet-ctl-enable;
 		qcom,tx-wrapper-cache-max-size = <400>;
+		qcom,ipa-gpi-event-rp-ddr;
 		clock-names = "core_clk";
 		clocks = <&clock_rpmh RPMH_IPA_CLK>;
 		qcom,interconnect,num-cases = <5>;