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clk: tegra: disable SSC for PLL_D2
PLLD2 is used for HDMI which does not allow Spread Spectrum clocking. Signed-off-by: Peter De Schrijver <[email protected]> Tested-by: Thierry Reding <[email protected]> Acked-by: Thierry Reding <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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@ -146,7 +146,7 @@
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#define PLLD_SDM_EN_MASK BIT(16)
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#define PLLD2_SDM_EN_MASK BIT(31)
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#define PLLD2_SSC_EN_MASK BIT(30)
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#define PLLD2_SSC_EN_MASK 0
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#define PLLDP_SS_CFG 0x598
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#define PLLDP_SDM_EN_MASK BIT(31)
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