diff --git a/drivers/staging/fw-api/fw/htc_services.h b/drivers/staging/fw-api/fw/htc_services.h index 50d57596a0b0..73eb52c32911 100644 --- a/drivers/staging/fw-api/fw/htc_services.h +++ b/drivers/staging/fw-api/fw/htc_services.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2012, 2014-2017, 2020 The Linux Foundation. All rights reserved. - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2022-2023, 2025 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * @@ -93,6 +93,11 @@ typedef enum { */ #define HTT_DATA3_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP,2) +/* HTT_DATA4_MSG_SVC + * H2T channel to transfer MSDU/MPDU queue info from host to target + */ +#define HTT_DATA4_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP,3) + /* raw stream service (i.e. flash, tcmd, calibration apps) */ #define HTC_RAW_STREAMS_SVC MAKE_SERVICE_ID(HTC_TEST_GROUP,0) diff --git a/drivers/staging/fw-api/fw/htt.h b/drivers/staging/fw-api/fw/htt.h index e9d34066ff72..6e1874396d53 100644 --- a/drivers/staging/fw-api/fw/htt.h +++ b/drivers/staging/fw-api/fw/htt.h @@ -266,9 +266,14 @@ * 3.136 Add htt_ext_present flag in htt_tx_tcl_global_seq_metadata. * 3.137 Add more HTT_SDWF_MSDUQ_CFG_IND_ERROR codes. * 3.138 Add T2H MLO_LATENCY_REQ, H2T _RESP msg defs. + * 3.139 Add CLASS_INFO_IDX field in MLO_R_PEER_MAP msg. + * 3.140 Add H2T MPDUQ_AND_MSDUQ_INFO_HDR and MPDUQ_OF_MSDUQ_INFO defs. + * 3.141 Add H2T HTT_AST_INFO for RxOLE. + * 3.142 Add T2H GLOBAL_PEER_ID_UNMAP def, update H2T MPDUQ_OR_MSDUQ_INFO def. + * 3.143 Add T2H HAPS msg def. */ #define HTT_CURRENT_VERSION_MAJOR 3 -#define HTT_CURRENT_VERSION_MINOR 138 +#define HTT_CURRENT_VERSION_MINOR 143 #define HTT_NUM_TX_FRAG_DESC 1024 @@ -767,7 +772,10 @@ typedef enum { HTT_STATS_AST_ENTRY_TAG = 132, /* htt_ast_entry_tlv */ HTT_STATS_TX_PDEV_BE_DL_MU_OFDMA_STATS_TAG = 133, /* htt_tx_pdev_dl_be_mu_ofdma_sch_stats_tlv, TOPIC=advanced */ HTT_STATS_TX_PDEV_BE_UL_MU_OFDMA_STATS_TAG = 134, /* htt_tx_pdev_ul_be_mu_ofdma_sch_stats_tlv, TOPIC=advanced */ - HTT_STATS_TX_PDEV_RATE_STATS_BE_OFDMA_TAG = 135, /* htt_tx_pdev_rate_stats_be_ofdma_tlv */ + HTT_STATS_TX_PDEV_RATE_BE_BN_OFDMA_TAG = 135, /* htt_stats_tx_pdev_rate_be_bn_ofdma_tlv */ + /* retain deprecated name as an alias */ + HTT_STATS_TX_PDEV_RATE_STATS_BE_OFDMA_TAG = + HTT_STATS_TX_PDEV_RATE_BE_BN_OFDMA_TAG, HTT_STATS_RX_PDEV_UL_MUMIMO_TRIG_BE_STATS_TAG = 136, /* htt_rx_pdev_ul_mumimo_trig_be_stats_tlv, TOPIC=advanced */ HTT_STATS_TX_SELFGEN_BE_ERR_STATS_TAG = 137, /* htt_tx_selfgen_be_err_stats_tlv, TOPIC=advanced */ HTT_STATS_TX_SELFGEN_BE_STATS_TAG = 138, /* htt_tx_selfgen_be_stats_tlv, TOPIC=advanced */ @@ -775,7 +783,10 @@ typedef enum { HTT_STATS_TX_PDEV_BE_UL_MU_MIMO_STATS_TAG = 140, /* htt_tx_pdev_be_ul_mu_mimo_sch_stats_tlv */ HTT_STATS_RX_PDEV_BE_UL_MIMO_USER_STATS_TAG = 141, /* htt_rx_pdev_be_ul_mimo_user_stats_tlv */ HTT_STATS_RX_RING_STATS_TAG = 142, /* htt_rx_fw_ring_stats_tlv_v */ - HTT_STATS_RX_PDEV_BE_UL_TRIG_STATS_TAG = 143, /* htt_rx_pdev_be_ul_trigger_stats_tlv, TOPIC=advanced */ + HTT_STATS_RX_PDEV_BE_BN_UL_TRIG_TAG = 143, /* htt_stats_rx_pdev_be_bn_ul_trig_tlv, TOPIC=advanced */ + /* retain deprecated name as an alias */ + HTT_STATS_RX_PDEV_BE_UL_TRIG_STATS_TAG = + HTT_STATS_RX_PDEV_BE_BN_UL_TRIG_TAG, HTT_STATS_TX_PDEV_SAWF_RATE_STATS_TAG = 144, /* htt_tx_pdev_rate_stats_sawf_tlv, TOPIC=advanced */ HTT_STATS_STRM_GEN_MPDUS_TAG = 145, /* htt_stats_strm_gen_mpdus_tlv_t */ HTT_STATS_STRM_GEN_MPDUS_DETAILS_TAG = 146, /* htt_stats_strm_gen_mpdus_details_tlv_t */ @@ -844,6 +855,17 @@ typedef enum { HTT_STATS_PDEV_UL_MUMIMO_DENYLIST_STATS_TAG = 209, /* htt_stats_pdev_ulmumimo_denylist_stats_tlv */ HTT_STATS_PDEV_UL_MUMIMO_SEQ_TERM_STATS_TAG = 210, /* htt_stats_pdev_ulmumimo_seq_term_stats_tlv */ HTT_STATS_PDEV_UL_MUMIMO_HIST_INELIGIBILITY_TAG = 211, /* htt_stats_pdev_ulmumimo_hist_ineligibility_tlv */ + HTT_STATS_PHY_PAPRD_PB_TAG = 212, /* htt_stats_phy_paprd_pb_tlv */ + HTT_STATS_HDS_PROF_STATS_TAG = 213, /* htt_stat_hds_prof_stats_tlv */ + HTT_STATS_TX_PDEV_MDSB_NUM_USERS_HISTOGRAM_TLV_TAG = 214, /* htt_stats_tx_pdev_mdsb_num_users_histogram_tlv */ + HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_TAG = 215, /* htt_stats_tx_pdev_pending_seq_cnt_on_sched_post_hist_tlv */ + HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_TAG = 216, /* htt_stats_tx_pdev_pending_seq_cnt_in_hwq_hist_tlv */ + HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_TAG = 217, /* htt_stats_tx_pdev_pending_seq_cnt_in_txq_hist_tlv */ + HTT_STATS_SCHED_TXQ_EARLY_COMPL_TAG = 218, /* htt_stats_sched_txq_early_compl_tlv */ + HTT_STATS_RX_PDEV_BN_UL_OFDMA_USER_TAG = 219, /* htt_stats_rx_pdev_bn_ul_ofdma_user_tlv */ + HTT_STATS_TX_SELFGEN_BN_ERR_TAG = 220, /* htt_stats_tx_selfgen_bn_err_tlv, TOPIC=advanced */ + HTT_STATS_TX_SELFGEN_BN_TAG = 221, /* htt_stats_tx_selfgen_bn_tlv, TOPIC=advanced */ + HTT_STATS_TX_SELFGEN_BN_SCHED_STATUS_TAG = 222, /* htt_stats_tx_selfgen_bn_sched_status_tlv, TOPIC=advanced */ HTT_STATS_MAX_TAG, } htt_stats_tlv_tag_t; @@ -878,47 +900,50 @@ typedef htt_stats_tlv_tag_t htt_tlv_tag_t; /*=== host -> target messages ===============================================*/ enum htt_h2t_msg_type { - HTT_H2T_MSG_TYPE_VERSION_REQ = 0x0, - HTT_H2T_MSG_TYPE_TX_FRM = 0x1, - HTT_H2T_MSG_TYPE_RX_RING_CFG = 0x2, - HTT_H2T_MSG_TYPE_STATS_REQ = 0x3, - HTT_H2T_MSG_TYPE_SYNC = 0x4, - HTT_H2T_MSG_TYPE_AGGR_CFG = 0x5, - HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG = 0x6, - DEPRECATED_HTT_H2T_MSG_TYPE_MGMT_TX = 0x7, /* no longer used */ - HTT_H2T_MSG_TYPE_WDI_IPA_CFG = 0x8, - HTT_H2T_MSG_TYPE_WDI_IPA_OP_REQ = 0x9, - HTT_H2T_MSG_TYPE_AGGR_CFG_EX = 0xa, /* per vdev amsdu subfrm limit */ - HTT_H2T_MSG_TYPE_SRING_SETUP = 0xb, - HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG = 0xc, - HTT_H2T_MSG_TYPE_ADD_WDS_ENTRY = 0xd, - HTT_H2T_MSG_TYPE_DELETE_WDS_ENTRY = 0xe, - HTT_H2T_MSG_TYPE_RFS_CONFIG = 0xf, - HTT_H2T_MSG_TYPE_EXT_STATS_REQ = 0x10, - HTT_H2T_MSG_TYPE_PPDU_STATS_CFG = 0x11, - HTT_H2T_MSG_TYPE_RX_FSE_SETUP_CFG = 0x12, - HTT_H2T_MSG_TYPE_RX_FSE_OPERATION_CFG = 0x13, - HTT_H2T_MSG_TYPE_CHAN_CALDATA = 0x14, - HTT_H2T_MSG_TYPE_RX_FISA_CFG = 0x15, - HTT_H2T_MSG_TYPE_3_TUPLE_HASH_CFG = 0x16, - HTT_H2T_MSG_TYPE_RX_FULL_MONITOR_MODE = 0x17, - HTT_H2T_MSG_TYPE_HOST_PADDR_SIZE = 0x18, - HTT_H2T_MSG_TYPE_RXDMA_RXOLE_PPE_CFG = 0x19, - HTT_H2T_MSG_TYPE_VDEVS_TXRX_STATS_CFG = 0x1a, - HTT_H2T_MSG_TYPE_TX_MONITOR_CFG = 0x1b, - HTT_H2T_SAWF_DEF_QUEUES_MAP_REQ = 0x1c, - HTT_H2T_SAWF_DEF_QUEUES_UNMAP_REQ = 0x1d, - HTT_H2T_SAWF_DEF_QUEUES_MAP_REPORT_REQ = 0x1e, - HTT_H2T_MSG_TYPE_MSI_SETUP = 0x1f, - HTT_H2T_MSG_TYPE_STREAMING_STATS_REQ = 0x20, - HTT_H2T_MSG_TYPE_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP = 0x21, + HTT_H2T_MSG_TYPE_VERSION_REQ = 0x0, + HTT_H2T_MSG_TYPE_TX_FRM = 0x1, + HTT_H2T_MSG_TYPE_RX_RING_CFG = 0x2, + HTT_H2T_MSG_TYPE_STATS_REQ = 0x3, + HTT_H2T_MSG_TYPE_SYNC = 0x4, + HTT_H2T_MSG_TYPE_AGGR_CFG = 0x5, + HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG = 0x6, + DEPRECATED_HTT_H2T_MSG_TYPE_MGMT_TX = 0x7, /* no longer used */ + HTT_H2T_MSG_TYPE_WDI_IPA_CFG = 0x8, + HTT_H2T_MSG_TYPE_WDI_IPA_OP_REQ = 0x9, + HTT_H2T_MSG_TYPE_AGGR_CFG_EX = 0xa, /* per vdev amsdu subfrm limit */ + HTT_H2T_MSG_TYPE_SRING_SETUP = 0xb, + HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG = 0xc, + HTT_H2T_MSG_TYPE_ADD_WDS_ENTRY = 0xd, + HTT_H2T_MSG_TYPE_DELETE_WDS_ENTRY = 0xe, + HTT_H2T_MSG_TYPE_RFS_CONFIG = 0xf, + HTT_H2T_MSG_TYPE_EXT_STATS_REQ = 0x10, + HTT_H2T_MSG_TYPE_PPDU_STATS_CFG = 0x11, + HTT_H2T_MSG_TYPE_RX_FSE_SETUP_CFG = 0x12, + HTT_H2T_MSG_TYPE_RX_FSE_OPERATION_CFG = 0x13, + HTT_H2T_MSG_TYPE_CHAN_CALDATA = 0x14, + HTT_H2T_MSG_TYPE_RX_FISA_CFG = 0x15, + HTT_H2T_MSG_TYPE_3_TUPLE_HASH_CFG = 0x16, + HTT_H2T_MSG_TYPE_RX_FULL_MONITOR_MODE = 0x17, + HTT_H2T_MSG_TYPE_HOST_PADDR_SIZE = 0x18, + HTT_H2T_MSG_TYPE_RXDMA_RXOLE_PPE_CFG = 0x19, + HTT_H2T_MSG_TYPE_VDEVS_TXRX_STATS_CFG = 0x1a, + HTT_H2T_MSG_TYPE_TX_MONITOR_CFG = 0x1b, + HTT_H2T_SAWF_DEF_QUEUES_MAP_REQ = 0x1c, + HTT_H2T_SAWF_DEF_QUEUES_UNMAP_REQ = 0x1d, + HTT_H2T_SAWF_DEF_QUEUES_MAP_REPORT_REQ = 0x1e, + HTT_H2T_MSG_TYPE_MSI_SETUP = 0x1f, + HTT_H2T_MSG_TYPE_STREAMING_STATS_REQ = 0x20, + HTT_H2T_MSG_TYPE_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP = 0x21, HTT_H2T_MSG_TYPE_UMAC_HANG_RECOVERY_SOC_START_PRE_RESET = 0x22, - HTT_H2T_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP = 0x23, - HTT_H2T_MSG_TYPE_PRIMARY_LINK_PEER_MIGRATE_RESP = 0x24, - HTT_H2T_MSG_TYPE_TX_LATENCY_STATS_CFG = 0x25, - HTT_H2T_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP = 0x26, - HTT_H2T_MSG_TYPE_SDWF_MSDUQ_RECFG_REQ = 0x27, - HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_RESP = 0x28, + HTT_H2T_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP = 0x23, + HTT_H2T_MSG_TYPE_PRIMARY_LINK_PEER_MIGRATE_RESP = 0x24, + HTT_H2T_MSG_TYPE_TX_LATENCY_STATS_CFG = 0x25, + HTT_H2T_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP = 0x26, + HTT_H2T_MSG_TYPE_SDWF_MSDUQ_RECFG_REQ = 0x27, + HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_RESP = 0x28, + HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR = 0x29, + HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO = 0x2a, + HTT_H2T_MSG_TYPE_AST_INFO = 0x2b, /* keep this last */ HTT_H2T_NUM_MSGS @@ -11584,6 +11609,507 @@ PREPACK struct htt_h2t_mlo_latency_stats { ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MLO_LATENCY_STATS_NUM_OF_TX_PKT_S)); \ } while (0) +/** + * @brief host -> target msg to provide MSDUQ or MPDUQ for new TID in a peer + * + * MSG_TYPE => HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR + * + * @details + * struct htt_h2t_mpduq_and_msduq_info_hdr: + * HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR message is sent by the host to + * target to tell how many mpduq and msduq info TLVs, in units of bytes, + * are present in the htt payload + * Example message contents: + *------------------------------------------------------------------- + *| htt_h2t_mpduq_and_msduq_info_hdr | + *------------------------------------------------------------------- + *| mpduq_info_tlv -> tid 0 , peer_id 1 | + *------------------------------------------------------------------- + *| mpduq_info_tlv -> tid 6, peer_id 1 | + *------------------------------------------------------------------- + *| msduq_info_tlv -> tid 0, peer_id 1 | + *------------------------------------------------------------------- + *| msduq_info_tlv -> tid 0, peer_id 1 | + *------------------------------------------------------------------- + *| msduq_info_tlv -> tid 6, peer_id 1 | + *------------------------------------------------------------------- + * + * As shown in the above exampple, a single htt buffer can hold multiple mpduq + * and msduq info tlvs, the info within the tlvs will indicate the peer and tid + * to which they belong. + */ + +/* HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR */ +PREPACK struct htt_h2t_mpduq_and_msduq_info_hdr { + A_UINT32 msg_type: 8, /* bits 7:0 */ + payload_size_bytes: 12, /* bits 19:8 */ + reserved_1a: 12; /* bits 31:20 */ +} POSTPACK; + +#define HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR_PAYLOAD_SIZE_BYTES_M 0x000FFF00 +#define HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR_PAYLOAD_SIZE_BYTES_S 8 +#define HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR_PAYLOAD_SIZE_BYTES_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR_PAYLOAD_SIZE_BYTES_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR_PAYLOAD_SIZE_BYTES_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR_PAYLOAD_SIZE_BYTES_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR_PAYLOAD_SIZE_BYTES, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_AND_MSDUQ_INFO_HDR_PAYLOAD_SIZE_BYTES_S)); \ + } while (0) + + +/** + * @brief host -> target message to provide mpduq for a tid in a peer + * + * MSG_TYPE => HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO + * + * @details + * struct htt_h2t_mpduq_or_msduq_info: + * HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO message is sent by the host to + * specify the configuration of new MPDUQ/MSDUQ for a tid in a peer. + * This message supports the following configuration information: + * 1. Info provided per MPDUQ: + * upper 32 bit address of 256 byte aligned physical address for mpduq + * mpduq number + * pn address space + * 2. Info provided per MSDUQ: + * upper 32 bit address of 256 byte aligned physical address for msduq + * msduq_number + * service class id + * + * The message is interpreted as follows for mpduq type: + * dword0 - b'7:0 - msg_type: Identifies msduq and mpduq info to FW + * This will be set to 0x2a + * (HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO) + * b'12:8 - msduq_mpduq_type: Indicate whether this TLV is for + * a MPDU queue or MSDU queue, and if for a MSDU queue, + * what type. + * For an MPDU queue, it will be fixed value of 30 based + * on enum HTT_H2T_TID_MSDUQ_MPDUQ_TYPE. + * b'16:13 - hw_link_id: Indicates which HW link the message is for. + * This HW link ID is mainly relevant for split PHY + * usecases to identify the correct link in same SOC. + * dword1 - b'31:0 - mpduq_address_39_8: 256 byte aligned mpduq physical + * address, since lowest octet is zero for 256 byte aligned + * physical addresses just passing upper 32 bits of + * 40 bit address + * dword2 - b'11:0 – peer_id + * b'16:12 – tid_num + * b'23:17 – reserved + * b'31:24 - pn_addr_32_39: Upper 8 bits of 40 bit pn physical address + * Note that the mpduq_number is formed from the combination of + * peer_id (in bits 11:0) + * tid_num (in bits 16:12) + * msduq_mpduq_type (in bits 21:17) + * dword3 - b'31:0 - pn_addr_0_31: Lower 32 bits of 40 bit pn physical address + * Additional reserved dwords for future use cases + * + * + * The message is interpreted as follows for any msduq type: + * dword0 - b'7:0 - msg_type: Identifies msduq info to fw + * This will be set to 0x2A + * (HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO) + * b'12:8 - msduq_mpduq_type: type of the msduq based on + * enum HTT_H2T_TID_MSDUQ_MPDUQ_TYPE + * b'16:13 - hw_link_id: Indicates which HW link the message is + * intended for. + * This HW link ID is mainly relevant for split PHY + * usecases to identify the correct link in same SOC. + * dword1 - b'11:0 – peer_id + * b'16:12 – tid_num + * b'23:17 – reserved + * b'31:24 - svc_class_id : service class id of the msduq + * Note that the tx_msduq_number is formed from the combination of + * peer_id (in bits 11:0) + * tid_num (in bits 16:12) + * msduq_mpduq_type (in bits 21:17) + * dword2 - b'31:0 - msduq_address_39_8: 256 byte aligned msduq physical + * address, since lowest octet is zero for 256 byte aligned + * addresses just passing upper 32 bits of 40 bit address + * Additional reserved dwords for future use cases + */ + +/* + * Enum describes the various msduq/mpduq types, + * First 8 types correspond to the standard msduq types for data + * Next come custom flows for specific purposes + * enum 30 is reserved for mpduq type + */ +typedef enum { + HTT_H2T_TID_MSDUQ_NONUDP, /* 0 */ + HTT_H2T_TID_MSDUQ_UDP, /* 1 */ + HTT_H2T_TID_MSDUQ_CUSTOM_0, /* 2 */ + HTT_H2T_TID_MSDUQ_CUSTOM_1, /* 3 */ + HTT_H2T_TID_MSDUQ_CUSTOM_2, /* 4 */ + HTT_H2T_TID_MSDUQ_CUSTOM_3, /* 5 */ + HTT_H2T_TID_MSDUQ_CUSTOM_4, /* 6 */ + HTT_H2T_TID_MSDUQ_CUSTOM_5, /* 7 */ + + HTT_H2T_TID_MISC_MSDUQ_TYPE_START, /* 8 */ + HTT_H2T_TID_MSDUQ_HOL = HTT_H2T_TID_MISC_MSDUQ_TYPE_START, /* also 8 */ + HTT_H2T_TID_MSDUQ_MCAST, /* 9 */ + HTT_H2T_TID_MSDUQ_FAST_ROAMING, /* 10 */ + + HTT_H2T_TID_MSDUQ_DATA_TYPE_END = 29, /* 29 */ + HTT_H2T_TID_MPDUQ_TYPE, /* 30 */ + HTT_H2T_TID_MSDUQ_MPDUQ_TYPE_END, /* 31 */ +} HTT_H2T_TID_MSDUQ_MPDUQ_TYPE; + +/* + * Enum to denote tid nums that can be used + * first 8 {0 - 7} numbers correspond to data access category + * {8 - 15} are for user defined usecases + * 16 is used to denote the non-qos tid + */ +typedef enum { + HTT_H2T_DEFAULT_TID_NUM = 0, + HTT_H2T_MAX_VALID_DATA_TID_NUM = 7, + HTT_H2T_NON_QOS_TID_NUM = 16, + HTT_H2T_MAX_TID_NUM = 31, +} H2T_TX_TID; + +/* HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO */ +PREPACK struct htt_h2t_mpduq_or_msduq_info { + A_UINT32 msg_type: 8, /* bits 7:0 */ + msduq_mpduq_type: 5, /* bits 12:8 */ + hw_link_id: 4, /* bits 16:13 */ + reserved0: 15; /* bits 31:17 */ + + union { + struct { + A_UINT32 mpduq_address_39_8; /* bits 31:0 */ + A_UINT32 mpduq_number: 24, /* bits 23:0 */ + pn_addr_39_32: 8; /* bits 31:24 */ + A_UINT32 pn_addr_31_0; /* bits 31:0 */ + A_UINT32 reserved1a; /* bits 31:0 */ + A_UINT32 reserved1b; /* bits 31:0 */ + A_UINT32 reserved1c; /* bits 31:0 */ + A_UINT32 reserved1d; /* bits 31:0 */ + A_UINT32 reserved1e; /* bits 31:0 */ + A_UINT32 reserved1f; /* bits 31:0 */ + }; + struct { + A_UINT32 tx_msduq_number: 24, /* bits 23:0 */ + svc_class_id: 8; /* bits 31:24 */ + A_UINT32 msduq_address_39_8; /* bits 31:0 */ + A_UINT32 reserved2a; /* bits 31:0 */ + A_UINT32 reserved2b; /* bits 31:0 */ + A_UINT32 reserved2c; /* bits 31:0 */ + A_UINT32 reserved2d; /* bits 31:0 */ + A_UINT32 reserved2e; /* bits 31:0 */ + A_UINT32 reserved2f; /* bits 31:0 */ + A_UINT32 reserved2g; /* bits 31:0 */ + }; + }; +} POSTPACK; + +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_MSDUQ_MPDUQ_TYPE_M 0x00001F00 +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_MSDUQ_MPDUQ_TYPE_S 8 +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_MSDUQ_MPDUQ_TYPE_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_MSDUQ_MPDUQ_TYPE_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_MSDUQ_MPDUQ_TYPE_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_MSDUQ_MPDUQ_TYPE_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_MSDUQ_MPDUQ_TYPE, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_MSDUQ_MPDUQ_TYPE_S)); \ + } while (0) + +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_HW_LINK_ID_M 0x0001E000 +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_HW_LINK_ID_S 13 +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_HW_LINK_ID_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_HW_LINK_ID_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_HW_LINK_ID_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_HW_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_HW_LINK_ID, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_INFO_HW_LINK_ID_S)); \ + } while (0) + + +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_PEER_ID_M 0x00000FFF +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_PEER_ID_S 0 +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_PEER_ID_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_PEER_ID_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_PEER_ID_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_PEER_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_PEER_ID, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_PEER_ID_S)); \ + } while (0) + +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_TID_NUM_M 0x0001F000 +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_TID_NUM_S 12 +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_TID_NUM_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_TID_NUM_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_TID_NUM_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_TID_NUM_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_TID_NUM, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_TID_NUM_S)); \ + } while (0) + + +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_MSDUQ_MPDUQ_TYPE_M 0x003E0000 +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_MSDUQ_MPDUQ_TYPE_S 17 +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_MSDUQ_MPDUQ_TYPE_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_MSDUQ_MPDUQ_TYPE_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_MSDUQ_MPDUQ_TYPE_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_MSDUQ_MPDUQ_TYPE_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_MSDUQ_MPDUQ_TYPE, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_OR_MSDUQ_NUMBER_MSDUQ_MPDUQ_TYPE_S)); \ + } while (0) + +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_ADDRESS_39_8_M 0xFFFFFFFF +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_ADDRESS_39_8_S 0 +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_ADDRESS_39_8_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_ADDRESS_39_8_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_ADDRESS_39_8_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_ADDRESS_39_8_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_ADDRESS_39_8, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_ADDRESS_39_8_S)); \ + } while (0) + + +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_NUMBER_M 0x00FFFFFF +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_NUMBER_S 0 +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_NUMBER_GET(_var) \ + (((_var) & HTT_H2T_MSG_MPDUQ_INFO_MPDUQ_NUMBER_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_NUMBER_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_NUMBER_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_NUMBER, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_INFO_MPDUQ_NUMBER_S)); \ + } while (0) + + +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_39_32_M 0xFF000000 +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_39_32_S 24 +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_39_32_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_39_32_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_39_32_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_39_32_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_39_32, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_39_32_S)); \ + } while (0) + +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_31_0_M 0xFFFFFFFF +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_31_0_S 0 +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_31_0_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_31_0_M) >> \ + HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_31_0_S) +#define HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_31_0_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_31_0, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MPDUQ_INFO_PN_ADDRESS_31_0_S)); \ + } while (0) + +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_TX_MSDUQ_NUMBER_M 0x00FFFFFF +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_TX_MSDUQ_NUMBER_S 0 +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_TX_MSDUQ_NUMBER_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MSDUQ_INFO_TX_MSDUQ_NUMBER_M) >> \ + HTT_H2T_MSG_TYPE_MSDUQ_INFO_TX_MSDUQ_NUMBER_S) +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_TX_MSDUQ_NUMBER_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MSDUQ_INFO_TX_MSDUQ_NUMBER, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MSDUQ_INFO_TX_MSDUQ_NUMBER_S)); \ + } while (0) + +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_SVC_CLASS_ID_M 0xFF000000 +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_SVC_CLASS_ID_S 24 +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_SVC_CLASS_ID_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MSDUQ_INFO_SVC_CLASS_ID_M) >> \ + HTT_H2T_MSG_TYPE_MSDUQ_INFO_SVC_CLASS_ID_S) +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_SVC_CLASS_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MSDUQ_INFO_SVC_CLASS_ID, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MSDUQ_INFO_SVC_CLASS_ID_S)); \ + } while (0) + +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_MSDUQ_ADDRESS_39_8_M 0xFFFFFFFF +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_MSDUQ_ADDRESS_39_8_S 0 +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_MSDUQ_ADDRESS_39_8_GET(_var) \ + (((_var) & HTT_H2T_MSG_TYPE_MSDUQ_INFO_MSDUQ_ADDRESS_39_8_M) >> \ + HTT_H2T_MSG_TYPE_MSDUQ_INFO_MSDUQ_ADDRESS_39_8_S) +#define HTT_H2T_MSG_TYPE_MSDUQ_INFO_MSDUQ_ADDRESS_39_8_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_H2T_MSG_TYPE_MSDUQ_INFO_MSDUQ_ADDRESS_39_8, _val); \ + ((_var) |= ((_val) << HTT_H2T_MSG_TYPE_MSDUQ_INFO_MSDUQ_ADDRESS_39_8_S)); \ + } while (0) + + +/* + * @brief host -> target HTT_AST_INFO message + * + * MSG_TYPE => HTT_H2T_MSG_TYPE_AST_INFO + * + * The message would appear as follows: + * |31 24|23 21|20|19|18|17|16|15 8|7 0| + * |--------------+-------------------------------------+-------------------| + * |ast_max_search| ast_table_size | msg_type | + * |------------------------------------------------------------------------| + * | ast_base_addr_31_0 | + * |------------------------------------------------------------------------| + * | ase_hash_key1 | + * |------------------------------------------------------------------------| + * | ase_hash_key2 | + * |------------------------------------------------------------------------| + * | ase_hash_key3 | + * |--------------------+--+--+--+--+--+----------------+-------------------| + * | reserved |L |K |J |I |H | tmo |ast_base_addr_39_32| + * |--------------------+--+--+--+--+--+----------------+-------------------| + * + * The message is interpreted as follows: + * dword0 b'7:0 - msg_type + * 0 b'23:8 - ast table size + * b'31:24 - ast max search + * dword1 - b'31:0 - ast table base address + * dword2 - b'31:0 - ase hash key 1 + * dword3 - b'31:0 - ase hash key 2 + * dword4 - b'31:0 - ase hash key 3 + * dword5 - b'7:0 - ast_base_addr_39_32 + * b'15:8 - ast_timeout_threshold + * b'16 - H - ast cache disable knob + * b'17 - I - ast cache faluires disable knob + * b'18 - J - ast cache cmd read bypass + * Bypassing the reads from memory when an entry is not + * found in cache, in case of full cache commands, + * write back or invalidate commands. + * b'19 - K - ast cache write back fx + * If this fix is disabled, then any write back command + * for a cache line will also lead to invalidation of + * that cache line. + * b'20 - L - ast cache only entry command fix + * If enabled, a new cache entry will always be created + * for requests for which matching data was found + * neither in cache nor in memory. + */ +PREPACK struct htt_ast_info_t { + A_UINT32 msg_type: 8, + ast_table_size: 16, /* number of entries in AST */ + ast_max_search: 8; + A_UINT32 ast_base_addr; /* base address of the AST table */ + A_UINT32 ase_hash_key1; + A_UINT32 ase_hash_key2; + A_UINT32 ase_hash_key3; + A_UINT32 ast_base_addr_39_32: 8, /* 7:0 */ + ast_timeout_threshold: 8, /* 15:8 */ + ast_cache_disable: 1, /* 16 */ + ast_cache_failures_disable: 1, /* 17 */ + ast_cache_cmd_read_bypass_dis: 1, /* 18 */ + ast_cache_write_back_fix_dis: 1, /* 19 */ + ast_cache_only_entry_cmd_fix_dis: 1, /* 20 */ + reserved: 11; +} POSTPACK; + + +#define HTT_AST_INFO_SZ (sizeof(struct htt_ast_info_t)) + +/* DWORD0 */ +#define HTT_AST_INFO_AST_TABLE_SIZE_M 0x00ffff00 +#define HTT_AST_INFO_AST_TABLE_SIZE_S 8 +#define HTT_AST_INFO_AST_TABLE_SIZE_GET(_var) \ + (((_var) & HTT_AST_INFO_AST_TABLE_SIZE_M) >> \ + HTT_AST_INFO_AST_TABLE_SIZE_S) +#define HTT_AST_INFO_AST_TABLE_SIZE_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_AST_INFO_AST_TABLE_SIZE, _val); \ + ((_var) |= ((_val) << HTT_AST_INFO_AST_TABLE_SIZE__S)); \ + } while (0) + +#define HTT_AST_INFO_AST_MAX_SEARCH_M 0xff000000 +#define HTT_AST_INFO_AST_MAX_SEARCH_S 24 +#define HTT_AST_INFO_AST_MAX_SEARCH_GET(_var) \ + (((_var) & HTT_AST_INFO_AST_MAX_SEARCH_M) >> \ + HTT_AST_INFO_AST_MAX_SEARCH_S) +#define HTT_AST_INFO_AST_MAX_SEARCH_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_AST_INFO_AST_MAX_SEARCH, _val); \ + ((_var) |= ((_val) << HTT_AST_INFO_AST_MAX_SEARCH_S)); \ + } while (0) + + +/* DWORD5 */ + +#define HTT_AST_INFO_AST_BASE_ADDR_39_32_M 0x000000ff +#define HTT_AST_INFO_AST_BASE_ADDR_39_32_S 0 +#define HTT_AST_INFO_AST_BASE_ADDR_39_32_GET(_var) \ + (((_var) & HTT_AST_INFO_AST_BASE_ADDR_39_32_M) >> \ + HTT_AST_INFO_AST_BASE_ADDR_39_32_S) +#define HTT_AST_INFO_AST_BASE_ADDR_39_32_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_AST_INFO_AST_BASE_ADDR_39_32, _val); \ + ((_var) |= ((_val) << HTT_AST_INFO_AST_BASE_ADDR_39_32_S)); \ + } while (0) + +#define HTT_AST_INFO_AST_TIMEOUT_THRESHOLD_M 0x0000ff00 +#define HTT_AST_INFO_AST_TIMEOUT_THRESHOLD_S 8 +#define HTT_AST_INFO_AST_TIMEOUT_THRESHOLD_GET(_var) \ + (((_var) & HTT_AST_INFO_AST_TIMEOUT_THRESHOLD_M) >> \ + HTT_AST_INFO_AST_TIMEOUT_THRESHOLD_S) +#define HTT_AST_INFO_AST_TIMEOUT_THRESHOLD_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_AST_INFO_AST_TIMEOUT_THRESHOLD, _val); \ + ((_var) |= ((_val) << HTT_AST_INFO_AST_TIMEOUT_THRESHOLD_S)); \ + } while (0) + +#define HTT_AST_INFO_AST_CACHE_DISABLE_M 0x00010000 +#define HTT_AST_INFO_AST_CACHE_DISABLE_s 16 +#define HTT_AST_INFO_AST_CACHE_DISABLE_GET(_var) \ + (((_var) & HTT_AST_INFO_AST_CACHE_DISABLE_M) >> \ + HTT_AST_INFO_AST_CACHE_DISABLE_s) +#define HTT_AST_INFO_AST_CACHE_DISABLE_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_AST_INFO_AST_CACHE_DISABLE, _val); \ + ((_var) |= ((_val) << HTT_AST_INFO_AST_CACHE_DISABLE_S)); \ + } while (0) + +#define HTT_AST_INFO_AST_CACHE_FALUIRES_DISABLE_M 0x00020000 +#define HTT_AST_INFO_AST_CACHE_FALUIRES_DISABLE_s 17 +#define HTT_AST_INFO_AST_CACHE_FALUIRES_DISABLE_GET(_var) \ + (((_var) & HTT_AST_INFO_AST_CACHE_FALUIRES_DISABLE_M) >> \ + HTT_AST_INFO_AST_CACHE_FALUIRES_DISABLE_s) +#define HTT_AST_INFO_AST_CACHE_FALUIRES_DISABLE_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_AST_INFO_AST_CACHE_FALUIRES_DISABLE, _val); \ + ((_var) |= ((_val) << HTT_AST_INFO_AST_CACHE_FALUIRES_DISABLE_S)); \ + } while (0) + +#define HTT_AST_INFO_AST_CACHE_CMD_READ_BYPASS_DIS_M 0x00040000 +#define HTT_AST_INFO_AST_CACHE_CMD_READ_BYPASS_DIS_s 18 +#define HTT_AST_INFO_AST_CACHE_CMD_READ_BYPASS_DIS_GET(_var) \ + (((_var) & HTT_AST_INFO_AST_CACHE_CMD_READ_BYPASS_DIS_M) >> \ + HTT_AST_INFO_AST_CACHE_CMD_READ_BYPASS_DIS_s) +#define HTT_AST_INFO_AST_CACHE_CMD_READ_BYPASS_DIS_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_AST_INFO_AST_CACHE_CMD_READ_BYPASS_DIS, _val); \ + ((_var) |= ((_val) << HTT_AST_INFO_AST_CACHE_CMD_READ_BYPASS_DIS_S)); \ + } while (0) + +#define HTT_AST_INFO_AST_CACHE_WRITE_BACK_FIX_DIS_M 0x00080000 +#define HTT_AST_INFO_AST_CACHE_WRITE_BACK_FIX_DIS_s 19 +#define HTT_AST_INFO_AST_CACHE_WRITE_BACK_FIX_DIS_GET(_var) \ + (((_var) & HTT_AST_INFO_AST_CACHE_WRITE_BACK_FIX_DIS_M) >> \ + HTT_AST_INFO_AST_CACHE_WRITE_BACK_FIX_DIS_s) +#define HTT_AST_INFO_AST_CACHE_WRITE_BACK_FIX_DIS_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_AST_INFO_AST_CACHE_WRITE_BACK_FIX_DIS, _val); \ + ((_var) |= ((_val) << HTT_AST_INFO_AST_CACHE_WRITE_BACK_FIX_DIS_S)); \ + } while (0) + +#define HTT_AST_INFO_AST_CACHE_ONLY_ENTRY_CMD_FIX_DIS_M 0x00100000 +#define HTT_AST_INFO_AST_CACHE_ONLY_ENTRY_CMD_FIX_DIS_s 20 +#define HTT_AST_INFO_AST_CACHE_ONLY_ENTRY_CMD_FIX_DIS_GET(_var) \ + (((_var) & HTT_AST_INFO_AST_CACHE_ONLY_ENTRY_CMD_FIX_DIS_M) >> \ + HTT_AST_INFO_AST_CACHE_ONLY_ENTRY_CMD_FIX_DIS_s) +#define HTT_AST_INFO_AST_CACHE_ONLY_ENTRY_CMD_FIX_DIS_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_AST_INFO_AST_CACHE_ONLY_ENTRY_CMD_FIX_DIS, _val); \ + ((_var) |= ((_val) << HTT_AST_INFO_AST_CACHE_ONLY_ENTRY_CMD_FIX_DIS_S)); \ + } while (0) + /*=== target -> host messages ===============================================*/ @@ -11659,6 +12185,8 @@ enum htt_t2h_msg_type { HTT_T2H_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP_DONE = 0x3b, HTT_T2H_MSG_TYPE_SDWF_MSDUQ_CFG_IND = 0x3c, HTT_T2H_MSG_TYPE_MLO_LATENCY_REQ = 0x3d, + HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP = 0x3e, + HTT_T2H_MSG_TYPE_HAPS = 0x3f, HTT_T2H_MSG_TYPE_TEST, @@ -14661,40 +15189,41 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t * with, so that the host can use that MLO peer ID to determine which peer * transmitted the rx frame. * - * |31 |29 27|26 24|23 20|19 17|16|15 8|7 0| - * |-------------------------------------------------------------------------| - * |RSVD | PRC |NUMLINK| MLO peer ID | msg type | - * |-------------------------------------------------------------------------| - * | MAC addr 3 | MAC addr 2 | MAC addr 1 | MAC addr 0 | - * |-------------------------------------------------------------------------| - * | RSVD_16_31 | MAC addr 5 | MAC addr 4 | - * |-------------------------------------------------------------------------| - * |CACHE_SET_NUM| TIDMASK |CHIPID|V| Primary TCL AST IDX 0 | - * |-------------------------------------------------------------------------| - * |CACHE_SET_NUM| TIDMASK |CHIPID|V| Primary TCL AST IDX 1 | - * |-------------------------------------------------------------------------| - * |CACHE_SET_NUM| TIDMASK |CHIPID|V| Primary TCL AST IDX 2 | - * |-------------------------------------------------------------------------| - * |RSVD | - * |-------------------------------------------------------------------------| - * |RSVD | - * |-------------------------------------------------------------------------| - * | htt_tlv_hdr_t | - * |-------------------------------------------------------------------------| - * |RSVD_27_31 |CHIPID| VDEVID | SW peer ID | - * |-------------------------------------------------------------------------| - * | htt_tlv_hdr_t | - * |-------------------------------------------------------------------------| - * |RSVD_27_31 |CHIPID| VDEVID | SW peer ID | - * |-------------------------------------------------------------------------| - * | htt_tlv_hdr_t | - * |-------------------------------------------------------------------------| - * |RSVD_27_31 |CHIPID| VDEVID | SW peer ID | - * |-------------------------------------------------------------------------| + * |31 |29 27|26|25|24|23 20|19 17|16|15 8|7 0| + * |--------------------------------------------------------------------------| + * |RSVD | PRC | NUMLINK| MLO peer ID | msg type | + * |--------------------------------------------------------------------------| + * | MAC addr 3 | MAC addr 2 | MAC addr 1 | MAC addr 0 | + * |--------------------------------------------------------------------------| + * | RSVD_25_31 |CV| CLASS_INFO_IDX | MAC addr 5 | MAC addr 4 | + * |--------------------------------------------------------------------------| + * |CACHE_SET_NUM| TIDMASK |CHIPID|V| Primary TCL AST IDX 0 | + * |--------------------------------------------------------------------------| + * |CACHE_SET_NUM| TIDMASK |CHIPID|V| Primary TCL AST IDX 1 | + * |--------------------------------------------------------------------------| + * |CACHE_SET_NUM| TIDMASK |CHIPID|V| Primary TCL AST IDX 2 | + * |--------------------------------------------------------------------------| + * |RSVD | + * |--------------------------------------------------------------------------| + * |RSVD | + * |--------------------------------------------------------------------------| + * | htt_tlv_hdr_t | + * |--------------------------------------------------------------------------| + * |RSVD_27_31 | CHIPID | VDEVID | SW peer ID | + * |--------------------------------------------------------------------------| + * | htt_tlv_hdr_t | + * |--------------------------------------------------------------------------| + * |RSVD_27_31 | CHIPID | VDEVID | SW peer ID | + * |--------------------------------------------------------------------------| + * | htt_tlv_hdr_t | + * |--------------------------------------------------------------------------| + * |RSVD_27_31 | CHIPID | VDEVID | SW peer ID | + * |--------------------------------------------------------------------------| * * Where: * PRC - Primary REO CHIPID - 3 Bits Bit24,25,26 * NUMLINK - NUM_LOGICAL_LINKS - 3 Bits Bit27,28,29 + * CV - CLASSIFY_INFO_IDX_VALID - 1 Bit Bit24 * V (valid) - 1 Bit Bit17 * CHIPID - 3 Bits * TIDMASK - 8 Bits @@ -14734,6 +15263,16 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t * Purpose: Identifies which peer node the peer ID is for. * Value: upper 2 bytes of peer node's MAC address * + * - CLASS_INFO_IDX + * Bits 23:16 + * Purpose: Classify info index assists TCL-L Block in certain families of + * WLAN chips to start finding the flow from the corresponding + * entry in the FLOW LOOK UP TABLE in MLO case + * - CV (CLASS_INFO_IDX_VALID) + * Bit 24 + * Purpose: if set indicates that the CLASS_INFO_IDX is valid, + * else ignore the value reported + * * - PRIMARY_TCL_AST_IDX * Bits 15:0 * Purpose: Primary TCL AST index for this peer. @@ -14805,6 +15344,11 @@ typedef enum { #define HTT_RX_MLO_PEER_MAP_MAC_ADDR_U16_M 0x0000ffff #define HTT_RX_MLO_PEER_MAP_MAC_ADDR_U16_S 0 +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_M 0x00ff0000 +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_S 16 +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_VALID_FLAG_M 0x01000000 +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_VALID_FLAG_S 24 + #define HTT_RX_MLO_PEER_MAP_PRIMARY_AST_INDEX_M 0x0000ffff #define HTT_RX_MLO_PEER_MAP_PRIMARY_AST_INDEX_S 0 #define HTT_RX_MLO_PEER_MAP_AST_INDEX_VALID_FLAG_M 0x00010000 @@ -14853,6 +15397,30 @@ typedef enum { #define HTT_RX_MLO_PEER_PRIMARY_REO_CHIP_ID_GET(word) \ (((word) & HTT_RX_MLO_PEER_PRIMARY_REO_CHIP_ID_M) >> HTT_RX_MLO_PEER_PRIMARY_REO_CHIP_ID_S) +#define HTT_RX_MLO_PEER_PRIMARY_REO_CHIP_ID_SET(word, value) \ + do { \ + HTT_CHECK_SET_VAL(HTT_RX_MLO_PEER_PRIMARY_REO_CHIP_ID, value); \ + (word) |= (value) << HTT_RX_MLO_PEER_PRIMARY_REO_CHIP_ID_S; \ + } while (0) +#define HTT_RX_MLO_PEER_PRIMARY_REO_CHIP_ID_GET(word) \ + (((word) & HTT_RX_MLO_PEER_PRIMARY_REO_CHIP_ID_M) >> HTT_RX_MLO_PEER_PRIMARY_REO_CHIP_ID_S) + +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_SET(word, value) \ + do { \ + HTT_CHECK_SET_VAL(HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX, value); \ + (word) |= (value) << HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_S; \ + } while (0) +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_GET(word) \ + (((word) & HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_M) >> HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_S) + +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_VALID_FLAG_SET(word, value) \ + do { \ + HTT_CHECK_SET_VAL(HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_VALID_FLAG, value); \ + (word) |= (value) << HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_VALID_FLAG_S; \ + } while (0) +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_VALID_FLAG_GET(word) \ + (((word) & HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_VALID_FLAG_M) >> HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_VALID_FLAG_S) + #define HTT_RX_MLO_PEER_MAP_PRIMARY_AST_INDEX_SET(word, value) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_MLO_PEER_MAP_PRIMARY_AST_INDEX, value); \ @@ -14935,6 +15503,8 @@ typedef enum { #define HTT_RX_MLO_PEER_MAP_MAC_ADDR_OFFSET 4 /* bytes */ +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_OFFSET 8 /* bytes */ +#define HTT_RX_MLO_PEER_MAP_CLASSIFY_INFO_IDX_VALID_FLAG_OFFSET 8 /* bytes */ #define HTT_RX_MLO_PEER_MAP_PRIMARY_AST_INDEX_0_OFFSET 12 /* bytes */ #define HTT_RX_MLO_PEER_MAP_PRIMARY_AST_INDEX_1_OFFSET 16 /* bytes */ #define HTT_RX_MLO_PEER_MAP_PRIMARY_AST_INDEX_2_OFFSET 20 /* bytes */ @@ -23449,4 +24019,177 @@ PREPACK struct htt_t2h_mlo_latency_req_t { } while (0) +/* MSG_TYPE => HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP + * + * The following diagram shows the format of the global peer unmap message sent + * from the target to the host. This message is used to send unmap event to host + * after tid and msduq/mpduq cleanup in FW, host cleans up msduq/mpduq based on + * message. + * + * |31 24|23 20|19 8|7 0| + * |-----------------------------------------------------------------------| + * | reserved | hw_link_id | global_peer_id | msg type | + * |-----------------------------------------------------------------------| + * @details + * struct htt_t2h_global_peer_id_unmap_t: + * + * The message is interpreted as follows: + * dword0 - b'7:0 - msg_type: Identifies a request for MLO latency stats + * This will be set to 0x3e + * (HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP) + * b'19:8 - global_peer_id : global peer id assigned by host + * b'23:20 - hw_link_id : hw link id for which unmap is being sent + * + */ + + +/* HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP */ +PREPACK struct htt_t2h_global_peer_id_unmap_t { + A_UINT32 msg_type: 8, /* bits 7:0 */ + global_peer_id: 12, /* bits 19:8 */ + hw_link_id: 4, /* bits 23:20 */ + reserved: 8; /* bits 31:16 */ +} POSTPACK; + +#define HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_GLOBAL_PEER_ID_M 0x000FFF00 +#define HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_GLOBAL_PEER_ID_S 8 +#define HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_GLOBAL_PEER_ID_GET(_var) \ + (((_var) & HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_GLOBAL_PEER_ID_M) >> \ + HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_GLOBAL_PEER_ID_S) +#define HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_GLOBAL_PEER_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_GLOBAL_PEER_ID, _val); \ + ((_var) |= ((_val) << HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_GLOBAL_PEER_ID_S)); \ + } while (0) + +#define HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_HW_LINK_ID_M 0x00F00000 +#define HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_HW_LINK_ID_S 20 +#define HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_HW_LINK_ID_GET(_var) \ + (((_var) & HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_HW_LINK_ID_M) >> \ + HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_HW_LINK_ID_S) +#define HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_HW_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_HW_LINK_ID, _val); \ + ((_var) |= ((_val) << HTT_T2H_MSG_TYPE_GLOBAL_PEER_ID_UNMAP_HW_LINK_ID_S)); \ + } while (0) + + +/* + * @brief target -> pause/unpause host tx queues based on FW indication + * MSG_TYPE => HTT_T2H_MSG_TYPE_HAPS + * + * @details * Header fields: + * + * |31 22|21 20|19 16|15 8|7 0| + * |---------+-------------+-----------+------------------+---------------| + * | RSVD |time_type |action_code| vdev_id | msg type | + * |----------------------------------------------------------------------| + * | time_high | + * |----------------------------------------------------------------------| + * | time_low | + * |----------------------------------------------------------------------| + * + * dword0 - b'7:0 - msg_type: This will be set to + * 0x3f (HTT_T2H_MSG_TYPE_HAPS) + * b'15:8 - vdev_id + * b'19:16 - action_code (HTT_T2H_HAPS_ACTION_CODE): + * b'0000: Pause + * b'0001: Pause with One-Shot Unpause + * b'0010: Unpause + * values 3-15: reserved + * b'21:20 - time_type + * b'31:22 - rsvd + * reverse action_code at time specified below + * (units are specified by the type_type bitfield) + * dword1 - b'31:0 uint32_t time_high + * dword2 - b'31:0 uint32_t time_low + */ +typedef enum { + HTT_T2H_HAPS_ACTION_PAUSE = 0x00, + HTT_T2H_HAPS_ACTION_PAUSE_WITH_ONESHOT_UNPAUSE = 0x01, + HTT_T2H_HAPS_ACTION_UNPAUSE = 0x02, +} HTT_T2H_HAPS_ACTION_CODE; + +typedef enum { + HTT_T2H_HAPS_TIME_TYPE_HOST_QTIME = 0x00, + HTT_T2H_HAPS_TIME_TYPE_TSF = 0x01, +} HTT_T2H_HAPS_TIME_TYPE; + +PREPACK struct htt_t2h_power_state_info { + uint32_t msg_type : 8, /* [7:0] */ + vdev_id : 8, /* [15:8] */ + action_code : 4, /* [19:16] */ + time_type: 2, /* [21:20] */ + rsvd: 10; /* [31:22] */ + uint32_t time_low; + uint32_t time_high; +} POSTPACK; + +#define HTT_T2H_POWER_STATE_INFO_SIZE (sizeof(struct htt_t2h_power_state_info)) + +#define HTT_T2H_POWER_STATE_INFO_HTT_VDEV_ID_M 0x0000FF00 +#define HTT_T2H_POWER_STATE_INFO_HTT_VDEV_ID_S 8 + +#define HTT_T2H_POWER_STATE_INFO_HTT_VDEV_ID_GET(_var) \ + (((_var) & HTT_T2H_POWER_STATE_INFO_HTT_VDEV_ID_M) >> \ + HTT_T2H_POWER_STATE_INFO_HTT_VDEV_ID_S) +#define HTT_T2H_POWER_STATE_INFO_HTT_VDEV_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_T2H_POWER_STATE_INFO_HTT_VDEV_ID, _val); \ + ((_var) |= ((_val) << HTT_T2H_POWER_STATE_INFO_HTT_VDEV_ID_S));\ + } while (0) + +#define HTT_T2H_POWER_STATE_INFO_HTT_ACTION_CODE_M 0x000F0000 +#define HTT_T2H_POWER_STATE_INFO_HTT_ACTION_CODE_S 16 + +#define HTT_T2H_POWER_STATE_INFO_HTT_ACTION_CODE_GET(_var) \ + (((_var) & HTT_T2H_POWER_STATE_INFO_HTT_ACTION_CODE_M) >> \ + HTT_T2H_POWER_STATE_INFO_HTT_ACTION_CODE_S) +#define HTT_T2H_POWER_STATE_INFO_HTT_ACTION_CODE_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_T2H_POWER_STATE_INFO_HTT_ACTION_CODE, _val); \ + ((_var) |= ((_val) << HTT_T2H_POWER_STATE_INFO_HTT_ACTION_CODE_S));\ + } while (0) + +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_TYPE_M 0x00300000 +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_TYPE_S 20 + +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_TYPE_GET(_var) \ + (((_var) & HTT_T2H_POWER_STATE_INFO_HTT_TIME_TYPE_M) >> \ + HTT_T2H_POWER_STATE_INFO_HTT_TIME_TYPE_S) + +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_TYPE_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_T2H_POWER_STATE_INFO_HTT_TIME_TYPE, _val); \ + ((_var) |= ((_val) << HTT_T2H_POWER_STATE_INFO_HTT_TIME_TYPE_S));\ + } while (0) + +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_HIGH_M 0xFFFFFFFF +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_HIGH_S 0 + +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_HIGH_GET(_var) \ + (((_var) & HTT_T2H_POWER_STATE_INFO_HTT_TIME_HIGH_M) >> \ + HTT_T2H_POWER_STATE_INFO_HTT_TIME_HIGH_S) + +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_HIGH_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_T2H_POWER_STATE_INFO_HTT_TIME_HIGH, _val); \ + ((_var) |= ((_val) << HTT_T2H_POWER_STATE_INFO_HTT_TIME_HIGH_S));\ + } while (0) + +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_LOW_M 0xFFFFFFFF +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_LOW_S 0 + +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_LOW_GET(_var) \ + (((_var) & HTT_T2H_POWER_STATE_INFO_HTT_TIME_LOW_M) >> \ + HTT_T2H_POWER_STATE_INFO_HTT_TIME_LOW_S) + +#define HTT_T2H_POWER_STATE_INFO_HTT_TIME_LOW_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_T2H_POWER_STATE_INFO_HTT_TIME_LOW, _val); \ + ((_var) |= ((_val) << HTT_T2H_POWER_STATE_INFO_HTT_TIME_LOW_S));\ + } while (0) + + + #endif diff --git a/drivers/staging/fw-api/fw/htt_ppdu_stats.h b/drivers/staging/fw-api/fw/htt_ppdu_stats.h index d1575d7c91ba..5f7bad98cb84 100644 --- a/drivers/staging/fw-api/fw/htt_ppdu_stats.h +++ b/drivers/staging/fw-api/fw/htt_ppdu_stats.h @@ -707,6 +707,58 @@ typedef enum HTT_PPDU_STATS_SPATIAL_REUSE HTT_PPDU_STATS_SPATIAL_REUSE; (((_val) & HTT_PPDU_STATS_COMMON_TRIG_COOKIE_M) >> \ HTT_PPDU_STATS_COMMON_TRIG_COOKIE_S) +#define HTT_PPDU_STATS_COMMON_TLV_HTT_SEQ_TYPE_M 0x00000001 +#define HTT_PPDU_STATS_COMMON_TLV_HTT_SEQ_TYPE_S 0 + +#define HTT_PPDU_STATS_COMMON_TLV_HTT_SEQ_TYPE_GET(_var) \ + (((_var) & HTT_PPDU_STATS_COMMON_TLV_HTT_SEQ_TYPE_M) >> \ + HTT_PPDU_STATS_COMMON_TLV_HTT_SEQ_TYPE_S) + +#define HTT_PPDU_STATS_COMMON_TLV_HTT_SEQ_TYPE_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_PPDU_STATS_COMMON_TLV_HTT_SEQ_TYPE, _val); \ + ((_var) |= ((_val) << HTT_PPDU_STATS_COMMON_TLV_HTT_SEQ_TYPE_S)); \ + } while (0) + +#define HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BASIC_TRIGGER_M 0x00000002 +#define HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BASIC_TRIGGER_S 1 + +#define HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BASIC_TRIGGER_GET(_var) \ + (((_var) & HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BASIC_TRIGGER_M) >> \ + HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BASIC_TRIGGER_S) + +#define HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BASIC_TRIGGER_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BASIC_TRIGGER, _val); \ + ((_var) |= ((_val) << HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BASIC_TRIGGER_S)); \ + } while (0) + +#define HTT_PPDU_STATS_COMMON_TLV_IS_MANUAL_ULOFDMA_TRIGGER_M 0x00000004 +#define HTT_PPDU_STATS_COMMON_TLV_IS_MANUAL_ULOFDMA_TRIGGER_S 2 + +#define HTT_PPDU_STATS_COMMON_TLV_IS_MANUAL_ULOFDMA_TRIGGER_GET(_var) \ + (((_var) & HTT_PPDU_STATS_COMMON_TLV_IS_MANUAL_ULOFDMA_TRIGGER_M) >> \ + HTT_PPDU_STATS_COMMON_TLV_IS_MANUAL_ULOFDMA_TRIGGER_S) + +#define HTT_PPDU_STATS_COMMON_TLV_IS_MANUAL_ULOFDMA_TRIGGER_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_PPDU_STATS_COMMON_TLV_IS_MANUAL_ULOFDMA_TRIGGER, _val); \ + ((_var) |= ((_val) << HTT_PPDU_STATS_COMMON_TLV_IS_MANUAL_ULOFDMA_TRIGGER_S)); \ + } while (0) + +#define HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BSRP_TRIGGER_M 0x00000008 +#define HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BSRP_TRIGGER_S 3 + +#define HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BSRP_TRIGGER_GET(_var) \ + (((_var) & HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BSRP_TRIGGER_M) >> \ + HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BSRP_TRIGGER_S) + +#define HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BSRP_TRIGGER_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BSRP_TRIGGER, _val); \ + ((_var) |= ((_val) << HTT_PPDU_STATS_COMMON_TLV_IS_COMBINED_UL_BSRP_TRIGGER_S)); \ + } while (0) + enum HTT_SEQ_TYPE { WAL_PPDU_SEQ_TYPE = 0, HTT_PPDU_SEQ_TYPE = 1, @@ -902,26 +954,26 @@ typedef struct { * HTT_PPDU_SEQ_TYPE then decoder should interpret the * seq type as HTT_PPDU_STATS_SEQ_TYPE. * htt_seq_type field will be set to HTT_PPDU_SEQ_TYPE in - * firmware versions where this field is defined. - * BIT [31: 1] - reserved + * BIT [1 : 1] - is_combined_ul_basic_trigger - Flag to indicate if a + * given UL OFDMA/MU-MIMO Basic trigger is sent combined + * as part of existing DL data sequence. + * BIT [2 : 2] - is_manual_ulofdma_trigger - Flag to indicate if a + * given UL OFDMA trigger is manually triggered from the Host. + * BIT [3 : 3] - is_combined_ul_bsrp_trigger - Flag to indicate if a + * given UL BSRP trigger is sent combined as part of + * an existing DL/UL data sequence + * BIT [31: 4] - reserved */ union { A_UINT32 reserved__htt_seq_type; struct { A_UINT32 htt_seq_type: 1, - reserved3: 31; + is_combined_ul_basic_trigger: 1, + is_manual_ulofdma_trigger: 1, + is_combined_ul_bsrp_trigger: 1, + reserved3: 28; }; }; - /* is_manual_ulofdma_trigger: - * Flag to indicate if a given UL OFDMA trigger is manually triggered - * from the Host - */ - A_UINT32 is_manual_ulofdma_trigger; - /* is_combined_ul_bsrp_trigger: - * Flag to indicate if a given UL BSRP trigger is sent combined as - * part of existing DL/UL data sequence - */ - A_UINT32 is_combined_ul_bsrp_trigger; /* Flag to indicate if the channel chosen is 320_1 / 320_2 */ A_UINT32 chan_type_320mhz; } htt_ppdu_stats_common_tlv; diff --git a/drivers/staging/fw-api/fw/htt_stats.h b/drivers/staging/fw-api/fw/htt_stats.h index 5a57e7f9f171..c0730881c023 100644 --- a/drivers/staging/fw-api/fw/htt_stats.h +++ b/drivers/staging/fw-api/fw/htt_stats.h @@ -680,16 +680,18 @@ enum htt_dbg_ext_stats_type { HTT_DBG_ODD_PDEV_BE_TX_MU_OFDMA_STATS = HTT_DBG_EXT_STATS_ODD_PDEV_BE_TX_MU_OFDMA, - /** HTT_DBG_EXT_STATS_ODD_UL_BE_OFDMA + /** HTT_DBG_EXT_STATS_ODD_UL_BE_BN_OFDMA * PARAMS: * - No Params * RESP MSG: * - htt_rx_pdev_be_ul_ofdma_user_stats_tlv */ - HTT_DBG_EXT_STATS_ODD_UL_BE_OFDMA = 60, - /* retain the deprecated name as an alias */ + HTT_DBG_EXT_STATS_ODD_UL_BE_BN_OFDMA = 60, + /* retain deprecated names as aliases */ + HTT_DBG_EXT_STATS_ODD_UL_BE_OFDMA = + HTT_DBG_EXT_STATS_ODD_UL_BE_BN_OFDMA, HTT_DBG_ODD_UL_BE_OFDMA_STATS = - HTT_DBG_EXT_STATS_ODD_UL_BE_OFDMA, + HTT_DBG_EXT_STATS_ODD_UL_BE_BN_OFDMA, /** HTT_DBG_EXT_STATS_ODD_BE_TXBF_OFDMA */ @@ -829,6 +831,22 @@ enum htt_dbg_ext_stats_type { */ HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_ELIGIBLE = 74, + /** HTT_DBG_EXT_STATS_PAPRD_PB + * PARAMS: + * - No Params + * RESP MSG: + * - htt_stats_phy_paprd_pb_tlv + */ + HTT_DBG_EXT_STATS_PAPRD_PB = 75, + + /** HTT_DBG_EXT_STATS_HDS_PROF + * PARAMS: + * - No Params + * RESP MSG: + * - htt_stats_hds_prof_stats_tlv + */ + HTT_DBG_EXT_STATS_HDS_PROF = 76, + /* keep this last */ HTT_DBG_NUM_EXT_STATS = 256, @@ -915,11 +933,14 @@ typedef enum { HTT_TX_RATE_STATS_DEFAULT, /* - * Upload 11be OFDMA TX stats + * Upload 11be and 11bn OFDMA TX stats * * TLV: htt_tx_pdev_rate_stats_be_ofdma_tlv */ - HTT_TX_RATE_STATS_UPLOAD_11BE_OFDMA, + HTT_TX_RATE_STATS_UPLOAD_11BE_11BN_OFDMA, + /* retain prior name as an alias */ + HTT_TX_RATE_STATS_UPLOAD_11BE_OFDMA = + HTT_TX_RATE_STATS_UPLOAD_11BE_11BN_OFDMA, } htt_tx_rate_stats_upload_t; /* htt_rx_ul_trigger_stats_upload_t @@ -934,11 +955,14 @@ typedef enum { HTT_RX_UL_TRIGGER_STATS_UPLOAD_11AX_OFDMA, /* - * Upload 11be UL OFDMA RX Trigger stats + * Upload 11be and 11bn UL OFDMA RX Trigger stats * * TLV: htt_rx_pdev_be_ul_trigger_stats_tlv */ - HTT_RX_UL_TRIGGER_STATS_UPLOAD_11BE_OFDMA, + HTT_RX_UL_TRIGGER_STATS_UPLOAD_11BE_11BN_OFDMA, + /* retain prior name as an alias */ + HTT_RX_UL_TRIGGER_STATS_UPLOAD_11BE_OFDMA = + HTT_RX_UL_TRIGGER_STATS_UPLOAD_11BE_11BN_OFDMA, } htt_rx_ul_trigger_stats_upload_t; /* @@ -1002,7 +1026,12 @@ typedef enum { #define HTT_TX_HWQ_MAX_CMD_STALL_STATS 5 #define HTT_TX_HWQ_MAX_FES_RESULT_STATS 10 #define HTT_PDEV_STATS_PPDU_DUR_HIST_BINS 16 +#define HTT_PDEV_STATS_PPDU_DUR_HIST_EXT_BINS 6 #define HTT_PDEV_STATS_PPDU_DUR_HIST_INTERVAL_US 250 +/* Max seq ctrl can be active in txq at a given instant */ +#define HTT_PDEV_STATS_MAX_SEQ_CTRL_HIST 4 +/* For BE max active seq_ctrl that can be in HWQ */ +#define HTT_PDEV_STATS_MAX_ACTIVE_SEQ_IN_HWQ_HIST 2 typedef enum { HTT_STATS_TX_PDEV_NO_DATA_UNDERRUN = 0, @@ -1053,7 +1082,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** Num PPDUs queued to HW */ A_UINT32 hw_queued; /** Num PPDUs reaped from HW */ @@ -1235,6 +1270,33 @@ typedef struct { /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_pdev_cmn_tlv htt_tx_pdev_stats_cmn_tlv; +typedef struct { + htt_tlv_hdr_t tlv_hdr; + union { + A_UINT32 pdev_id__word; + struct { + A_UINT32 + pdev_id: 8, + reserved: 24; + }; + }; + A_UINT32 pending_seq_on_sched_post_hist[HTT_PDEV_STATS_MAX_SEQ_CTRL_HIST]; +} htt_stats_tx_pdev_pending_seq_cnt_on_sched_post_hist_tlv; + +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_PDEV_ID_M 0x000000ff +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_PDEV_ID_S 0 + +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_PDEV_ID_GET(_var) \ + (((_var) & HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_PDEV_ID_M) >> \ + HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_PDEV_ID_S) + +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_PDEV_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_PDEV_ID, _val); \ + ((_var) |= ((_val) << HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_PDEV_ID_S)); \ + } while (0) + + #define HTT_TX_PDEV_STATS_URRN_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems)) /* NOTE: Variable length TLV, use length spec to infer array size */ typedef struct { @@ -1257,6 +1319,13 @@ typedef struct { /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_pdev_flush_tlv htt_tx_pdev_stats_flush_tlv_v; +#define HTT_TX_PDEV_MDSB_MAX_NUM_USERS 8 +typedef struct { + htt_tlv_hdr_t tlv_hdr; + A_UINT32 pdev_id; + A_UINT32 mdsb_num_users_histogram[HTT_TX_PDEV_MDSB_MAX_NUM_USERS]; +} htt_stats_tx_pdev_mdsb_num_users_histogram_tlv; + #define HTT_TX_PDEV_STATS_MLO_ABORT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems)) /* NOTE: Variable length TLV, use length spec to infer array size */ typedef struct { @@ -1461,6 +1530,7 @@ typedef htt_stats_pdev_ctrl_path_tx_stats_tlv htt_pdev_ctrl_path_tx_stats_tlv_v; * - HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG * - HTT_STATS_PDEV_CTRL_PATH_TX_STATS_TAG * - HTT_STATS_MU_PPDU_DIST_TAG + * - HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_ON_SCHED_POST_HIST_TAG */ /* NOTE: * This structure is for documentation, and cannot be safely used directly. @@ -1478,6 +1548,8 @@ typedef struct _htt_tx_pdev_stats { htt_stats_tx_pdev_tried_mpdu_cnt_hist_tlv tried_mpdu_cnt_hist_tlv; htt_stats_pdev_ctrl_path_tx_stats_tlv ctrl_path_tx_tlv; htt_stats_mu_ppdu_dist_tlv mu_ppdu_dist_tlv; + htt_stats_tx_pdev_pending_seq_cnt_on_sched_post_hist_tlv + pending_seq_cnt_on_sched_post_hist_tlv; } htt_tx_pdev_stats_t; #endif /* ATH_TARGET */ @@ -1521,10 +1593,17 @@ typedef htt_stats_hw_wd_timeout_tlv htt_hw_stats_wd_timeout_tlv; typedef struct { htt_tlv_hdr_t tlv_hdr; - /* BIT [ 7 : 0] :- mac_id + /** + * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; A_UINT32 tx_abort; A_UINT32 tx_abort_fail_count; A_UINT32 rx_abort; @@ -1591,10 +1670,17 @@ typedef htt_stats_hw_pdev_errs_tlv htt_hw_stats_pdev_errs_tlv; typedef struct { htt_tlv_hdr_t tlv_hdr; - /* BIT [ 7 : 0] :- mac_id + /** + * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; A_UINT32 last_unpause_ppdu_id; A_UINT32 hwsch_unpause_wait_tqm_write; A_UINT32 hwsch_dummy_tlv_skipped; @@ -1727,7 +1813,15 @@ typedef struct _htt_msdu_flow_stats_tlv { * BIT [20 : 20] :- drop_rule * BIT [31 : 21] :- reserved */ - A_UINT32 tx_flow_no__tid_num__drop_rule; + union { + struct { + A_UINT32 tx_flow_number : 16; + A_UINT32 tid_num : 4; + A_UINT32 drop_rule : 1; + A_UINT32 reserved : 11; + }; + A_UINT32 tx_flow_no__tid_num__drop_rule; + }; A_UINT32 last_cycle_enqueue_count; A_UINT32 last_cycle_dequeue_count; A_UINT32 last_cycle_drop_count; @@ -1804,13 +1898,26 @@ typedef struct _htt_tx_tid_stats_tlv { * BIT [15 : 0] :- sw_peer_id * BIT [31 : 16] :- tid_num */ - A_UINT32 sw_peer_id__tid_num; + union { + struct { + A_UINT32 sw_peer_id : 16; + A_UINT32 tid_num : 16; + }; + A_UINT32 sw_peer_id__tid_num; + }; /** * BIT [ 7 : 0] :- num_sched_pending * BIT [15 : 8] :- num_ppdu_in_hwq * BIT [31 : 16] :- reserved */ - A_UINT32 num_sched_pending__num_ppdu_in_hwq; + union { + struct { + A_UINT32 num_sched_pending : 8; + A_UINT32 num_ppdu_in_hwq : 8; + A_UINT32 reserved : 16; + }; + A_UINT32 num_sched_pending__num_ppdu_in_hwq; + }; A_UINT32 tid_flags; /** per tid # of hw_queued ppdu */ A_UINT32 hw_queued; @@ -1840,13 +1947,26 @@ typedef struct _htt_tx_tid_stats_v1_tlv { * BIT [15 : 0] :- sw_peer_id * BIT [31 : 16] :- tid_num */ - A_UINT32 sw_peer_id__tid_num; + union { + struct { + A_UINT32 sw_peer_id : 16; + A_UINT32 tid_num : 16; + }; + A_UINT32 sw_peer_id__tid_num; + }; /** * BIT [ 7 : 0] :- num_sched_pending * BIT [15 : 8] :- num_ppdu_in_hwq * BIT [31 : 16] :- reserved */ - A_UINT32 num_sched_pending__num_ppdu_in_hwq; + union { + struct { + A_UINT32 num_sched_pending : 8; + A_UINT32 num_ppdu_in_hwq : 8; + A_UINT32 reserved : 16; + }; + A_UINT32 num_sched_pending__num_ppdu_in_hwq; + }; A_UINT32 tid_flags; /** Max qdepth in bytes reached by this tid */ A_UINT32 max_qdepth_bytes; @@ -1893,6 +2013,8 @@ typedef struct _htt_tx_tid_stats_v1_tlv { */ A_UINT32 head_msdu_tqm_timestamp_us; A_UINT32 head_msdu_tqm_latency_us; + A_UINT32 pause_module_id_ext; + A_UINT32 block_module_id_ext; } htt_stats_tx_tid_details_v1_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_tid_details_v1_tlv htt_tx_tid_stats_v1_tlv; @@ -1929,7 +2051,13 @@ typedef struct _htt_rx_tid_stats_tlv { * BIT [15 : 0] : sw_peer_id * BIT [31 : 16] : tid_num */ - A_UINT32 sw_peer_id__tid_num; + union { + struct { + A_UINT32 sw_peer_id : 16; + A_UINT32 tid_num : 16; + }; + A_UINT32 sw_peer_id__tid_num; + }; /** Stored as little endian */ A_UINT8 tid_name[MAX_HTT_TID_NAME]; /** @@ -1965,9 +2093,9 @@ typedef struct { A_UINT32 mpdu_cnt; /** Number of rx MSDU */ A_UINT32 msdu_cnt; - /** pause bitmap */ + /** lower 32 bits of pause bitmap */ A_UINT32 pause_bitmap; - /** block bitmap */ + /** lower 32 bits of block bitmap */ A_UINT32 block_bitmap; /** current timestamp */ A_UINT32 current_timestamp; @@ -1997,6 +2125,10 @@ typedef struct { A_UINT32 inactive_time; /** Number of MPDUs dropped after max retries */ A_UINT32 remove_mpdus_max_retries; + /** extension with upper 32 bits of pause bitmap */ + A_UINT32 pause_bitmap_ext; + /** extension with upper 32 bits of block bitmap */ + A_UINT32 block_bitmap_ext; } htt_stats_peer_stats_cmn_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_peer_stats_cmn_tlv htt_peer_stats_cmn_tlv; @@ -2016,6 +2148,22 @@ typedef htt_stats_peer_stats_cmn_tlv htt_peer_stats_cmn_tlv; #define HTT_PEER_DETAILS_SRC_INFO_M 0x00000fff #define HTT_PEER_DETAILS_SRC_INFO_S 0 +#define HTT_PEER_DETAILS_PEER_PS_ENTRY_M 0x000000ff +#define HTT_PEER_DETAILS_PEER_PS_ENTRY_S 0 +#define HTT_PEER_DETAILS_PEER_PS_EXIT_M 0x0000ff00 +#define HTT_PEER_DETAILS_PEER_PS_EXIT_S 8 +#define HTT_PEER_DETAILS_PEER_PSPOLL_TRIGGER_M 0x00ff0000 +#define HTT_PEER_DETAILS_PEER_PSPOLL_TRIGGER_S 16 +#define HTT_PEER_DETAILS_PEER_UAPSD_TRIGGER_M 0xff000000 +#define HTT_PEER_DETAILS_PEER_UAPSD_TRIGGER_S 24 + +#define HTT_PEER_DETAILS_PEER_PS_HISTOGRAM_0_M 0x000003ff +#define HTT_PEER_DETAILS_PEER_PS_HISTOGRAM_0_S 0 +#define HTT_PEER_DETAILS_PEER_PS_HISTOGRAM_1_M 0x000ffc00 +#define HTT_PEER_DETAILS_PEER_PS_HISTOGRAM_1_S 10 +#define HTT_PEER_DETAILS_PEER_PS_HISTOGRAM_2_M 0x3ff00000 +#define HTT_PEER_DETAILS_PEER_PS_HISTOGRAM_2_S 20 + #define HTT_PEER_DETAILS_SET(word, httsym, val) \ do { \ @@ -2061,6 +2209,34 @@ typedef struct { rsvd1 : 20; /* [31:12] */ }; }; + + /* Dword 10 */ + union { + A_UINT32 word__peer_ps_entry__peer_ps_exit__peer_pspoll_trigger_received__peer_uapsd_trigger_received; + struct { + A_UINT32 peer_ps_entry : 8, /* [7:0] */ + peer_ps_exit : 8, /* [15:8] */ + peer_pspoll_trigger_received : 8, /* [23:16] */ + peer_uapsd_trigger_received : 8; /* [31:24] */ + }; + }; + + /* Dword 11 */ + union { + A_UINT32 word__peer_ps_histogram_0__peer_ps_histogram_1__peer_ps_histogram_2; + struct { + /* + * This word holds 3 10-bit histograms of power-save durations: + * bits 9:0 - count of durations < 200 ms + * bits 19:10 - count of durations between 200 to 500 ms + * bits 29:20 - count of durations > 500 ms + */ + A_UINT32 peer_ps_histogram_0 : 10, /* [9:0] */ + peer_ps_histogram_1 : 10, /* [19:10] */ + peer_ps_histogram_2 : 10, /* [29:20] */ + rsvd2 : 2; /* [31:30] */ + }; + }; } htt_stats_peer_details_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_peer_details_tlv htt_peer_details_tlv; @@ -2072,6 +2248,21 @@ typedef htt_stats_peer_details_tlv htt_peer_details_tlv; #define HTT_STATS_PEER_DETAILS_SRC_INFO_GET(word) ((word >> 0) & 0xfff) +#define HTT_STATS_PEER_DETAILS_PEER_PS_ENTRY_GET(word) \ + HTT_PEER_DETAILS_GET(word, PEER_PS_ENTRY) +#define HTT_STATS_PEER_DETAILS_PEER_PS_EXIT_GET(word) \ + HTT_PEER_DETAILS_GET(word, PEER_PS_EXIT) +#define HTT_STATS_PEER_DETAILS_PEER_PSPOLL_TRIGGER_GET(word) \ + HTT_PEER_DETAILS_GET(word, PEER_PSPOLL_TRIGGER) +#define HTT_STATS_PEER_DETAILS_PEER_UAPSD_TRIGGER_GET(word) \ + HTT_PEER_DETAILS_GET(word, PEER_UAPSD_TRIGGER) +#define HTT_STATS_PEER_DETAILS_PEER_PS_HISTOGRAM_0_GET(word) \ + HTT_PEER_DETAILS_GET(word, PEER_PS_HISTOGRAM_0) +#define HTT_STATS_PEER_DETAILS_PEER_PS_HISTOGRAM_1_GET(word) \ + HTT_PEER_DETAILS_GET(word, PEER_PS_HISTOGRAM_1) +#define HTT_STATS_PEER_DETAILS_PEER_PS_HISTOGRAM_2_GET(word) \ + HTT_PEER_DETAILS_GET(word, PEER_PS_HISTOGRAM_2) + typedef struct { htt_tlv_hdr_t tlv_hdr; A_UINT32 sw_peer_id; @@ -2208,6 +2399,9 @@ typedef struct _htt_tx_peer_rate_stats_tlv { A_UINT32 tx_bw_320mhz; /* MCS 14,15 */ A_UINT32 tx_mcs_ext_2[HTT_TX_PEER_STATS_NUM_EXTRA2_MCS_COUNTERS]; + A_UINT32 peer_tx_ppdu_cnt; + A_UINT32 peer_tx_mpdu_try_cnt; + A_UINT32 peer_tx_mpdu_success_cnt; } htt_stats_peer_tx_rate_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_peer_tx_rate_stats_tlv htt_tx_peer_rate_stats_tlv; @@ -2292,6 +2486,8 @@ typedef struct _htt_rx_peer_rate_stats_tlv { A_UINT32 rx_bw_320mhz; /* MCS 14,15 */ A_UINT32 rx_mcs_ext_2[HTT_RX_PEER_STATS_NUM_EXTRA2_MCS_COUNTERS]; + A_UINT32 tot_rx_ppdu_bytes; + A_UINT32 rx_mpdu_try_cnt; } htt_stats_peer_rx_rate_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_peer_rx_rate_stats_tlv htt_rx_peer_rate_stats_tlv; @@ -2778,6 +2974,58 @@ typedef struct { typedef htt_stats_tx_hwq_txop_used_cnt_hist_tlv htt_tx_hwq_txop_used_cnt_hist_tlv_v; +typedef struct { + htt_tlv_hdr_t tlv_hdr; + union { + A_UINT32 pdev_id__word; + struct { + A_UINT32 + pdev_id: 8, + reserved: 24; + }; + }; + A_UINT32 active_seq_in_hwq_hist[HTT_PDEV_STATS_MAX_ACTIVE_SEQ_IN_HWQ_HIST]; +} htt_stats_tx_pdev_pending_seq_cnt_in_hwq_hist_tlv; + +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_PDEV_ID_M 0x000000ff +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_PDEV_ID_S 0 + +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_PDEV_ID_GET(_var) \ + (((_var) & HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_PDEV_ID_M) >> \ + HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_PDEV_ID_S) + +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_PDEV_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_PDEV_ID, _val); \ + ((_var) |= ((_val) << HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_PDEV_ID_S)); \ + } while (0) + +typedef struct { + htt_tlv_hdr_t tlv_hdr; + union { + A_UINT32 pdev_id__word; + struct { + A_UINT32 + pdev_id: 8, + reserved: 24; + }; + }; + A_UINT32 active_seq_in_txq_hist[HTT_PDEV_STATS_MAX_SEQ_CTRL_HIST]; +} htt_stats_tx_pdev_pending_seq_cnt_in_txq_hist_tlv; + +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_PDEV_ID_M 0x000000ff +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_PDEV_ID_S 0 + +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_PDEV_ID_GET(_var) \ + (((_var) & HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_PDEV_ID_M) >> \ + HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_PDEV_ID_S) + +#define HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_PDEV_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_PDEV_ID, _val); \ + ((_var) |= ((_val) << HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_PDEV_ID_S)); \ + } while (0) + /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_HWQ * TLV_TAGS: * - HTT_STATS_STRING_TAG @@ -2788,6 +3036,8 @@ typedef htt_stats_tx_hwq_txop_used_cnt_hist_tlv * - HTT_STATS_TX_HWQ_FES_STATUS_TAG * - HTT_STATS_TX_HWQ_TRIED_MPDU_CNT_HIST_TAG * - HTT_STATS_TX_HWQ_TXOP_USED_CNT_HIST_TAG + * - HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_HWQ_HIST_TAG + * - HTT_STATS_TX_PDEV_PENDING_SEQ_CNT_IN_TXQ_HIST_TAG */ /* NOTE: * This structure is for documentation, and cannot be safely used directly. @@ -2808,6 +3058,10 @@ typedef struct _htt_tx_hwq_stats { htt_stats_tx_hwq_fes_status_tlv fes_stats_tlv; htt_stats_tx_hwq_tried_mpdu_cnt_hist_tlv tried_mpdu_tlv; htt_stats_tx_hwq_txop_used_cnt_hist_tlv txop_used_tlv; + htt_stats_tx_pdev_pending_seq_cnt_in_hwq_hist_tlv + active_pending_seq_cnt_in_hwq_hist_tlv; + htt_stats_tx_pdev_pending_seq_cnt_in_txq_hist_tlv + active_pending_seq_cnt_in_txq_hist_tlv; } htt_tx_hwq_stats_t; #endif /* ATH_TARGET */ @@ -2897,14 +3151,34 @@ typedef enum { #define HTT_MAX_NUM_SBT_INTR 4 +typedef enum { + HTT_RU_ALLOC_MODE_PF, + HTT_RU_ALLOC_MODE_QOS, + HTT_RU_ALLOC_MODE_STATIC, + HTT_RU_ALLOC_MODE_EQUAL, + HTT_RU_ALLOC_MODE_SIMPLIFIED, + + /* Reserving additional modes for future use */ + HTT_RU_ALLOC_MODE_RESERVED_1, + HTT_RU_ALLOC_MODE_RESERVED_2, + + HTT_RU_ALLOC_NUM_MODES +} HTT_RU_ALLOC_MODE; + typedef struct { htt_tlv_hdr_t tlv_hdr; - /* + /** * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** BAR sent out for SU transmission */ A_UINT32 su_bar; /** SW generated RTS frame sent */ @@ -2962,6 +3236,7 @@ typedef struct { * (Smart basic triggers are only used with intervals <= 40 ms.) */ A_UINT32 smart_basic_trig_sch_histogram[HTT_MAX_NUM_SBT_INTR]; + A_UINT32 ru_alloc_mode_cnt[HTT_RU_ALLOC_NUM_MODES]; } htt_stats_tx_selfgen_cmn_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_selfgen_cmn_stats_tlv htt_tx_selfgen_cmn_stats_tlv; @@ -3073,6 +3348,22 @@ typedef struct { A_UINT32 ax_mu_bar_trigger_per_ac[HTT_NUM_AC_WMM]; /** 11AX HE MU-BAR Trigger frames per AC completed with error(s) */ A_UINT32 ax_mu_bar_trigger_errors_per_ac[HTT_NUM_AC_WMM]; + /** 11AX HE MU Combined UL OFDMA Basic Trigger frame sent over the air */ + A_UINT32 combined_ax_ulofdma_trigger_tried[HTT_NUM_AC_WMM]; + /** 11AX HE MU Combined UL OFDMA Basic Trigger completed with error(s) */ + A_UINT32 combined_ax_ulofdma_trigger_err[HTT_NUM_AC_WMM]; + /** 11AX HE MU Standalone UL OFDMA Basic Trigger frame sent over the air */ + A_UINT32 standalone_ax_ulofdma_trigger_tried[HTT_NUM_AC_WMM]; + /** 11AX HE MU Standalone UL OFDMA Basic Trigger completed with error(s) */ + A_UINT32 standalone_ax_ulofdma_trigger_err[HTT_NUM_AC_WMM]; + /** 11AX HE MU Combined UL MU-MIMO Basic Trigger frame sent over the air */ + A_UINT32 combined_ax_ulmumimo_trigger_tried[HTT_NUM_AC_WMM]; + /** 11AX HE MU Combined UL MU-MIMO Basic Trigger completed with error(s) */ + A_UINT32 combined_ax_ulmumimo_trigger_err[HTT_NUM_AC_WMM]; + /** 11AX HE MU Standalone UL MU-MIMO Basic Trigger frame sent over the air*/ + A_UINT32 standalone_ax_ulmumimo_trigger_tried[HTT_NUM_AC_WMM]; + /** 11AX HE MU Standalone UL MU-MIMO Basic Trigger completed with error(s)*/ + A_UINT32 standalone_ax_ulmumimo_trigger_err[HTT_NUM_AC_WMM]; } htt_stats_tx_selfgen_ax_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_selfgen_ax_stats_tlv htt_tx_selfgen_ax_stats_tlv; @@ -3138,10 +3429,55 @@ typedef struct { A_UINT32 be_mu_bar_trigger_per_ac[HTT_NUM_AC_WMM]; /** 11BE EHT MU-BAR Trigger frames per AC completed with error(s) */ A_UINT32 be_mu_bar_trigger_errors_per_ac[HTT_NUM_AC_WMM]; + /** 11BE EHT MU Combined UL OFDMA Basic Trigger frame sent over the air */ + A_UINT32 combined_be_ulofdma_trigger_tried[HTT_NUM_AC_WMM]; + /** 11BE EHT MU Combined UL OFDMA Basic Trigger completed with error(s) */ + A_UINT32 combined_be_ulofdma_trigger_err[HTT_NUM_AC_WMM]; + /** 11BE EHT MU Standalone UL OFDMA Basic Trigger frame sent over the air */ + A_UINT32 standalone_be_ulofdma_trigger_tried[HTT_NUM_AC_WMM]; + /** 11BE EHT MU Standalone UL OFDMA Basic Trigger completed with error(s) */ + A_UINT32 standalone_be_ulofdma_trigger_err[HTT_NUM_AC_WMM]; + /** 11BE EHT MU Combined UL MU-MIMO Basic Trigger frame sent over the air */ + A_UINT32 combined_be_ulmumimo_trigger_tried[HTT_NUM_AC_WMM]; + /** 11BE EHT MU Combined UL MU-MIMO Basic Trigger completed with error(s) */ + A_UINT32 combined_be_ulmumimo_trigger_err[HTT_NUM_AC_WMM]; + /** 11BE EHT MU Standalone UL MU-MIMO Basic Trigger frame sent over the air */ + A_UINT32 standalone_be_ulmumimo_trigger_tried[HTT_NUM_AC_WMM]; + /** 11BE EHT MU Standalone UL MU-MIMO Basic Trigger completed with error(s) */ + A_UINT32 standalone_be_ulmumimo_trigger_err[HTT_NUM_AC_WMM]; } htt_stats_tx_selfgen_be_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_selfgen_be_stats_tlv htt_tx_selfgen_be_stats_tlv; +typedef struct { + htt_tlv_hdr_t tlv_hdr; + /** 11bn UHR MU Basic Trigger frame sent over the air */ + A_UINT32 bn_basic_trigger; + /** 11bn UHR MU BSRP Trigger frame sent over the air */ + A_UINT32 bn_bsr_trigger; + /** 11bn UHR MU BAR Trigger frame sent over the air */ + A_UINT32 bn_mu_bar_trigger; + /** 11bn UHR MU RTS Trigger frame sent over the air */ + A_UINT32 bn_mu_rts_trigger; + + /** 11BN UHR MU Combined Freq. BSRP Trigger frame sent over the air */ + A_UINT32 combined_bn_bsr_trigger_tried[HTT_NUM_AC_WMM]; + /** 11BN UHR MU Combined Freq. BSRP Trigger completed with error(s) */ + A_UINT32 combined_bn_bsr_trigger_err[HTT_NUM_AC_WMM]; + /** 11BN UHR MU Standalone Freq. BSRP Trigger frame sent over the air */ + A_UINT32 standalone_bn_bsr_trigger_tried[HTT_NUM_AC_WMM]; + /** 11BN UHR MU Standalone Freq. BSRP Trigger completed with error(s) */ + A_UINT32 standalone_bn_bsr_trigger_err[HTT_NUM_AC_WMM]; + /** 11BN UHR Manual Single-User UL OFDMA Trigger frame sent over the air */ + A_UINT32 manual_bn_su_ulofdma_basic_trigger[HTT_NUM_AC_WMM]; + /** 11BN UHR Manual Single-User UL OFDMA Trigger completed with error(s) */ + A_UINT32 manual_bn_su_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM]; + /** 11BN UHR Manual Multi-User UL OFDMA Trigger frame sent over the air */ + A_UINT32 manual_bn_mu_ulofdma_basic_trigger[HTT_NUM_AC_WMM]; + /** 11BN UHR Manual Multi-User UL OFDMA Trigger completed with error(s) */ + A_UINT32 manual_bn_mu_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM]; +} htt_stats_tx_selfgen_bn_tlv; + typedef struct { /* DEPRECATED */ htt_tlv_hdr_t tlv_hdr; /** 11AX HE OFDMA NDPA frame queued to the HW */ @@ -3723,6 +4059,29 @@ typedef struct { /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_selfgen_be_err_stats_tlv htt_tx_selfgen_be_err_stats_tlv; +typedef struct { + htt_tlv_hdr_t tlv_hdr; + /** 11BN UHR MU Basic Trigger frame completed with error(s) */ + A_UINT32 bn_basic_trigger_err; + /** 11BN UHR MU BSRP Trigger frame completed with error(s) */ + A_UINT32 bn_bsr_trigger_err; + /** 11BN UHR MU BAR Trigger frame completed with error(s) */ + A_UINT32 bn_mu_bar_trigger_err; + /** 11BN UHR MU RTS Trigger frame completed with error(s) */ + A_UINT32 bn_mu_rts_trigger_err; + + /** 11BN UHR MU OFDMA Basic Trigger frame completed with partial user response */ + A_UINT32 bn_basic_trigger_partial_resp; + /** 11BN UHR MU BSRP Trigger frame completed with partial user response */ + A_UINT32 bn_bsr_trigger_partial_resp; + /** 11BN UHR MU BAR Trigger frame completed with partial user response */ + A_UINT32 bn_mu_bar_trigger_partial_resp; + /** 11BN UHR MU RTS Trigger frame blocked due to partner link TX/RX(eMLSR) */ + A_UINT32 bn_mu_rts_trigger_blocked; + /** 11BN UHR MU BSR Trigger frame blocked due to partner link TX/RX(eMLSR) */ + A_UINT32 bn_bsr_trigger_blocked; +} htt_stats_tx_selfgen_bn_err_tlv; + /* * Scheduler completion status reason code. * (0) HTT_TXERR_NONE - No error (Success). @@ -3854,6 +4213,19 @@ typedef struct { typedef htt_stats_tx_selfgen_be_sched_status_stats_tlv htt_tx_selfgen_be_sched_status_stats_tlv; +typedef struct { + htt_tlv_hdr_t tlv_hdr; + /** 11BN UHR MU BAR scheduler completion status reason code */ + A_UINT32 bn_mu_bar_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS]; + /** 11BN UHR MU BAR scheduler error code */ + A_UINT32 bn_mu_bar_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS]; + + /** 11BN UHR UL OFDMA Basic Trigger scheduler completion status reason code */ + A_UINT32 bn_basic_trig_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS]; + /** 11BN UHR UL OFDMA Basic Trigger scheduler error code */ + A_UINT32 bn_basic_trig_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS]; +} htt_stats_tx_selfgen_bn_sched_status_tlv; + /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SELFGEN_INFO * TLV_TAGS: * - HTT_STATS_TX_SELFGEN_CMN_STATS_TAG @@ -3866,6 +4238,9 @@ typedef htt_stats_tx_selfgen_be_sched_status_stats_tlv * - HTT_STATS_TX_SELFGEN_BE_STATS_TAG * - HTT_STATS_TX_SELFGEN_BE_ERR_STATS_TAG * - HTT_STATS_TX_SELFGEN_BE_SCHED_STATUS_STATS_TAG + * - HTT_STATS_TX_SELFGEN_BN_TAG + * - HTT_STATS_TX_SELFGEN_BN_ERR_TAG + * - HTT_STATS_TX_SELFGEN_BN_SCHED_STATUS_TAG */ /* NOTE: * This structure is for documentation, and cannot be safely used directly. @@ -3883,6 +4258,9 @@ typedef struct { htt_stats_tx_selfgen_be_stats_tlv be_tlv; htt_stats_tx_selfgen_be_err_stats_tlv be_err_tlv; htt_stats_tx_selfgen_be_sched_status_stats_tlv be_sched_status_tlv; + htt_stats_tx_selfgen_bn_tlv bn_tlv; + htt_stats_tx_selfgen_bn_err_tlv bn_err_tlv; + htt_stats_tx_selfgen_bn_sched_status_tlv bn_sched_status_tlv; } htt_tx_pdev_selfgen_stats_t; #endif /* ATH_TARGET */ @@ -4202,8 +4580,8 @@ typedef struct { /* NOTE: Variable length TLV, use length spec to infer array size */ typedef struct { htt_tlv_hdr_t tlv_hdr; - /** Scheduler command posted per tx_mode */ - A_UINT32 sched_cmd_posted[1/* length = num tx modes */]; + /** Scheduler command posted per tx_mode (length = num tx modes) */ + HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, sched_cmd_posted); } htt_stats_sched_txq_cmd_posted_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_sched_txq_cmd_posted_tlv htt_sched_txq_cmd_posted_tlv_v; @@ -4213,8 +4591,8 @@ typedef htt_stats_sched_txq_cmd_posted_tlv htt_sched_txq_cmd_posted_tlv_v; /* NOTE: Variable length TLV, use length spec to infer array size */ typedef struct { htt_tlv_hdr_t tlv_hdr; - /** Scheduler command reaped per tx_mode */ - A_UINT32 sched_cmd_reaped[1/* length = num tx modes */]; + /** Scheduler command reaped per tx_mode (length = num tx modes) */ + HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, sched_cmd_reaped); } htt_stats_sched_txq_cmd_reaped_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_sched_txq_cmd_reaped_tlv htt_sched_txq_cmd_reaped_tlv_v; @@ -4333,12 +4711,50 @@ typedef struct { * These supercycle trigger counts are not automatically reset, but * are reset upon request. */ - A_UINT32 supercycle_triggers[1/*HTT_SCHED_SUPERCYCLE_TRIGGER_MAX*/]; + HTT_STATS_VAR_LEN_ARRAY1(A_UINT32, supercycle_triggers); } htt_stats_sched_txq_supercycle_trigger_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_sched_txq_supercycle_trigger_tlv htt_sched_txq_supercycle_triggers_tlv_v; +typedef struct { + htt_tlv_hdr_t tlv_hdr; + union { + A_UINT32 pdev_id__word; + struct { + A_UINT32 + pdev_id: 8, + reserved: 24; + }; + }; + A_UINT32 ist_txop_end_indicated_cnt; + A_UINT32 ist_txop_end_notify_at_cmd_status_end; + A_UINT32 ist_txop_end_notify_at_isr_end; + A_UINT32 sched_cmd_post_skip_on_seq_unavail; + A_UINT32 ist_txop_end_skip_on_seq_unavail; + A_UINT32 ist_txop_end_skip_on_mpdu_ownership; + A_UINT32 skip_early_schedule_due_to_per; + A_UINT32 sched_cmd_posted_at_hw_txop_end; + A_UINT32 sched_cmd_missed_at_hw_txop_end; + A_UINT32 sched_cmd_posted_at_sched_cmd_compl; + A_UINT32 sched_cmd_missed_at_sched_cmd_compl; + A_UINT32 num_QoS_sched_runs; +} htt_stats_sched_txq_early_compl_tlv; + +#define HTT_STATS_SCHED_TXQ_EARLY_COMPL_PDEV_ID_M 0x000000ff +#define HTT_STATS_SCHED_TXQ_EARLY_COMPL_PDEV_ID_S 0 + +#define HTT_STATS_SCHED_TXQ_EARLY_COMPL_PDEV_ID_GET(_var) \ + (((_var) & HTT_STATS_SCHED_TXQ_EARLY_COMPL_PDEV_ID_M) >> \ + HTT_STATS_SCHED_TXQ_EARLY_COMPL_PDEV_ID_S) + +#define HTT_STATS_SCHED_TXQ_EARLY_COMPL_PDEV_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_SCHED_TXQ_EARLY_COMPL_PDEV_ID, _val); \ + ((_var) |= ((_val) << HTT_STATS_SCHED_TXQ_EARLY_COMPL_PDEV_ID_S)); \ + } while (0) + + #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M 0x000000ff #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S 0 @@ -4458,7 +4874,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** Current timestamp */ A_UINT32 current_timestamp; } htt_stats_tx_sched_cmn_tlv; @@ -4472,22 +4894,27 @@ typedef struct { * - HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG * - HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG * - HTT_STATS_SCHED_TXQ_SUPERCYCLE_TRIGGER_TAG + * - HTT_STATS_SCHED_TXQ_EARLY_COMPL_TAG */ /* NOTE: * This structure is for documentation, and cannot be safely used directly. * Instead, use the constituent TLV structures to fill/parse. */ +#ifdef ATH_TARGET typedef struct { htt_stats_tx_sched_cmn_tlv cmn_tlv; struct { - htt_stats_tx_pdev_scheduler_txq_stats_tlv txq_tlv; - htt_stats_sched_txq_cmd_posted_tlv cmd_posted_tlv; - htt_stats_sched_txq_cmd_reaped_tlv cmd_reaped_tlv; + htt_stats_tx_pdev_scheduler_txq_stats_tlv txq_tlv; + htt_stats_sched_txq_cmd_posted_tlv cmd_posted_tlv; + htt_stats_sched_txq_cmd_reaped_tlv cmd_reaped_tlv; htt_stats_sched_txq_sched_order_su_tlv sched_order_su_tlv; htt_stats_sched_txq_sched_ineligibility_tlv sched_ineligibility_tlv; - htt_stats_sched_txq_supercycle_trigger_tlv htt_sched_txq_sched_ineligibility_tlv_esched_supercycle_trigger_tlv; + htt_stats_sched_txq_supercycle_trigger_tlv + htt_sched_txq_sched_ineligibility_tlv_esched_supercycle_trigger_tlv; + htt_stats_sched_txq_early_compl_tlv early_compl_tlv; } txq[1]; } htt_stats_tx_sched_t; +#endif /* == TQM STATS == */ @@ -4603,7 +5030,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; A_UINT32 max_cmdq_id; A_UINT32 list_mpdu_cnt_hist_intvl; @@ -4719,7 +5152,14 @@ typedef struct { * BIT [15 : 8] :- cmdq_id * BIT [31 : 16] :- reserved */ - A_UINT32 mac_id__cmdq_id__word; + union { + struct { + A_UINT32 mac_id : 8; + A_UINT32 cmdq_id : 8; + A_UINT32 reserved : 16; + }; + A_UINT32 mac_id__cmdq_id__word; + }; A_UINT32 sync_cmd; A_UINT32 write_cmd; A_UINT32 gen_mpdu_cmd; @@ -4955,7 +5395,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /* Global Stats */ A_UINT32 tcl2fw_entry_count; @@ -5163,23 +5609,47 @@ typedef struct { * BIT [15 : 0] :- num_elems * BIT [31 : 16] :- prefetch_tail_idx */ - A_UINT32 num_elems__prefetch_tail_idx; + union { + struct { + A_UINT32 num_elems : 16; + A_UINT32 prefetch_tail_idx : 16; + }; + A_UINT32 num_elems__prefetch_tail_idx; + }; /** * BIT [15 : 0] :- head_idx * BIT [31 : 16] :- tail_idx */ - A_UINT32 head_idx__tail_idx; + union { + struct { + A_UINT32 head_idx : 16; + A_UINT32 tail_idx : 16; + }; + A_UINT32 head_idx__tail_idx; + }; /** * BIT [15 : 0] :- shadow_head_idx * BIT [31 : 16] :- shadow_tail_idx */ - A_UINT32 shadow_head_idx__shadow_tail_idx; + union { + struct { + A_UINT32 shadow_head_idx : 16; + A_UINT32 shadow_tail_idx : 16; + }; + A_UINT32 shadow_head_idx__shadow_tail_idx; + }; A_UINT32 num_tail_incr; /** * BIT [15 : 0] :- lwm_thresh * BIT [31 : 16] :- hwm_thresh */ - A_UINT32 lwm_thresh__hwm_thresh; + union { + struct { + A_UINT32 lwm_thresh : 16; + A_UINT32 hwm_thresh : 16; + }; + A_UINT32 lwm_thresh__hwm_thresh; + }; A_UINT32 overrun_hit_count; A_UINT32 underrun_hit_count; A_UINT32 prod_blockwait_count; @@ -5210,7 +5680,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; A_UINT32 num_records; } htt_stats_ring_if_cmn_tlv; /* preserve old name alias for new name consistent with the tag name */ @@ -5290,7 +5766,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** * Indicates the total number of 128 byte buffers in the CMEM * that are available for buffer sharing @@ -5504,7 +5986,16 @@ typedef struct { * BIT [24 : 24] :- EP 0 -consumer, 1 - producer * BIT [31 : 25] :- reserved */ - A_UINT32 mac_id__ring_id__arena__ep; + union { + struct { + A_UINT32 mac_id : 8; + A_UINT32 ring_id : 8; + A_UINT32 arena : 8; + A_UINT32 ep : 1; + A_UINT32 reserved : 7; + }; + A_UINT32 mac_id__ring_id__arena__ep; + }; /** DWORD aligned base memory address of the ring */ A_UINT32 base_addr_lsb; A_UINT32 base_addr_msb; @@ -5518,25 +6009,49 @@ typedef struct { * BIT [15 : 0] :- num_avail_words * BIT [31 : 16] :- num_valid_words */ - A_UINT32 num_avail_words__num_valid_words; + union { + struct { + A_UINT32 num_avail_words : 16; + A_UINT32 num_valid_words : 16; + }; + A_UINT32 num_avail_words__num_valid_words; + }; /** Index of head and tail * BIT [15 : 0] :- head_ptr * BIT [31 : 16] :- tail_ptr */ - A_UINT32 head_ptr__tail_ptr; + union { + struct { + A_UINT32 head_ptr : 16; + A_UINT32 tail_ptr : 16; + }; + A_UINT32 head_ptr__tail_ptr; + }; /** Empty or full counter of rings * BIT [15 : 0] :- consumer_empty * BIT [31 : 16] :- producer_full */ - A_UINT32 consumer_empty__producer_full; + union { + struct { + A_UINT32 consumer_empty : 16; + A_UINT32 producer_full : 16; + }; + A_UINT32 consumer_empty__producer_full; + }; /** Prefetch status of consumer ring * BIT [15 : 0] :- prefetch_count * BIT [31 : 16] :- internal_tail_ptr */ - A_UINT32 prefetch_count__internal_tail_ptr; + union { + struct { + A_UINT32 prefetch_count : 16; + A_UINT32 internal_tail_ptr : 16; + }; + A_UINT32 prefetch_count__internal_tail_ptr; + }; } htt_stats_sring_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_sring_stats_tlv htt_sring_stats_tlv; @@ -5627,9 +6142,13 @@ typedef enum { /* 11be related updates */ #define HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS 16 /* 0...13,-2,-1 */ #define HTT_TX_PDEV_STATS_NUM_BE_BW_COUNTERS 5 /* 20,40,80,160,320 MHz */ +/* 11bn MCS counters: all BE MCS indices and 4 UHR iMCS */ +#define HTT_TX_PDEV_STATS_NUM_BN_MCS_COUNTERS 20 +#define HTT_TX_PDEV_STATS_NUM_BN_BW_COUNTERS 5 /* 20,40,80,160,320 MHz */ #define HTT_TX_PDEV_STATS_NUM_HE_SIG_B_MCS_COUNTERS 6 #define HTT_TX_PDEV_STATS_NUM_EHT_SIG_MCS_COUNTERS 4 +#define HTT_TX_PDEV_STATS_NUM_UHR_SIG_MCS_COUNTERS 4 typedef enum { HTT_TX_PDEV_STATS_AX_RU_SIZE_26, @@ -5662,6 +6181,9 @@ typedef enum { HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS, } HTT_TX_PDEV_STATS_BE_RU_SIZE; +#define HTT_TX_PDEV_STATS_NUM_BN_RU_SIZE_COUNTERS \ + HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS + typedef struct { htt_tlv_hdr_t tlv_hdr; @@ -5669,7 +6191,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** Number of tx ldpc packets */ A_UINT32 tx_ldpc; /** Number of tx rts packets */ @@ -5884,7 +6412,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** 11BE EHT DL MU OFDMA LDPC count */ A_UINT32 be_ofdma_tx_ldpc; @@ -5902,10 +6436,32 @@ typedef struct { A_UINT32 be_ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS]; /** 11BE EHT DL MU OFDMA EHT-SIG MCS stats */ A_UINT32 be_ofdma_eht_sig_mcs[HTT_TX_PDEV_STATS_NUM_EHT_SIG_MCS_COUNTERS]; + /** 11BE UHT DL MU OFDMA BA RU size stats */ A_UINT32 be_ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS]; -} htt_stats_tx_pdev_rate_stats_be_ofdma_tlv; -/* preserve old name alias for new name consistent with the tag name */ -typedef htt_stats_tx_pdev_rate_stats_be_ofdma_tlv + + /** 11BN UHR DL MU OFDMA LDPC count */ + A_UINT32 bn_ofdma_tx_ldpc; + /** 11BE UHR DL MU OFDMA TX MCS stats */ + A_UINT32 bn_ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_BN_MCS_COUNTERS]; + /** + * 11BN UHR DL MU OFDMA TX NSS stats (Indicates NSS for individual users) + */ + A_UINT32 bn_ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS]; + /** 11BN UHR DL MU OFDMA TX BW stats */ + A_UINT32 bn_ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BN_BW_COUNTERS]; + /** 11BN UHR DL MU OFDMA TX guard interval stats */ + A_UINT32 bn_ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_BN_MCS_COUNTERS]; + /** 11BN UHR DL MU OFDMA TX RU Size stats */ + A_UINT32 bn_ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_BN_RU_SIZE_COUNTERS]; + /** 11BN UHR DL MU OFDMA UHR-SIG MCS stats */ + A_UINT32 bn_ofdma_uhr_sig_mcs[HTT_TX_PDEV_STATS_NUM_UHR_SIG_MCS_COUNTERS]; + /** 11BN UHR DL MU OFDMA BA RU size stats */ + A_UINT32 bn_ofdma_ba_ru_size[HTT_TX_PDEV_STATS_NUM_BN_RU_SIZE_COUNTERS]; +} htt_stats_tx_pdev_rate_be_bn_ofdma_tlv; +/* preserve old names as aliases */ +typedef htt_stats_tx_pdev_rate_be_bn_ofdma_tlv + htt_stats_tx_pdev_rate_stats_be_ofdma_tlv; +typedef htt_stats_tx_pdev_rate_be_bn_ofdma_tlv htt_tx_pdev_rate_stats_be_ofdma_tlv; typedef struct { @@ -5913,6 +6469,8 @@ typedef struct { /** tx_ppdu_dur_hist: * Tx PPDU duration histogram, which holds the tx duration of PPDUs * under histogram bins of interval 250us + * + * Note that this histogram is extended by tx_ppdu_dur_hist_ext[] below. */ A_UINT32 tx_ppdu_dur_hist[HTT_PDEV_STATS_PPDU_DUR_HIST_BINS]; A_UINT32 tx_success_time_us_low; @@ -5926,6 +6484,11 @@ typedef struct { * OFDMA PPDUs under histogram bins of interval 250us */ A_UINT32 tx_ofdma_ppdu_dur_hist[HTT_PDEV_STATS_PPDU_DUR_HIST_BINS]; + /* tx_ppdu_dur_hist_ext: + * This array extends the PPDU duration histogram contained in the + * tx_ppdu_dur_hist[] array from 4 ms to 5.5 ms. + */ + A_UINT32 tx_ppdu_dur_hist_ext[HTT_PDEV_STATS_PPDU_DUR_HIST_EXT_BINS]; } htt_stats_tx_pdev_ppdu_dur_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_tx_pdev_ppdu_dur_tlv htt_tx_pdev_ppdu_dur_stats_tlv; @@ -5969,6 +6532,9 @@ typedef struct { #define HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS 16 #define HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS 16 /* 0-13, -2, -1 */ #define HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS 5 /* 20,40,80,160,320 MHz */ +/* 802.11BN MCS: all 16 EHT MCS indices and 4 UHR iMCS */ +#define HTT_RX_PDEV_STATS_NUM_BN_MCS_COUNTERS 20 +#define HTT_RX_PDEV_STATS_NUM_BN_BW_COUNTERS 5 /* 20,40,80,160,320 MHz */ /* HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS: * RU size index 0: HTT_UL_OFDMA_V0_RU_SIZE_RU_26 @@ -6010,6 +6576,9 @@ typedef enum { HTT_RX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS, } HTT_RX_PDEV_STATS_BE_RU_SIZE; +#define HTT_RX_PDEV_STATS_NUM_BN_RU_SIZE_COUNTERS \ + HTT_RX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS + #define HTT_RX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff #define HTT_RX_PDEV_RATE_STATS_MAC_ID_S 0 @@ -6042,7 +6611,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; A_UINT32 nsts; /** Number of rx ldpc packets */ @@ -6307,7 +6882,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; A_UINT32 rx_11ax_ul_ofdma; @@ -6381,7 +6962,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; A_UINT32 rx_11be_ul_ofdma; @@ -6438,14 +7025,59 @@ typedef struct { A_UINT32 ul_mlo_proc_qdepth_params_count; A_UINT32 ul_mlo_proc_accepted_qdepth_params_count; A_UINT32 ul_mlo_proc_discarded_qdepth_params_count; -} htt_stats_rx_pdev_be_ul_trig_stats_tlv; -/* preserve old name alias for new name consistent with the tag name */ -typedef htt_stats_rx_pdev_be_ul_trig_stats_tlv + + A_UINT32 rx_11bn_ul_ofdma; + + A_UINT32 bn_ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_BN_MCS_COUNTERS]; + A_UINT32 bn_ul_ofdma_rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_BN_MCS_COUNTERS]; + A_UINT32 bn_ul_ofdma_rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS]; + A_UINT32 bn_ul_ofdma_rx_bw[HTT_RX_PDEV_STATS_NUM_BN_BW_COUNTERS]; + A_UINT32 bn_ul_ofdma_rx_stbc; + A_UINT32 bn_ul_ofdma_rx_ldpc; + + /* + * These are arrays to hold the number of PPDUs that we received per RU. + * E.g. PPDUs (data or non data) received in RU26 will be incremented in + * array offset 0 and similarly RU52 will be incremented in array offset 1 + */ + /** PPDU level */ + A_UINT32 bn_rx_ulofdma_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_BN_RU_SIZE_COUNTERS]; + /** PPDU level */ + A_UINT32 bn_rx_ulofdma_non_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_BN_RU_SIZE_COUNTERS]; + + /** + * STA AID array for identifying which STA the + * Target-RSSI / FD-RSSI / pwr headroom stats are for + */ + A_UINT32 bn_uplink_sta_aid[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK]; + /** + * Trig Target RSSI for STA AID in same index - UNIT(dBm) + */ + A_INT32 bn_uplink_sta_target_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK]; + /** + * Trig FD RSSI from STA AID in same index - UNIT(dBm) + */ + A_INT32 bn_uplink_sta_fd_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK]; + /** + * Trig power headroom for STA AID in same idx - UNIT(dB) + */ + A_UINT32 bn_uplink_sta_power_headroom[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK]; + + /* + * Number of UHR UL OFDMA per-user responses containing only a QoS null in + * response to basic trigger. Typically a data response is expected. + */ + A_UINT32 bn_ul_ofdma_basic_trigger_rx_qos_null_only; +} htt_stats_rx_pdev_be_bn_ul_trig_tlv; +/* preserve old names as aliases */ +typedef htt_stats_rx_pdev_be_bn_ul_trig_tlv + htt_stats_rx_pdev_be_ul_trig_stats_tlv; +typedef htt_stats_rx_pdev_be_bn_ul_trig_tlv htt_rx_pdev_be_ul_trigger_stats_tlv; /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_TRIG_STATS * TLV_TAGS: - * - HTT_STATS_RX_PDEV_BE_UL_TRIG_STATS_TAG + * - HTT_STATS_RX_PDEV_BE_BN_UL_TRIG_TAG * NOTE: * This structure is for documentation, and cannot be safely used directly. * Instead, use the constituent TLV structures to fill/parse. @@ -6494,6 +7126,22 @@ typedef struct { typedef htt_stats_rx_pdev_be_ul_ofdma_user_stats_tlv htt_rx_pdev_be_ul_ofdma_user_stats_tlv; +typedef struct { + htt_tlv_hdr_t tlv_hdr; + + A_UINT32 user_index; + /** PPDU level */ + A_UINT32 bn_rx_ulofdma_non_data_ppdu; + /** PPDU level */ + A_UINT32 bn_rx_ulofdma_data_ppdu; + /** MPDU level */ + A_UINT32 bn_rx_ulofdma_mpdu_ok; + /** MPDU level */ + A_UINT32 bn_rx_ulofdma_mpdu_fail; + A_UINT32 bn_rx_ulofdma_non_data_nusers; + A_UINT32 bn_rx_ulofdma_data_nusers; +} htt_stats_rx_pdev_bn_ul_ofdma_user_tlv; + typedef struct { htt_tlv_hdr_t tlv_hdr; @@ -6534,12 +7182,18 @@ typedef struct { htt_tlv_hdr_t tlv_hdr; /** - * BIT [7:0] :- mac_id - * BIT [31:8] :- reserved + * BIT [ 7 : 0] :- mac_id + * BIT [31 : 8] :- reserved * * Refer to HTT_STATS_CMN_MAC_ID_GET/SET macros. */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** Number of times UL MUMIMO RX packets received */ A_UINT32 rx_11ax_ul_mumimo; @@ -6593,12 +7247,18 @@ typedef struct { htt_tlv_hdr_t tlv_hdr; /** - * BIT [7:0] :- mac_id - * BIT [31:8] :- reserved + * BIT [ 7 : 0] :- mac_id + * BIT [31 : 8] :- reserved * * Refer to HTT_STATS_CMN_MAC_ID_GET/SET macros. */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** Number of times UL MUMIMO RX packets received */ A_UINT32 rx_11be_ul_mumimo; @@ -6851,7 +7511,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** Num PPDU status processed from HW */ A_UINT32 ppdu_recvd; /** Num MPDU across PPDUs with FCS ok */ @@ -6982,7 +7648,13 @@ typedef struct { * BIT [ 7 : 0] :- mac_id * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; /** Num of phy err */ A_UINT32 total_phy_err_cnt; /** Counts of different types of phy errs @@ -8135,6 +8807,8 @@ typedef struct { A_UINT32 ru_type; /* refer to htt_stats_ru_type enum */ htt_tx_rate_stats_t per_ru[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS]; + + htt_tx_rate_stats_t per_tx_su_punctured_mode[HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS]; } htt_stats_per_rate_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_per_rate_stats_tlv htt_tx_rate_stats_per_tlv; @@ -10464,6 +11138,123 @@ typedef struct { } htt_vdevs_txrx_stats_t; #endif /* ATH_TARGET */ +/* PAPRD and power boost stats and counters */ +typedef struct { + htt_tlv_hdr_t tlv_hdr; + + /** current pdev_id */ + A_UINT32 pdev_id; + /** DPD and PowerBoost trigger count */ + A_UINT32 total_dpd_cal_count; + A_UINT32 chan_change_dpd_cal_count; + A_UINT32 thermal_dpd_cal_count; + A_UINT32 recovery_dpd_cal_count; + A_UINT32 pb_cal_count; + /** DPD and PowerBoost Fail Count */ + A_UINT32 total_dpd_fail_count; + A_UINT32 chan_change_dpd_fail_count; + A_UINT32 thermal_dpd_fail_count; + A_UINT32 recovery_dpd_fail_count; + A_UINT32 pb_fail_count; + + /* + * DPD and Power Boost validity status + * + * BIT 0 - DPD_CAL_STATUS + * BIT 1 - PB_CAL_STATUS + * + * CAL_STATUS can be interpreted as below + * CAL_SUCCESS = 1 + * CAL_FAIL = 0 + */ + union { + A_UINT32 dpd_pb_validity_status; + struct { + A_UINT32 is_dpd_valid:1, + is_pb_valid:1, + rsvd:30; + }; + }; + + /** Last DPD cal time in ms */ + A_UINT32 last_dpd_cal_time; + + /** Last Power Boost cal time in ms */ + A_UINT32 last_pb_cal_time; + + /** Power Boost gain per BW and MCS, in 0.25 dB units + * For example, a value of 2 represents a 0.5 dB gain. + */ + A_UINT32 power_boost_gain[HTT_TX_PDEV_STATS_NUM_BE_BW_COUNTERS][HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS]; +} htt_stats_phy_paprd_pb_tlv; + + +#define HTT_STATS_HDS_PROF_STATS_CIRCULAR_BUF_LEN 10 + +typedef struct { + htt_tlv_hdr_t tlv_hdr; + struct { + union { + A_UINT32 channel_info; + struct { + A_UINT32 bandwidth_mhz:16, + band_center_freq1:16; /* MHz units */ + }; + }; + + union { + A_UINT32 channel_config; + struct { + A_UINT32 phyMode:8, /* phyMode - WLAN_PHY_MODE enum type */ + txChainmask:8, + rxChainmask:8, + swProfile:8; + }; + }; + + A_UINT32 channelSwitchTime; + A_UINT32 calModuleTime; + A_UINT32 iniModuleTime; + A_UINT32 tpcModuleTime; + A_UINT32 miscModuleTime; + A_UINT32 ctlModuleTime; + A_UINT32 reserved; + } channelChange_stats[HTT_STATS_HDS_PROF_STATS_CIRCULAR_BUF_LEN]; + + A_UINT32 idx; /* shows how many channel changes have occurred */ +} htt_stats_hds_prof_stats_tlv; + +#define HTT_STATS_HDS_PROF_BANDWIDTH_MHZ_GET(word) \ + ((word) & 0x0000ffff) +#define HTT_STATS_HDS_PROF_BANDWIDTH_MHZ_SET(word, value) \ + ((word) |= ((value) & 0x0000ffff)) + +#define HTT_STATS_HDS_PROF_BAND_CENTER_FREQ1_GET(word) \ + (((word) & 0xffff0000) >> 16) +#define HTT_STATS_HDS_PROF_BAND_CENTER_FREQ1_SET(word, value) \ + ((word) |= (((value) << 16) & 0xffff0000)) + +#define HTT_STATS_HDS_PROF_PHY_MODE_GET(word) \ + (((word) & 0x000000ff) >> 0) +#define HTT_STATS_HDS_PROF_PHY_MODE_SET(word, value) \ + ((word) |= (((value) << 0) & 0x000000ff)) + +#define HTT_STATS_HDS_PROF_TX_CHAINMASK_GET(word) \ + (((word) & 0x0000ff00) >> 8) +#define HTT_STATS_HDS_PROF_TX_CHAINMASK_SET(word, value) \ + ((word) |= (((value) << 8) & 0x0000ff00)) + +#define HTT_STATS_HDS_PROF_RX_CHAINMASK_GET(word) \ + (((word) & 0x00ff0000) >> 16) +#define HTT_STATS_HDS_PROF_RX_CHAINMASK_SET(word, value) \ + ((word) |= (((value) << 16) & 0x00ff0000)) + +#define HTT_STATS_HDS_PROF_SW_PROFILE_GET(word) \ + (((word) & 0xff000000) >> 24) +#define HTT_STATS_HDS_PROF_SW_PROFILE_SET(word, value) \ + ((word) |= (((value) << 24) & 0xff000000)) + + typedef struct { union { A_UINT32 word32; @@ -10868,6 +11659,26 @@ typedef struct { #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M 0x0FFFF000 #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S 12 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID0_TQM_LINK_ID_M 0x00000007 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID0_TQM_LINK_ID_S 0 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID1_TQM_LINK_ID_M 0x00000038 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID1_TQM_LINK_ID_S 3 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID2_TQM_LINK_ID_M 0x000001C0 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID2_TQM_LINK_ID_S 6 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID3_TQM_LINK_ID_M 0x00000E00 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID3_TQM_LINK_ID_S 9 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID4_TQM_LINK_ID_M 0x00007000 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID4_TQM_LINK_ID_S 12 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID5_TQM_LINK_ID_M 0x00038000 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID5_TQM_LINK_ID_S 15 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID6_TQM_LINK_ID_M 0x001C0000 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID6_TQM_LINK_ID_S 18 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID7_TQM_LINK_ID_M 0x00E00000 +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID7_TQM_LINK_ID_S 21 +#define HTT_STATS_ML_PEER_EXT_DETAILS_MLO_MGMT_TID_TQM_LINK_ID_M 0x07000000 +#define HTT_STATS_ML_PEER_EXT_DETAILS_MLO_MGMT_TID_TQM_LINK_ID_S 24 + + #define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_GET(_var) \ (((_var) & HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M) >> \ HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S) @@ -10910,6 +11721,97 @@ typedef struct { ((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S)); \ } while (0) + +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID0_TQM_LINK_ID_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_EXT_DETAILS_TID0_TQM_LINK_ID_M) >> \ + HTT_STATS_ML_PEER_EXT_DETAILS_TID0_TQM_LINK_ID_S) +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID0_TQM_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_EXT_DETAILS_TID0_TQM_LINK_ID, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_EXT_DETAILS_TID0_TQM_LINK_ID_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_EXT_DETAILS_TID0_TQM_LINK_ID_S)); \ + } while (0) + +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID1_TQM_LINK_ID_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_EXT_DETAILS_TID1_TQM_LINK_ID_M) >> \ + HTT_STATS_ML_PEER_EXT_DETAILS_TID1_TQM_LINK_ID_S) +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID1_TQM_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_EXT_DETAILS_TID1_TQM_LINK_ID, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_EXT_DETAILS_TID1_TQM_LINK_ID_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_EXT_DETAILS_TID1_TQM_LINK_ID_S)); \ + } while (0) + +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID2_TQM_LINK_ID_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_EXT_DETAILS_TID2_TQM_LINK_ID_M) >> \ + HTT_STATS_ML_PEER_EXT_DETAILS_TID2_TQM_LINK_ID_S) +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID2_TQM_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_EXT_DETAILS_TID2_TQM_LINK_ID, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_EXT_DETAILS_TID2_TQM_LINK_ID_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_EXT_DETAILS_TID2_TQM_LINK_ID_S)); \ + } while (0) + +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID3_TQM_LINK_ID_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_EXT_DETAILS_TID3_TQM_LINK_ID_M) >> \ + HTT_STATS_ML_PEER_EXT_DETAILS_TID3_TQM_LINK_ID_S) +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID3_TQM_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_EXT_DETAILS_TID3_TQM_LINK_ID, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_EXT_DETAILS_TID3_TQM_LINK_ID_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_EXT_DETAILS_TID3_TQM_LINK_ID_S)); \ + } while (0) + +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID4_TQM_LINK_ID_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_EXT_DETAILS_TID4_TQM_LINK_ID_M) >> \ + HTT_STATS_ML_PEER_EXT_DETAILS_TID4_TQM_LINK_ID_S) +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID4_TQM_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_EXT_DETAILS_TID4_TQM_LINK_ID, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_EXT_DETAILS_TID4_TQM_LINK_ID_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_EXT_DETAILS_TID4_TQM_LINK_ID_S)); \ + } while (0) + +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID5_TQM_LINK_ID_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_EXT_DETAILS_TID5_TQM_LINK_ID_M) >> \ + HTT_STATS_ML_PEER_EXT_DETAILS_TID5_TQM_LINK_ID_S) +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID5_TQM_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_EXT_DETAILS_TID5_TQM_LINK_ID, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_EXT_DETAILS_TID5_TQM_LINK_ID_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_EXT_DETAILS_TID5_TQM_LINK_ID_S)); \ + } while (0) + +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID6_TQM_LINK_ID_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_EXT_DETAILS_TID6_TQM_LINK_ID_M) >> \ + HTT_STATS_ML_PEER_EXT_DETAILS_TID6_TQM_LINK_ID_S) +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID6_TQM_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_EXT_DETAILS_TID6_TQM_LINK_ID, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_EXT_DETAILS_TID6_TQM_LINK_ID_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_EXT_DETAILS_TID6_TQM_LINK_ID_S)); \ + } while (0) + +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID7_TQM_LINK_ID_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_EXT_DETAILS_TID7_TQM_LINK_ID_M) >> \ + HTT_STATS_ML_PEER_EXT_DETAILS_TID7_TQM_LINK_ID_S) +#define HTT_STATS_ML_PEER_EXT_DETAILS_TID7_TQM_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_EXT_DETAILS_TID7_TQM_LINK_ID, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_EXT_DETAILS_TID7_TQM_LINK_ID_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_EXT_DETAILS_TID7_TQM_LINK_ID_S)); \ + } while (0) + +#define HTT_STATS_ML_PEER_EXT_DETAILS_MLO_MGMT_TID_TQM_LINK_ID_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_EXT_DETAILS_MLO_MGMT_TID_TQM_LINK_ID_M) >> \ + HTT_STATS_ML_PEER_EXT_DETAILS_MLO_MGMT_TID_TQM_LINK_ID_S) +#define HTT_STATS_ML_PEER_EXT_DETAILS_MLO_MGMT_TID_TQM_LINK_ID_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_EXT_DETAILS_MLO_MGMT_TID_TQM_LINK_ID, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_EXT_DETAILS_MLO_MGMT_TID_TQM_LINK_ID_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_EXT_DETAILS_MLO_MGMT_TID_TQM_LINK_ID_S)); \ + } while (0) + typedef struct { htt_tlv_hdr_t tlv_hdr; union { @@ -10921,6 +11823,51 @@ typedef struct { }; A_UINT32 msg_dword_1; }; + union { + struct { + A_UINT32 tid0_tqm_link0_id : 3, + tid1_tqm_link0_id : 3, + tid2_tqm_link0_id : 3, + tid3_tqm_link0_id : 3, + tid4_tqm_link0_id : 3, + tid5_tqm_link0_id : 3, + tid6_tqm_link0_id : 3, + tid7_tqm_link0_id : 3, + mlo_mgmt_tid_tqm_link0_id : 3, + reserved_tqm_link0 : 5; + }; + A_UINT32 msg_dword_tqm_link0; + }; + union { + struct { + A_UINT32 tid0_tqm_link1_id : 3, + tid1_tqm_link1_id : 3, + tid2_tqm_link1_id : 3, + tid3_tqm_link1_id : 3, + tid4_tqm_link1_id : 3, + tid5_tqm_link1_id : 3, + tid6_tqm_link1_id : 3, + tid7_tqm_link1_id : 3, + mlo_mgmt_tid_tqm_link1_id : 3, + reserved_tqm_link1 : 5; + }; + A_UINT32 msg_dword_tqm_link1; + }; + union { + struct { + A_UINT32 tid0_tqm_link2_id : 3, + tid1_tqm_link2_id : 3, + tid2_tqm_link2_id : 3, + tid3_tqm_link2_id : 3, + tid4_tqm_link2_id : 3, + tid5_tqm_link2_id : 3, + tid6_tqm_link2_id : 3, + tid7_tqm_link2_id : 3, + mlo_mgmt_tid_tqm_link2_id : 3, + reserved_tqm_link2 : 5; + }; + A_UINT32 msg_dword_tqm_link2; + }; } htt_stats_ml_peer_ext_details_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_ml_peer_ext_details_tlv htt_ml_peer_ext_details_tlv; @@ -10947,11 +11894,16 @@ typedef htt_stats_ml_peer_ext_details_tlv htt_ml_peer_ext_details_tlv; #define HTT_ML_LINK_INFO_ANCHOR_LINK_S 21 #define HTT_ML_LINK_INFO_INITIALIZED_M 0x00400000 #define HTT_ML_LINK_INFO_INITIALIZED_S 22 +#define HTT_STATS_ML_LINK_INFO_BRIDGE_PEER_M 0x00800000 +#define HTT_STATS_ML_LINK_INFO_BRIDGE_PEER_S 23 #define HTT_ML_LINK_INFO_SW_PEER_ID_M 0x0000ffff #define HTT_ML_LINK_INFO_SW_PEER_ID_S 0 #define HTT_ML_LINK_INFO_VDEV_ID_M 0x00ff0000 #define HTT_ML_LINK_INFO_VDEV_ID_S 16 +#define HTT_STATS_ML_LINK_INFO_PS_STATE_M 0x01000000 +#define HTT_STATS_ML_LINK_INFO_PS_STATE_S 24 + #define HTT_ML_LINK_INFO_VALID_GET(_var) \ (((_var) & HTT_ML_LINK_INFO_VALID_M) >> \ @@ -11107,6 +12059,18 @@ typedef htt_stats_ml_peer_ext_details_tlv htt_ml_peer_ext_details_tlv; ((_var) |= ((_val) << HTT_ML_LINK_INFO_INITIALIZED_S)); \ } while (0) + +#define HTT_STATS_ML_LINK_INFO_BRIDGE_PEER_GET(_var) \ + (((_var) & HTT_STATS_ML_LINK_INFO_BRIDGE_PEER_M) >> \ + HTT_STATS_ML_LINK_INFO_BRIDGE_PEER_S) +#define HTT_STATS_ML_LINK_INFO_BRIDGE_PEER_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_LINK_INFO_BRIDGE_PEER, _val); \ + ((_var) &= ~(HTT_STATS_ML_LINK_INFO_BRIDGE_PEER_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_LINK_INFO_BRIDGE_PEER_S)); \ + } while (0) + + #define HTT_ML_LINK_INFO_SW_PEER_ID_GET(_var) \ (((_var) & HTT_ML_LINK_INFO_SW_PEER_ID_M) >> \ HTT_ML_LINK_INFO_SW_PEER_ID_S) @@ -11135,6 +12099,17 @@ typedef htt_stats_ml_peer_ext_details_tlv htt_ml_peer_ext_details_tlv; ((_var) |= ((_val) << HTT_ML_LINK_INFO_VDEV_ID_S)); \ } while (0) +#define HTT_STATS_ML_LINK_INFO_PS_STATE_GET(_var) \ + (((_var) & HTT_STATS_ML_LINK_INFO_PS_STATE_M) >> \ + HTT_STATS_ML_LINK_INFO_PS_STATE_S) +#define HTT_STATS_ML_LINK_INFO_PS_STATE_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_LINK_INFO_PS_STATE, _val); \ + ((_var) &= ~(HTT_STATS_ML_LINK_INFO_PS_STATE_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_LINK_INFO_PS_STATE_S)); \ + } while (0) + + typedef struct { htt_tlv_hdr_t tlv_hdr; union { @@ -11150,7 +12125,8 @@ typedef struct { master_link : 1, anchor_link : 1, initialized : 1, - reserved : 9; + bridge_peer : 1, + reserved : 8; }; A_UINT32 msg_dword_1; }; @@ -11159,7 +12135,8 @@ typedef struct { struct { A_UINT32 sw_peer_id : 16, vdev_id : 8, - reserved1 : 8; + ps : 1, + reserved1 : 7; }; A_UINT32 msg_dword_2; }; @@ -11197,6 +12174,8 @@ typedef htt_stats_ml_link_info_details_tlv htt_ml_link_info_tlv; #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M 0x000000ff #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S 0 +#define HTT_STATS_ML_PEER_DETAILS_STATUS_REQUIRED_M 0x0000ff00 +#define HTT_STATS_ML_PEER_DETAILS_STATUS_REQUIRED_S 8 #define HTT_ML_PEER_DETAILS_NUM_LINKS_GET(_var) \ (((_var) & HTT_ML_PEER_DETAILS_NUM_LINKS_M) >> \ @@ -11382,6 +12361,17 @@ typedef htt_stats_ml_link_info_details_tlv htt_ml_link_info_tlv; ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S)); \ } while (0) +#define HTT_STATS_ML_PEER_DETAILS_STATUS_REQUIRED_GET(_var) \ + (((_var) & HTT_STATS_ML_PEER_DETAILS_STATUS_REQUIRED_M) >> \ + HTT_STATS_ML_PEER_DETAILS_STATUS_REQUIRED_S) +#define HTT_STATS_ML_PEER_DETAILS_STATUS_REQUIRED_SET(_var, _val) \ + do { \ + HTT_CHECK_SET_VAL(HTT_STATS_ML_PEER_DETAILS_STATUS_REQUIRED, _val); \ + ((_var) &= ~(HTT_STATS_ML_PEER_DETAILS_STATUS_REQUIRED_M)); \ + ((_var) |= ((_val) << HTT_STATS_ML_PEER_DETAILS_STATUS_REQUIRED_S)); \ + } while (0) + + typedef struct { htt_tlv_hdr_t tlv_hdr; htt_mac_addr remote_mld_mac_addr; @@ -11414,8 +12404,19 @@ typedef struct { union { struct { - A_UINT32 participating_chips_bitmap : 8, - reserved1 : 24; + A_UINT32 participating_chips_bitmap : 8, + /* status_required: + * Bitmap of status-required flags for each chip. + * Bit 0 is always the chip with the primary link. + * The remaining bits are for the other chips, + * in increasing order of chip ID, wrapping around + * to cover the chips whose IDs are smaller than the + * primary link's chip. + * Thus, bit 1 is for the chip whose ID is next after + * the primary link's chip ID, etc. + */ + status_required : 8, + reserved1 : 16; }; A_UINT32 msg_dword_2; }; @@ -11706,6 +12707,16 @@ typedef struct { * only for UL BSR TX mode. */ A_UINT32 running_ul_scheduler_for_bsrp_cnt[HTT_NUM_AC_WMM]; + /** + * Number of instances where we populated TX mode and candidate lists + * only for DL, due to skipping UL voluntarily. + */ + A_UINT32 running_dl_scheduler_due_to_skip_ul[HTT_NUM_AC_WMM]; + /** + * Number of instances where we populated TX mode and candidate lists + * only for UL, due to skipping DL voluntarily. + */ + A_UINT32 running_ul_scheduler_due_to_skip_dl[HTT_NUM_AC_WMM]; } htt_stats_pdev_sched_algo_ofdma_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_pdev_sched_algo_ofdma_stats_tlv @@ -11721,7 +12732,13 @@ typedef struct { * read/write this bitfield. * BIT [31 : 8] :- reserved */ - A_UINT32 mac_id__word; + union { + struct { + A_UINT32 mac_id: 8, + reserved: 24; + }; + A_UINT32 mac_id__word; + }; A_UINT32 basic_trigger_across_bss; A_UINT32 basic_trigger_within_bss; A_UINT32 bsr_trigger_across_bss; @@ -11884,17 +12901,37 @@ typedef struct { * BIT [ 15 : 8] :- pri20_index * BIT [ 31 : 16] :- pri20_freq in Mhz */ - A_UINT32 mac_id__pri20_idx__freq; + union { + struct { + A_UINT32 mac_id : 8; + A_UINT32 pri20_idx : 8; + A_UINT32 pri20_freq_mhz : 16; + }; + A_UINT32 mac_id__pri20_idx__freq; + }; /* BIT [ 15 : 0] :- centre_freq1 * BIT [ 31 : 16] :- centre_freq2 */ - A_UINT32 centre_freq1__freq2; + union { + struct { + A_UINT32 centre_freq1 : 16; + A_UINT32 centre_freq2 : 16; + }; + A_UINT32 centre_freq1__freq2; + }; /* BIT [ 7 : 0] :- channel_phy_mode * BIT [ 23 : 8] :- static_pattern */ - A_UINT32 phy_mode__static_pattern; + union { + struct { + A_UINT32 phy_mode : 8; + A_UINT32 static_pattern : 16; + A_UINT32 reserved : 8; + }; + A_UINT32 phy_mode__static_pattern; + }; } htt_stats_pdev_bw_mgr_stats_tlv; /* preserve old name alias for new name consistent with the tag name */ typedef htt_stats_pdev_bw_mgr_stats_tlv htt_pdev_bw_mgr_stats_tlv; diff --git a/drivers/staging/fw-api/fw/wlan_defs.h b/drivers/staging/fw-api/fw/wlan_defs.h index 2e8db1346a90..823b8ec9fedf 100755 --- a/drivers/staging/fw-api/fw/wlan_defs.h +++ b/drivers/staging/fw-api/fw/wlan_defs.h @@ -161,6 +161,18 @@ typedef enum { MODE_11BE_EHT40_2G = 32, /* For WIN */ #endif +#if defined(SUPPORT_11BN) && SUPPORT_11BN + MODE_11BN_UHR20 = 33, + MODE_11BN_UHR40 = 34, + MODE_11BN_UHR80 = 35, + MODE_11BN_UHR80_80 = 36, + MODE_11BN_UHR160 = 37, + MODE_11BN_UHR160_160 = 38, + MODE_11BN_UHR320 = 39, + MODE_11BN_UHR20_2G = 40, + MODE_11BN_UHR40_2G = 41, +#endif + /* * MODE_UNKNOWN should not be used within the host / target interface. * Thus, it is permissible for MODE_UNKNOWN to be conditionally-defined, @@ -262,6 +274,20 @@ typedef enum { ((mode) == MODE_11BE_EHT40_2G)) #endif /* SUPPORT_11BE */ +#if defined(SUPPORT_11BN) && SUPPORT_11BN +#define IS_MODE_UHR(mode) (((mode) == MODE_11BN_UHR20) || \ + ((mode) == MODE_11BN_UHR40) || \ + ((mode) == MODE_11BN_UHR80) || \ + ((mode) == MODE_11BN_UHR80_80) || \ + ((mode) == MODE_11BN_UHR160) || \ + ((mode) == MODE_11BN_UHR160_160)|| \ + ((mode) == MODE_11BN_UHR320) || \ + ((mode) == MODE_11BN_UHR20_2G) || \ + ((mode) == MODE_11BN_UHR40_2G)) +#define IS_MODE_UHR_2G(mode) (((mode) == MODE_11BN_UHR20_2G) || \ + ((mode) == MODE_11BN_UHR40_2G)) +#endif /* SUPPORT_11BN */ + #define IS_MODE_VHT_2G(mode) (((mode) == MODE_11AC_VHT20_2G) || \ ((mode) == MODE_11AC_VHT40_2G) || \ ((mode) == MODE_11AC_VHT80_2G)) diff --git a/drivers/staging/fw-api/fw/wlan_module_ids.h b/drivers/staging/fw-api/fw/wlan_module_ids.h index 981bbaef3451..6ccf2d652f95 100644 --- a/drivers/staging/fw-api/fw/wlan_module_ids.h +++ b/drivers/staging/fw-api/fw/wlan_module_ids.h @@ -196,6 +196,8 @@ typedef enum { WLAN_MODULE_C2C, /* 0x98 */ WLAN_MODULE_VBSS, /* 0x99 */ WLAN_MODULE_OPT_DATA, /* 0x9a */ + WLAN_MODULE_ASD, /* 0x9b */ + WLAN_MODULE_ENERGY_MGMT, /* 0x9c */ WLAN_MODULE_ID_MAX, WLAN_MODULE_ID_INVALID = WLAN_MODULE_ID_MAX, diff --git a/drivers/staging/fw-api/fw/wmi_services.h b/drivers/staging/fw-api/fw/wmi_services.h index b82c7bd1fc45..18f2fa6085d5 100644 --- a/drivers/staging/fw-api/fw/wmi_services.h +++ b/drivers/staging/fw-api/fw/wmi_services.h @@ -695,6 +695,32 @@ typedef enum { WMI_SERVICE_UMAC_MIGRATION_SUPPORT = 436, /* Indicates that FW supports UMAC migration */ WMI_SERVICE_STA_TWT_STATS_EXT = 437, /* FW supports additional info in TWT stats and ADD COMPLETION Event */ WMI_SERVICE_OPT_DP_DIAG_SUPPORT = 438, /* FW supports diag QDATA feature */ + WMI_SERVICE_MLO_ROAM_PARTNER_BRINGUP_FROM_HOST = 439, /* Indicates FW supports new design in which FW expects the host to bringup the partner link during roaming */ + WMI_SERVICE_CTRL_PATH_PEER_BA_STATS = 440, /* FW supports retrieving BlockAck stats through WMI_REQUEST_CTRL_PATH_PEER_STAT */ + WMI_SERVICE_CTRL_PATH_STA_DAR_STATS_SUPPORT = 441, /* FW supports DAR stats reporting for STA mode */ + WMI_SERVICE_APF_DATA_OFFLOAD_SUPPORT_ENABLED = 442, /* Indicates FW support for APFv6 handling offloads and disable QC data offloads */ + WMI_SERVICE_PER_VDEV_TWT_RESP_DISABLE_SUPPORT = 443, /* FW supports vdev level TWT responder disable */ + WMI_SERVICE_VENDOR_OUI_ACTION_V2 = 444, /* FW supports vendor OUI action version 2 */ + WMI_SERVICE_HW_BLACKLIST_CHAN_SUPPORT = 445, /* Indicates FW support for computing and sending the HW channel blacklist for the current country and applicable power mode */ + WMI_SERVICE_NDP_DFS_CHANNEL_SUPPORT = 446, /* FW supports forming NDP on DFS channels */ + WMI_SERVICE_WFD_R2 = 447, /* Indicates FW supports WiFi-Direct R2 */ + WMI_SERVICE_STA_MLO_RCFG_SUPPORT = 448, /* FW supports STA ML reconfig op */ + WMI_SERVICE_PDEV_SUSPEND_EVENT_SUPPORT = 449, /* FW supports PDEV_SUSPEND event */ + WMI_SERVICE_PCC_MODE = 450, /* Indicates FW support for PCC (P2P Connection Compatibility) Mode */ + WMI_SERVICE_TDLS_NSS_CONFIRM_SUPPORT = 451, /* FW supports confirmation to host requested TDLS NSS operation */ + + WMI_SERVICE_EM_PCIE_CONFIG_CBW_SUPPORT = 452, /* Indicates support for channel bandwidth based PCIe config adjustment */ + WMI_SERVICE_EM_PCIE_CONFIG_LPM_SUPPORT = 453, /* Indicates support for PCIe low power mode L0S/L1 */ + WMI_SERVICE_EM_DCVS_SUPPORT = 454, /* Indicates support for Dynamic clock and voltage scaling */ + WMI_SERVICE_EM_EDPS_SUPPORT = 455, /* Indicates support for Dynamic AP power save */ + WMI_SERVICE_EM_PUO_SUPPORT = 456, /* Indicates support for TWT based periodic unavailability operation. */ + WMI_SERVICE_EM_ECO_MODE_SUPPORT = 457, /* Indicates support for ECO mode config (LP BBF+ADC+SYNCT) */ + + WMI_SERVICE_11BN = 458, /* Indicates FW supports 802.11bn */ + WMI_SERVICE_HOST_AWARE_POWERSAVE = 459, /* FW supports indicating the powerstate of FW to host */ + WMI_SERVICE_PDEV_DIV_STATES_REPORT = 460, /* FW supports reporting antenna diversity states */ + WMI_SERVICE_EAPOL_OVER_RAW = 461, /* FW supports sending EAPOL frames in raw mode even when the vdev is brought up in nwifi/ethernet mode */ + WMI_SERVICE_MLO_SAP_LINK_REMOVAL_SUPPORT = 462, /* Indicates FW supports MLO SAP link removal operation */ WMI_MAX_EXT2_SERVICE diff --git a/drivers/staging/fw-api/fw/wmi_tlv_defs.h b/drivers/staging/fw-api/fw/wmi_tlv_defs.h index e8c306dbcb7f..54ea736a2375 100644 --- a/drivers/staging/fw-api/fw/wmi_tlv_defs.h +++ b/drivers/staging/fw-api/fw/wmi_tlv_defs.h @@ -1476,6 +1476,29 @@ typedef enum { WMITLV_TAG_STRUC_wmi_vdev_vbss_peer_sn_info, WMITLV_TAG_STRUC_wmi_vdev_vbss_config_event_fixed_param, WMITLV_TAG_STRUC_wmi_stats_ext_event_vdev_ext2_t, + WMITLV_TAG_STRUC_wmi_ndp_set_latency_tput_fixed_param, + WMITLV_TAG_STRUC_wmi_roam_partner_link_param, + WMITLV_TAG_STRUC_wmi_mlo_link_ttlm_complete_fixed_param, + WMITLV_TAG_STRUC_wmi_ctrl_path_sta_dar_stats_struct, + WMITLV_TAG_STRUC_wmi_bpf_set_supported_offload_bitmap_cmd_fixed_param, + WMITLV_TAG_STRUC_wmi_hw_blacklist_chan_fixed_param, + WMITLV_TAG_STRUC_wmi_hw_blacklist_chan_data, + WMITLV_TAG_STRUC_wmi_pdev_suspend_event_fixed_param, + WMITLV_TAG_STRUC_wmi_bpf_set_apf_mode_cmd_fixed_param, + WMITLV_TAG_STRUC_wmi_peer_assoc_operating_mode_params, + WMITLV_TAG_STRUC_wmi_recv_bcn_stats, + WMITLV_TAG_STRUC_wmi_vdev_vbss_peer_dyn_info, + WMITLV_TAG_STRUC_wmi_energy_mgmt_pcie_config_cmd_fixed_param, + WMITLV_TAG_STRUC_wmi_energy_mgmt_pcie_lpm_cmd_fixed_param, + WMITLV_TAG_STRUC_wmi_energy_mgmt_dcvs_config_cmd_fixed_param, + WMITLV_TAG_STRUC_wmi_energy_mgmt_edps_config_cmd_fixed_param, + WMITLV_TAG_STRUC_wmi_energy_mgmt_puo_config_cmd_fixed_param, + WMITLV_TAG_STRUC_wmi_energy_mgmt_eco_mode_config_cmd_fixed_param, + WMITLV_TAG_STRUC_wmi_peer_assoc_mgmt_mpduq_params, + WMITLV_TAG_STRUC_wmi_peer_assoc_mgmt_msduq_params, + WMITLV_TAG_STRUC_wmi_peer_assoc_hol_mdsuq_params, + WMITLV_TAG_STRUC_wmi_peer_tid_rate_custom_cmd_fixed_param, + WMITLV_TAG_STRUC_wmi_co_located_chan_info, } WMITLV_TAG_ID; /* * IMPORTANT: Please add _ALL_ WMI Commands Here. @@ -2037,6 +2060,17 @@ typedef enum { OP(WMI_MLO_LINK_RECONFIG_COMPLETE_CMDID) \ OP(WMI_SAWF_EZMESH_HOP_COUNT_CMDID) \ OP(WMI_VDEV_VBSS_CONFIG_CMDID) \ + OP(WMI_NDP_SET_LATENCY_TPUT_CMDID) \ + OP(WMI_MLO_LINK_TTLM_COMPLETE_CMDID) \ + OP(WMI_BPF_SET_SUPPORTED_OFFLOAD_BITMAP_CMDID) \ + OP(WMI_BPF_SET_APF_MODE_CMDID) \ + OP(WMI_ENERGY_MGMT_PCIE_CONFIG_CMDID) \ + OP(WMI_ENERGY_MGMT_PCIE_LPM_CMDID) \ + OP(WMI_ENERGY_MGMT_DCVS_CONFIG_CMDID) \ + OP(WMI_ENERGY_MGMT_EDPS_CONFIG_CMDID) \ + OP(WMI_ENERGY_MGMT_PUO_CONFIG_CMDID) \ + OP(WMI_ENERGY_MGMT_ECO_MODE_CONFIG_CMDID) \ + OP(WMI_PEER_TID_RATE_CUSTOM_CMDID) \ /* add new CMD_LIST elements above this line */ @@ -2372,6 +2406,8 @@ typedef enum { OP(WMI_PDEV_WIFI_RADAR_CAPABILITIES_EVENTID) \ OP(WMI_VDEV_VBSS_CONFIG_EVENTID) \ OP(WMI_OPT_DP_DIAG_EVENTID) \ + OP(WMI_HW_BLACKLIST_CHAN_EVENTID) \ + OP(WMI_PDEV_SUSPEND_EVENTID) \ /* add new EVT_LIST elements above this line */ @@ -2867,7 +2903,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_assoc_mlo_params, mlo_params, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_eht_rate_set, peer_eht_rates, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_assoc_mlo_partner_link_params, partner_link_params, WMITLV_SIZE_VAR) \ - WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_assoc_tid_to_link_map, peer_tid_to_link_map, WMITLV_SIZE_VAR) + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_assoc_tid_to_link_map, peer_tid_to_link_map, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_assoc_operating_mode_params, operating_mode_params, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_assoc_mgmt_mpduq_params, mgmt_mpduq_params, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_assoc_mgmt_msduq_params, mgmt_msduq_params, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_assoc_hol_mdsuq_params, hol_mdsuq_params, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_PEER_ASSOC_CMDID); @@ -3611,7 +3651,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_DELETE_CMDID); /* Vdev up Cmd */ #define WMITLV_TABLE_WMI_VDEV_UP_CMDID(id,op,buf,len) \ - WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_up_cmd_fixed_param, wmi_vdev_up_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_up_cmd_fixed_param, wmi_vdev_up_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_co_located_chan_info, co_located_chan_info, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_UP_CMDID); @@ -3643,7 +3684,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_UPDATE_MAC_ADDR_CMDID); #define WMITLV_TABLE_WMI_VDEV_VBSS_CONFIG_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_vbss_config_cmd_fixed_param, wmi_vdev_vbss_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)\ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_vbss_peer_pn_info, vbss_peer_pn_info, WMITLV_SIZE_VAR) \ - WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_vbss_peer_sn_info, vbss_peer_sn_info, WMITLV_SIZE_VAR) + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_vbss_peer_sn_info, vbss_peer_sn_info, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_vbss_peer_dyn_info, vbss_peer_dyn_info, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_VBSS_CONFIG_CMDID); /* Pdev suspend Cmd */ @@ -4099,6 +4141,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_NDP_END_REQ_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ndp_cmd_param, wmi_ndp_cmd_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_NDP_CMDID); +/* NDP Set Latency Tput Cmd */ +#define WMITLV_TABLE_WMI_NDP_SET_LATENCY_TPUT_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_ndp_set_latency_tput_fixed_param, wmi_ndp_set_latency_tput_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_NDP_SET_LATENCY_TPUT_CMDID); + /* RCPI Info Request Cmd */ #define WMITLV_TABLE_WMI_REQUEST_RCPI_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_request_rcpi_cmd_fixed_param, wmi_request_rcpi_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) @@ -5384,6 +5431,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_MLO_LINK_RECONFIG_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mlo_link_reconfig_complete_fixed_param, wmi_mlo_link_reconfig_complete_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_MLO_LINK_RECONFIG_COMPLETE_CMDID); +/** WMI cmd to notify fw completion of link TTLM negotiation */ +#define WMITLV_TABLE_WMI_MLO_LINK_TTLM_COMPLETE_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_mlo_link_ttlm_complete_fixed_param, wmi_mlo_link_ttlm_complete_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_MLO_LINK_TTLM_COMPLETE_CMDID); + /* Mcast ipv4 address filter list cmd */ #define WMITLV_TABLE_WMI_VDEV_IGMP_OFFLOAD_CMDID(id,op,buf,len) \ WMITLV_ELEM(id, op, buf, len, WMITLV_TAG_STRUC_wmi_igmp_offload_fixed_param, wmi_igmp_offload_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ @@ -5745,6 +5797,50 @@ WMITLV_CREATE_PARAM_STRUC(WMI_GET_SCAN_CACHE_RESULT_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sawf_ezmesh_hop_count_cmd_fixed_param, wmi_sawf_ezmesh_hop_count_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_SAWF_EZMESH_HOP_COUNT_CMDID); +#define WMITLV_TABLE_WMI_BPF_SET_SUPPORTED_OFFLOAD_BITMAP_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_bpf_set_supported_offload_bitmap_cmd_fixed_param, wmi_bpf_set_supported_offload_bitmap_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_BPF_SET_SUPPORTED_OFFLOAD_BITMAP_CMDID); + +#define WMITLV_TABLE_WMI_BPF_SET_APF_MODE_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_bpf_set_apf_mode_cmd_fixed_param, wmi_bpf_set_apf_mode_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_BPF_SET_APF_MODE_CMDID); + +/* WMI cmd used to control PCIe config */ +#define WMITLV_TABLE_WMI_ENERGY_MGMT_PCIE_CONFIG_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_energy_mgmt_pcie_config_cmd_fixed_param, wmi_energy_mgmt_pcie_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_ENERGY_MGMT_PCIE_CONFIG_CMDID); + +/* WMI cmd used for PCIe LPM config */ +#define WMITLV_TABLE_WMI_ENERGY_MGMT_PCIE_LPM_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_energy_mgmt_pcie_lpm_cmd_fixed_param, wmi_energy_mgmt_pcie_lpm_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_ENERGY_MGMT_PCIE_LPM_CMDID); + +/* WMI cmd used to control DCVS config */ +#define WMITLV_TABLE_WMI_ENERGY_MGMT_DCVS_CONFIG_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_energy_mgmt_dcvs_config_cmd_fixed_param, wmi_energy_mgmt_dcvs_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_ENERGY_MGMT_DCVS_CONFIG_CMDID); + +/* WMI cmd used to control Dynamic AP Power Save config */ +#define WMITLV_TABLE_WMI_ENERGY_MGMT_EDPS_CONFIG_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_energy_mgmt_edps_config_cmd_fixed_param, wmi_energy_mgmt_edps_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_ENERGY_MGMT_EDPS_CONFIG_CMDID); + +/* WMI cmd used to control Scheduled AP Power Save config */ +#define WMITLV_TABLE_WMI_ENERGY_MGMT_PUO_CONFIG_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_energy_mgmt_puo_config_cmd_fixed_param, wmi_energy_mgmt_puo_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_ENERGY_MGMT_PUO_CONFIG_CMDID); + +/* WMI cmd used to control Un-scheduled AP Power Save config */ +#define WMITLV_TABLE_WMI_ENERGY_MGMT_ECO_MODE_CONFIG_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_energy_mgmt_eco_mode_config_cmd_fixed_param, wmi_energy_mgmt_eco_mode_config_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_ENERGY_MGMT_ECO_MODE_CONFIG_CMDID); + +/* peer tid rate customization cmd */ +#define WMITLV_TABLE_WMI_PEER_TID_RATE_CUSTOM_CMDID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_tid_rate_custom_cmd_fixed_param, wmi_peer_tid_rate_custom_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, rate_code, WMITLV_SIZE_VAR) +WMITLV_CREATE_PARAM_STRUC(WMI_PEER_TID_RATE_CUSTOM_CMDID); + /************************** TLV definitions of WMI events *******************************/ @@ -6092,7 +6188,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_AGGR_STATE_TRIG_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, deauth_disassoc_frame, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_pdev_hw_mode_transition_event_fixed_param, hw_mode_transition_fixed_param, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_pdev_set_hw_mode_response_vdev_mac_entry, wmi_pdev_set_hw_mode_response_vdev_mac_mapping, WMITLV_SIZE_VAR) \ - WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_bss_info_param, bss_info_param, WMITLV_SIZE_VAR) + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_bss_info_param, bss_info_param, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_partner_link_param, partner_link_param, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_EVENTID); /* Roam Synch Event */ @@ -6365,7 +6462,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_HOST_SWFDA_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_pmf_bcn_protect_stats, pmf_bcn_protect_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_extd_stats, vdev_extd_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_pdev_extd_stats, pdev_extd_stats, WMITLV_SIZE_VAR) \ - WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_pdev_telemetry_stats, pdev_telemetry_stats, WMITLV_SIZE_VAR) + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_pdev_telemetry_stats, pdev_telemetry_stats, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_recv_bcn_stats, recv_bcn_stats, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_UPDATE_STATS_EVENTID); /* Update PN response Event */ @@ -6801,6 +6899,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_MDNS_STATS_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_resume_event_fixed_param, wmi_pdev_resume_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_RESUME_EVENTID); +/* pdev suspend event */ +#define WMITLV_TABLE_WMI_PDEV_SUSPEND_EVENTID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_suspend_event_fixed_param, wmi_pdev_suspend_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) +WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SUSPEND_EVENTID); + /* SAP Authentication offload event */ #define WMITLV_TABLE_WMI_SAP_OFL_ADD_STA_EVENTID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_sap_ofl_add_sta_event_fixed_param, wmi_sap_ofl_add_sta_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ @@ -6954,7 +7057,9 @@ WMITLV_CREATE_PARAM_STRUC(WMI_REG_CHAN_LIST_CC_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_regulatory_chan_priority_struct, reg_chan_priority, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_regulatory_fcc_rule_struct, reg_fcc_rule, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_reg_chan_list_cc_ext_additional_params, reg_more_data, WMITLV_SIZE_VAR) \ - WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_regulatory_rule_meta_data, reg_meta_data, WMITLV_SIZE_VAR) + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_regulatory_rule_meta_data, reg_meta_data, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_hw_blacklist_chan_fixed_param, hw_blacklist_chan_fixed_param, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_hw_blacklist_chan_data, hw_blacklist_chan_data, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_REG_CHAN_LIST_CC_EXT_EVENTID); /* WMI AFC info event */ @@ -6964,9 +7069,17 @@ WMITLV_CREATE_PARAM_STRUC(WMI_REG_CHAN_LIST_CC_EXT_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_afc_power_event_param, wmi_afc_power_event_param, afc_power_event_param, WMITLV_SIZE_FIX)\ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_6g_afc_frequency_info, freq_info_array, WMITLV_SIZE_VAR)\ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_6g_afc_channel_info, channel_info_array, WMITLV_SIZE_VAR)\ - WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_afc_chan_eirp_power_info, chan_eirp_power_info_array, WMITLV_SIZE_VAR) + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_afc_chan_eirp_power_info, chan_eirp_power_info_array, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_hw_blacklist_chan_fixed_param, hw_blacklist_chan_fixed_param, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_hw_blacklist_chan_data, hw_blacklist_chan_data, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_AFC_EVENTID); +/* HW blacklist channels for the current country code */ +#define WMITLV_TABLE_WMI_HW_BLACKLIST_CHAN_EVENTID(id,op,buf,len) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_hw_blacklist_chan_fixed_param, wmi_hw_blacklist_chan_fixed_param, hw_blacklist_chan_fixed_param, WMITLV_SIZE_FIX) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_hw_blacklist_chan_data, hw_blacklist_chan_data, WMITLV_SIZE_VAR) +WMITLV_CREATE_PARAM_STRUC(WMI_HW_BLACKLIST_CHAN_EVENTID); + /* Indicate LPI AP detect or not to Host */ #define WMITLV_TABLE_WMI_C2C_DETECT_EVENTID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_c2c_detect_event_fixed_param, wmi_c2c_detect_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) @@ -7257,7 +7370,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PEER_STATS_INFO_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_vdev_bcn_tx_stats_struct, ctrl_path_vdev_bcn_tx_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_pdev_bcn_tx_stats_struct, ctrl_path_pdev_bcn_tx_stats, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_pdev_conn_stats_struct, ctrl_path_pdev_conn_stats, WMITLV_SIZE_VAR) \ - WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_ml_rcfg_stats_struct, ctrl_path_ml_rcfg_stats, WMITLV_SIZE_VAR) + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_ml_rcfg_stats_struct, ctrl_path_ml_rcfg_stats, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_ctrl_path_sta_dar_stats_struct, ctrl_path_sta_dar_stats, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_CTRL_PATH_STATS_EVENTID); /* @@ -7775,7 +7889,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_VENDOR_PEER_EVENTID); #define WMITLV_TABLE_WMI_VDEV_VBSS_CONFIG_EVENTID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_vdev_vbss_config_event_fixed_param, wmi_vdev_vbss_config_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)\ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_vbss_peer_pn_info, vbss_peer_pn_info, WMITLV_SIZE_VAR) \ - WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_vbss_peer_sn_info, vbss_peer_sn_info, WMITLV_SIZE_VAR) + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_vbss_peer_sn_info, vbss_peer_sn_info, WMITLV_SIZE_VAR) \ + WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vdev_vbss_peer_dyn_info, vbss_peer_dyn_info, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_VBSS_CONFIG_EVENTID); /* link switch event */ diff --git a/drivers/staging/fw-api/fw/wmi_unified.h b/drivers/staging/fw-api/fw/wmi_unified.h index 70eaf1826cf7..49ad445c6dbf 100644 --- a/drivers/staging/fw-api/fw/wmi_unified.h +++ b/drivers/staging/fw-api/fw/wmi_unified.h @@ -369,7 +369,8 @@ typedef enum { WMI_GRP_QUIET_OFL, /* 0x4a Quiet offloads */ WMI_GRP_ODD, /* 0x4b ODD */ WMI_GRP_TDMA, /* 0x4c TDMA */ - WMI_GRP_MANUAL_UL_TRIG /* 0x4d Manual UL OFDMA Trigger */ + WMI_GRP_MANUAL_UL_TRIG, /* 0x4d Manual UL OFDMA Trigger */ + WMI_GRP_ENERGY_MGMT, /* 0x4e energy management */ } WMI_GRP_ID; #define WMI_CMD_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) @@ -851,6 +852,9 @@ typedef enum { /* WMI command to setup reorder queue for multiple TIDs */ WMI_PEER_MULTIPLE_REORDER_QUEUE_SETUP_CMDID, + /** Customize MCS range for specific tid */ + WMI_PEER_TID_RATE_CUSTOM_CMDID, + /* beacon/management specific commands */ /** transmit beacon by reference . used for transmitting beacon on low latency interface like pcie */ @@ -1579,6 +1583,8 @@ typedef enum { WMI_BPF_SET_VDEV_ENABLE_CMDID, WMI_BPF_SET_VDEV_WORK_MEMORY_CMDID, WMI_BPF_GET_VDEV_WORK_MEMORY_CMDID, + WMI_BPF_SET_SUPPORTED_OFFLOAD_BITMAP_CMDID, + WMI_BPF_SET_APF_MODE_CMDID, /** WMI commands related to monitor mode. */ WMI_MNT_FILTER_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_MONITOR), @@ -1601,6 +1607,7 @@ typedef enum { WMI_NDP_RESPONDER_REQ_CMDID, WMI_NDP_END_REQ_CMDID, WMI_NDP_CMDID, + WMI_NDP_SET_LATENCY_TPUT_CMDID, /** WMI commands related to HW data filtering **/ WMI_HW_DATA_FILTER_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_HW_DATA_FILTER), @@ -1702,6 +1709,8 @@ typedef enum { WMI_MLO_LINK_RECONFIG_CMDID, /** WMI cmd to notify fw completion of link reconfig */ WMI_MLO_LINK_RECONFIG_COMPLETE_CMDID, + /** WMI cmd to notify fw completion of negotiated TID to LINK map */ + WMI_MLO_LINK_TTLM_COMPLETE_CMDID, /** WMI commands specific to Service Aware WiFi (SAWF) */ /** configure or reconfigure the parameters for a service class */ @@ -1723,6 +1732,21 @@ typedef enum { /** WMI Command to set Manual MU UL OFDMA trigger parameters */ WMI_VDEV_SET_ULOFDMA_MANUAL_MU_TRIG_CMDID, + + + /** WMI commands specific to Energy Management **/ + /** WMI cmd used to control PCIe config */ + WMI_ENERGY_MGMT_PCIE_CONFIG_CMDID = WMI_CMD_GRP_START_ID(WMI_GRP_ENERGY_MGMT), + /** WMI cmd used to control PCIe LPM */ + WMI_ENERGY_MGMT_PCIE_LPM_CMDID, + /** WMI cmd used to control Clock and Voltage config */ + WMI_ENERGY_MGMT_DCVS_CONFIG_CMDID, + /** WMI cmd used to control AP Dynamic Power Save feature */ + WMI_ENERGY_MGMT_EDPS_CONFIG_CMDID, + /** WMI cmd used to control periodic unavailability operation */ + WMI_ENERGY_MGMT_PUO_CONFIG_CMDID, + /** WMI cmd used to control ECO mode config */ + WMI_ENERGY_MGMT_ECO_MODE_CONFIG_CMDID, } WMI_CMD_ID; typedef enum { @@ -2163,6 +2187,7 @@ typedef enum { /* send pdev resume event to host after pdev resume. */ WMI_PDEV_RESUME_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SUSPEND), + WMI_PDEV_SUSPEND_EVENTID, /** WOW wake up host event.generated in response to WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID. will cary wake reason */ @@ -2529,6 +2554,8 @@ typedef enum { WMI_AFC_EVENTID, WMI_REG_CHAN_LIST_CC_EXT2_EVENTID, /* DEPRECATED */ WMI_C2C_DETECT_EVENTID, + /* WMI event to send the HW channel blacklist during the CTL blob update */ + WMI_HW_BLACKLIST_CHAN_EVENTID, /** Events for TWT(Target Wake Time) of STA and AP */ WMI_TWT_ENABLE_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_TWT), @@ -2588,6 +2615,9 @@ typedef enum { WMI_MLO_VDEV_LINK_INFO_EVENTID, /** request host to do T2LM neg to the un-disabled link */ WMI_MLO_LINK_DISABLE_REQUEST_EVENTID, + /* alias */ + WMI_MLO_LINK_TTLM_REQUEST_EVENTID = + WMI_MLO_LINK_DISABLE_REQUEST_EVENTID, /** request host to switch to new link for specified vdev */ WMI_MLO_LINK_SWITCH_REQUEST_EVENTID, /** Response event for WMI_MLO_PRIMARY_LINK_PEER_MIGRATION_CMDID */ @@ -3563,6 +3593,21 @@ typedef struct { #define WMI_TARGET_CAP_MPDU_STATS_PER_TX_NSS_SUPPORT_SET(target_cap_flags, value)\ WMI_SET_BITS(target_cap_flags, 16, 1, value) +#define WMI_TARGET_CAP_MAX_ML_STA_BSS_NUM_GET(target_cap_flags) \ + WMI_GET_BITS(target_cap_flags, 17, 3) +#define WMI_TARGET_CAP_MAX_ML_STA_BSS_NUM_SET(target_cap_flags, value) \ + WMI_SET_BITS(target_cap_flags, 17, 3, value) + +#define WMI_TARGET_CAP_MAX_ML_SAP_BSS_NUM_GET(target_cap_flags) \ + WMI_GET_BITS(target_cap_flags, 20, 3) +#define WMI_TARGET_CAP_MAX_ML_SAP_BSS_NUM_SET(target_cap_flags, value) \ + WMI_SET_BITS(target_cap_flags, 20, 3, value) + +#define WMI_TARGET_CAP_TOTAL_ML_LINKS_NUM_GET(target_cap_flags) \ + WMI_GET_BITS(target_cap_flags, 23, 3) +#define WMI_TARGET_CAP_TOTAL_ML_LINKS_NUM_SET(target_cap_flags, value) \ + WMI_SET_BITS(target_cap_flags, 23, 3, value) + /* * wmi_htt_msdu_idx_to_htt_msdu_qtype GET/SET APIs @@ -3762,7 +3807,10 @@ typedef struct { * Bit 14 - Support for ML monitor mode * Bit 15 - Support for Qdata Tx LCE filter installation * Bit 16 - Support for MPDU stats per tx Nss capability - * Bits 31:17 - Reserved + * Bits 19:17 - max number of ML STA BSS supported, range [0-7] + * Bits 22:20 - max number of ML SAP BSS supported, range [0-7] + * Bits 25:23 - total number of ML links supported, range [0-7] + * Bits 31:26 - Reserved */ A_UINT32 target_cap_flags; @@ -3860,10 +3908,18 @@ typedef struct { * WMI_HAL_REG_CAPABILITIES_EXT2 hal_reg_caps[]; * wmi_nan_capabilities nan_cap; * WMI_SCAN_RADIO_CAPABILITIES_EXT2 wmi_scan_radio_caps[]; + * wmi_twt_caps_params twt_caps[]; * wmi_htt_msdu_idx_to_htt_msdu_qtype htt_msdu_idx_to_qtype_map[]; * wmi_dbs_or_sbs_cap_ext dbs_or_sbs_cap_ext; + * wmi_cust_bdf_version_capabilities cust_bdf_version_capabilities[]; + * wmi_sw_cal_ver_cap sw_cal_ver_cap[]; * A_INT32 hw_tx_power_signed[WMI_HW_TX_POWER_CAPS_MAX]; + * WMI_COEX_FIX_CHANNEL_CAPABILITIES coex_fix_channel_caps[]; * wmi_aux_dev_capabilities aux_dev_caps[]; + * wmi_enhanced_aoa_caps_param aoa_caps_param[]; + * wmi_enhanced_aoa_per_band_caps_param + * aoa_per_band_caps_param[]; + * wmi_sar_flag_tlv_param sar_flags[]; * WMI_POWER_BOOST_CAPABILITIES power_boost_capabilities[]; * WMI_RSSI_ACCURACY_IMPROVEMENT_CAPABILITIES * rssi_accuracy_improvement_capabilities[]; @@ -4833,8 +4889,13 @@ typedef struct { * 11 -> reserved * Refer to the below WMI_RSRC_CFG_FLAGS2_OPTIMIZE_POWER_GET/SET * macros. + * Bit 25 - enable recv_bcn_stats feature + * 0 -> disable the feature + * 1 -> enable the feature + * Refer to below WMI_RSRC_CFG_FLAGS2_RECV_BCN_STATS_ENABLED_GET/SET + * macros. * - * Bits 31:25 - Reserved + * Bits 31:26 - Reserved */ A_UINT32 flags2; /** @brief host_service_flags - can be used by Host to indicate @@ -4958,7 +5019,38 @@ typedef struct { * So FW will start refilling the buffers. * Refer to the below definitions of WMI_RSRC_CFG_HOST_SERVICE_FLAG * OPT_DP_CTRL_REPLENISH_REFILL_RX_BUFFER_SUPPORT_GET and _SET macros. - * Bits 31:18 - Reserved + * Bit 18 + * This bit will be set by host to inform FW that VBSS feature is + * enabled. + * Bit 19 + * This bit will set by host to inform FW that the bypass approach + * for HLOS TID OVERRIDE feature not working needs to be supported, + * So FW will start handling the PPE2TCL enqueued packets with + * flow_override set. + * Refer to the below definitions of WMI_RSRC_CFG_HOST_SERVICE_FLAG + * OPT_DP_ENABLE_BYPASS_FOR_HLOS_TID_OVERRIDE_GET and _SET macros. + * Bit 20 + * This bit will set by host to inform FW that action OUI v2 is + * enabled by both host configuration and FW capability. + * Refer to the below definitions of + * WMI_RSRC_CFG_HOST_SERVICE_FLAG_ACTION_OUI_V2_GET and SET. + * Bit 21 + * This bit will be set by host to inform FW that HW blacklist + * channel is supported in host. Based on this flag, FW will do + * CTL generation for all the IEEE channels allowed in the VLP + * and SP power for the current county and update host in the + * below WMI Events: + * WMI_REG_CHAN_LIST_CC_EXT_EVENTID, WMI_AFC_EVENTID, and + * WMI_HW_BLACKLIST_CHAN_EVENTID + * Bit 22 + * This bit will be set by host to inform FW that AFC handling + * is supported in the default cc event id. Based on this flag, + * FW will send the AFC event in the default cc event id if the + * country supports SP regulatory rules. + * Refer to the below defintions of WMI_RSRC_CFG_HOST_SERVICE_FLAG + * AFC_TRIGGER_ON_DEFAULT_CC_EVENT_GET and _SET macros. + * + * Bits 31:23 - Reserved */ A_UINT32 host_service_flags; @@ -5075,7 +5167,35 @@ typedef struct { * BIT 6 : 31 Reserved */ A_UINT32 c2c_int_type_config; + + /** + * @brief apf_data_ofld_enable + * BIT 0 -> enable/disable offload support in apf + * @detail: This flag will indicate during init time + * based on the vendor img version if APF is supporting + * any offloads. + * BIT 1 : 31 Reserved + */ + union { + A_UINT32 apf_data_ofload_enable__word; + struct { + A_UINT32 + apf_data_ofld_enable: 1, + reserved: 31; + }; + }; + /** + * @brief HAPS flags setting for power save config + * bit 0 : Enable disable haps feature + * bit 1 : Sync and update qtime cnss timestamp + * BIT 2-31: Reserved + */ + A_UINT32 dp_haps_config; } wmi_resource_config; +#define WMI_RSRC_CFG_APF_DATA_OFLD_ENABLE_GET(word32) \ + WMI_GET_BITS(word32, 0, 1) +#define WMI_RSRC_CFG_APF_DATA_OFLD_ENABLE_SET(word32, value) \ + WMI_SET_BITS(word32, 0, 1, value) #define WMI_MSDU_FLOW_AST_ENABLE_GET(msdu_flow_config0, ast_x) \ (((ast_x) == 0) ? 1 : ((msdu_flow_config0) & (1 << ((ast_x) - 1)))) @@ -5369,6 +5489,11 @@ typedef struct { #define WMI_RSRC_CFG_FLAGS2_OPTIMIZE_POWER_SET(flags2, value) \ WMI_SET_BITS(flags2, 23, 2, value) +#define WMI_RSRC_CFG_FLAGS2_RECV_BCN_STATS_ENABLED_GET(flags2) \ + WMI_GET_BITS(flags2, 25, 1) +#define WMI_RSRC_CFG_FLAGS2_RECV_BCN_STATS_ENABLED_SET(flags2, value) \ + WMI_SET_BITS(flags2, 25, 1, value) + #define WMI_RSRC_CFG_HOST_SERVICE_FLAG_NAN_IFACE_SUPPORT_GET(host_service_flags) \ WMI_GET_BITS(host_service_flags, 0, 1) @@ -5476,6 +5601,35 @@ typedef struct { #define WMI_RSRC_CFG_HOST_SERVICE_FLAG_VBSS_ENABLED_SET(host_service_flags, val) \ WMI_SET_BITS(host_service_flags, 18, 1, val) +/* + * This bit is to inform that we need to enable the bypass approach + * (for HLOS TID override feature not working in the target) + * to handle flowq creation from FW when flow override is set and + * frames are recvd from PPE2TCL. + * */ +#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_OPT_DP_ENABLE_BYPASS_FOR_HLOS_TID_OVERRIDE_GET(host_service_flags) \ + WMI_GET_BITS(host_service_flags, 19, 1) +#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_OPT_DP_ENABLE_BYPASS_FOR_HLOS_TID_OVERRIDE_SET(host_service_flags, val) \ + WMI_SET_BITS(host_service_flags, 19, 1, val) + +#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_ACTION_OUI_V2_GET(host_service_flags) \ + WMI_GET_BITS(host_service_flags, 20, 1) +#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_ACTION_OUI_V2_SET(host_service_flags, val) \ + WMI_SET_BITS(host_service_flags, 20, 1, val) + +/* This bit is used to inform FW to send HW Blacklist channels to host */ +#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_HOST_SUPPORT_HW_BLACKLIST_CHANNEL_SUPPORT_GET(host_service_flags) \ + WMI_GET_BITS(host_service_flags, 21, 1) +#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_HOST_SUPPORT_HW_BLACKLIST_CHANNEL_SUPPORT_SET(host_service_flags, val) \ + WMI_SET_BITS(host_service_flags, 21, 1, val) + +/* This bit is used to inform FW to send AFC event ID in default CC event ID */ +#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_AFC_TRIGGER_ON_DEFAULT_CC_EVENT_GET(host_service_flags) \ + WMI_GET_BITS(host_service_flags, 22, 1) +#define WMI_RSRC_CFG_HOST_SERVICE_FLAG_AFC_TRIGGER_ON_DEFAULT_CC_EVENT_SET(host_service_flags, val) \ + WMI_SET_BITS(host_service_flags, 22, 1, val) + + #define WMI_RSRC_CFG_CARRIER_CFG_CHARTER_ENABLE_GET(carrier_config) \ WMI_GET_BITS(carrier_config, 0, 1) #define WMI_RSRC_CFG_CARRIER_CFG_CHARTER_ENABLE_SET(carrier_config, val) \ @@ -5549,6 +5703,7 @@ typedef enum { WMI_VENDOR1_REQ1_VERSION_4_10 = 6, WMI_VENDOR1_REQ1_VERSION_4_20 = 7, WMI_VENDOR1_REQ1_VERSION_4_40 = 8, + WMI_VENDOR1_REQ1_VERSION_4_50 = 9, } WMI_VENDOR1_REQ1_VERSION; typedef enum { @@ -5556,6 +5711,7 @@ typedef enum { WMI_VENDOR1_REQ2_VERSION_3_01 = 1, WMI_VENDOR1_REQ2_VERSION_3_20 = 2, WMI_VENDOR1_REQ2_VERSION_3_50 = 3, + WMI_VENDOR1_REQ2_VERSION_3_61 = 4, } WMI_VENDOR1_REQ2_VERSION; typedef enum { @@ -6285,16 +6441,18 @@ typedef struct { #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 -/** pause home channel when scan channel is same as home channel */ -#define WMI_SCAN_FLAG_PAUSE_HOME_CHANNEL 0x200000 -/** - * report CCA busy for each possible 20Mhz subbands of the wideband scan channel - */ -#define WMI_SCAN_FLAG_REPORT_CCA_BUSY_FOREACH_20MHZ 0x400000 - /** for adaptive scan mode using 3 bits (21 - 23 bits) */ #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000 #define WMI_SCAN_DWELL_MODE_SHIFT 21 +/** pause home channel when scan channel is same as home channel (bit 24) */ +#define WMI_SCAN_FLAG_PAUSE_HOME_CHANNEL 0x01000000 +/** + * report CCA busy for each possible 20MHz subband of the wideband scan channel + * (bit 25) + */ +#define WMI_SCAN_FLAG_REPORT_CCA_BUSY_FOREACH_20MHZ 0x02000000 +/* Premium scan to receive higher MCS packets in scan channel */ +#define WMI_SCAN_FLAG_PREMIUM_SCAN 0x04000000 typedef enum { WMI_SCAN_DWELL_MODE_DEFAULT = 0, @@ -6313,7 +6471,11 @@ typedef enum { #define WMI_SCAN_GET_DWELL_MODE(flag) \ (((flag) & WMI_SCAN_DWELL_MODE_MASK) >> WMI_SCAN_DWELL_MODE_SHIFT) -/** WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK */ +/** + * WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK + * This bitmask is used to set/get values of req_type variable in + * wmi_stop_scan_cmd_fixed_param. + */ #define WMI_SCAN_CLASS_MASK 0xFF000000 /* @@ -9943,6 +10105,9 @@ typedef enum { /* To enable/disable DFS radar detection for scan radio */ WMI_PDEV_PARAM_ENABLE_SCAN_RADIO_DFS, + + /* configure CCE rules based on ethertype match */ + WMI_PDEV_PARAM_CONFIG_CUSTOM_CCE_RULE, } WMI_PDEV_PARAM; #define WMI_PDEV_ONLY_BSR_TRIG_IS_ENABLED(trig_type) WMI_GET_BITS(trig_type, 0, 1) @@ -10027,6 +10192,8 @@ typedef enum { #define WMI_PDEV_UPPER_CAP_DL_DIR_SET(_value, value) WMI_SET_BITS(_value, 18, 1, value) #define WMI_PDEV_UPPER_CAP_UL_DIR_GET(value) WMI_GET_BITS(value, 19, 1) #define WMI_PDEV_UPPER_CAP_UL_DIR_SET(_value, value) WMI_SET_BITS(_value, 19, 1, value) +#define WMI_PDEV_UPPER_CAP_DIR_GET(value) WMI_GET_BITS(value, 18, 1) +#define WMI_PDEV_UPPER_CAP_DIR_SET(_value, value) WMI_SET_BITS(_value, 18, 1, value) #define WMI_PDEV_RATE_DROP_NUM_MCS_GET(value) WMI_GET_BITS(value, 0, 8) #define WMI_PDEV_RATE_DROP_NUM_MCS_SET(_value, value) WMI_SET_BITS(_value, 0, 8, value) @@ -10600,6 +10767,16 @@ typedef struct { */ } wmi_pdev_tpc_config_event_fixed_param; + +typedef enum { + WMI_ASD_PRIMARY_ANT = 0, + WMI_ASD_DIVERSITY_ANT = 1, + WMI_ASD_THIRD_ANT = 2, + WMI_ASD_FOURTH_ANT = 3, + + WMI_ASD_MAX_ANTTYPE = 4 +} WMI_ASD_ANT_TYPE; + typedef struct { /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_div_rssi_antid_event_fixed_param */ A_UINT32 tlv_header; @@ -10613,6 +10790,17 @@ typedef struct { wmi_mac_addr macaddr; /* EVM value for stream0 and stream1 20Mhz, dB units */ A_INT32 chain_evm[WMI_MAX_CHAINS]; + /** num_antennas_valid: + * how many elements in the WMI_ASD_MAX_ANTTYPE arrays below + * contain valid info + */ + A_UINT32 num_antennas_valid; + /** switch count on each antenna attached to each chain */ + A_UINT32 ant_cnt[WMI_MAX_CHAINS][WMI_ASD_MAX_ANTTYPE]; + /** stay duration on each antenna attached to each chain (units: ms) */ + A_UINT32 ant_dur[WMI_MAX_CHAINS][WMI_ASD_MAX_ANTTYPE]; + /** RSSI on each antenna attached to each chain in dbm */ + A_INT32 ant_rssi[WMI_MAX_CHAINS][WMI_ASD_MAX_ANTTYPE]; } wmi_pdev_div_rssi_antid_event_fixed_param; typedef struct { @@ -11054,6 +11242,7 @@ typedef enum { WMI_REQUEST_VDEV_EXTD_STAT = 0x10000, WMI_REQUEST_PDEV_EXTD_STAT = 0x20000, WMI_REQUEST_PDEV_TELEMETRY_STAT = 0x40000, + WMI_REQUEST_VDEV_RECV_BCN_STAT = 0x80000, } wmi_stats_id; /* @@ -12044,6 +12233,10 @@ typedef struct { * wmi_pdev_telemetry_stats wmi_pdev_telemetry_stats[] * follows the other TLVs */ +/* If WMI_REQUEST_VDEV_RECV_BCN_STAT is set in stats_id, then TLV + * wmi_recv_bcn_stats wmi_recv_bcn_stats[] + * follows the other TLVs + */ } wmi_stats_event_fixed_param; /* WLAN channel CCA stats bitmap */ @@ -12545,8 +12738,20 @@ typedef struct { * * b'31-b'29 unused / reserved * b'28 indicate the version of rate-code (1 = RATECODE_V1) - * b'27-b'11 unused / reserved - * b'10-b'8 indicate the preamble (0 OFDM, 1 CCK, 2 HT, 3 VHT) + * b'27 unused / reserved + * b'26-b'19 indicate TX power (int8), with 0.25 dBm units + * b'15-b'14 indicate punctured mode as follows: + * 0: NO_PUNCTURE + * 1: PUNCTURED_20MHZ + * 2: PUNCTURED_40MHZ + * 3: PUNCTURED_80MHZ + * 4: PUNCTURED_120MHZ + * b'15-b'14 indicate the guard interval: + * 0: 800us, 1: 400us, 2: 1600us, 3: 3200us + * b'13-b'11 indicate the bandwidth: + * 0: 20MHz, 1: 40MHz, 2: 80MHz, 3: 160MHz, 4: 320MHz + * b'10-b'8 indicate the preamble: + * 0: OFDM, 1: CCK, 2: HT, 3: VHT, 4: HE, 5: EHT * b'7-b'5 indicate the NSS (0 - 1x1, 1 - 2x2, 2 - 3x3, 3 - 4x4) * b'4-b'0 indicate the rate, which is indicated as follows: * OFDM : 0: OFDM 48 Mbps @@ -12569,6 +12774,9 @@ typedef struct { * 0..7: MCS0..MCS7 (HT) * 0..9: MCS0..MCS9 (11AC VHT) * 0..11: MCS0..MCS11 (11AX VHT) + * HE/EHT (pream == 4/5) + * 0..13: MCS0..MCS13 (11AX EHT) + * 14..15: MCS14..MCS15 (EHT) */ /** rate-code of the last transmission */ A_UINT32 last_tx_rate_code; @@ -12692,224 +12900,240 @@ typedef struct { * number of vdev active count * (WMI_PDEV_STATS_VDEV_UP_CNT_SET,GET) */ - A_UINT32 opaque_debug_num_macs_phy_vdev_up_active; - /** refer wlan_pdev ic flags */ - A_UINT32 opaque_debug_ic_flags; - /** vdev_id that are paused per pdev */ - A_UINT32 opaque_debug_paused_ap_vdev_bitmap; - /** opaque_debug_flags: - * refer to WLAN_PS_DESC_BIN_HWM_HIT or WLAN_PS_DESC_BIN_LWM_HIT - */ - A_UINT32 opaque_debug_flags; - /** wlan_pdev fields remote_peer_cnt, max_rf_chains_2G and max_rf_chains_5G - * remote_peer_cnt_max_rf_chains_2G_5G: - * This word contains the following bitfields: - * max chains supported in the 2.4 GHz band - * (WMI_PDEV_STATS_MAX_RF_CHAIN_2G_SET,GET) - * max chains supported in the 5 GHz band, - * (WMI_PDEV_STATS_MAX_RF_CHAIN_5G_SET,GET) - * number of remote peers - * (WMI_PDEV_STATS_REMOTE_PEER_CNT_SET,GET) - */ - A_UINT32 opaque_debug_remote_peer_cnt_max_rf_chains_2G_5G; - /** wlan_pdev max HT Capability info, WMI_HT_CAP defines */ - A_UINT32 opaque_debug_max_ht_cap_info; - /** wlan_pdev max VHT capability info, WMI_VHT_CAP defines */ - A_UINT32 opaque_debug_max_vht_cap_info; - /** opaque_debug_max_vht_supp_mcs: - * wlan_pdev max VHT Supported MCS which is - * vht_supp_mcs_2G or vht_supp_mcs_5G - */ - A_UINT32 opaque_debug_max_vht_supp_mcs; - /** wlan_pdev max HE capability info, WMI_HE_CAP defines */ - A_UINT32 opaque_debug_max_he_cap_info; - A_UINT32 opaque_debug_max_he_cap_info_ext; - /** the nominal chain mask for transmit */ - A_UINT32 opaque_debug_tx_chain_mask; - /** the nominal chain mask for receive */ - A_UINT32 opaque_debug_rx_chain_mask; - /** opaque_debug_ema_flags: - * This word contains the following bitfields: - * ema_flags: ema_max_vap_cnt and ema_max_profile_period from wlan_pdev - * ema_max_vap_cnt- number of maximum EMA Tx vaps (VAPs having both - * VDEV_FLAGS_EMA_MODE and VDEV_FLAGS_TRANSMIT_AP set) - * (WMI_PDEV_STATS_EMA_MAX_VAP_CNT_SET,GET) - * ema_max_profile_period - maximum profile periodicity - * (maximum number of beacons after which VAP profiles repeat) - * for any EMA VAP on any pdev. - * (WMI_PDEV_STATS_EMA_MAX_PROFILE_PERIOD_SET,GET) - */ - A_UINT32 opaque_debug_ema_flags; - /** wlan_pdev - maximum ML peers supported */ - A_UINT32 opaque_debug_num_ml_peer_entries; - /** This word contains the following bitfields: - * wlan_pdev fields - num_max_hw_links, current_chip_id and max_num_chips - * (related to MLO) - * Max number of HW links - * (WMI_PDEV_STATS_NUM_MAX_HW_LINKS_SET,GET) - * Current Chip Id - * (WMI_PDEV_STATS_CURRENT_CHIP_ID_SET,GET) - * Max number of chips - * (WMI_PDEV_STATS_MAX_NUM_CHIPS_SET,GET) - */ - A_UINT32 opaque_debug_mlo_flags; - /** Indicate beacon size in bytes */ - A_UINT32 opaque_debug_large_bcn_size; - /** proposed by the host value of MSDUQs per each LinkView peer's TID */ - A_UINT32 opaque_debug_num_of_linkview_msduqs_per_tid; - /** bcn_filter_context variables */ - A_UINT32 opaque_debug_bcns_dropped; - A_UINT32 opaque_debug_bcns_recvd; - A_UINT32 opaque_debug_bcns_delivered; - /** Tids that are paused/unpaused based on module_id */ - A_UINT32 opaque_debug_vdev_all_tid_pause_bitmap; - /** Tids that are blocked/unblocked based on module_id */ - A_UINT32 opaque_debug_vdev_all_tid_block_bitmap; - /** wal_pdev rx filter, WAL_RX_FILTER_FLAGS defines */ - A_UINT32 opaque_debug_rx_filter; - /** This word contains the following bitfields: - * aggr_nonaggr_retry_th: - * wal_pdev fields - agg_retry_th and non_agg_retry_th - * This value holds max retry threshold up to which a Data packet - * will be retried when ack is not received. - * agg_retry_th - Threshold value used when aggregation is enabled - * (WMI_PDEV_STATS_AGG_RETRY_TH_SET,GET) - * non_agg_retry_th - Threshold value used for non-aggregation. - * (WMI_PDEV_STATS_NON_AGG_RETRY_TH_SET) - */ - A_UINT32 opaque_debug_aggr_nonaggr_retry_th; - /** This word contains the following bitfields: - * num_max_rx_ba_sessions: - * Number of rx BA session establised - * (WMI_PDEV_STATS_NUM_RX_BA_SESSIONS_SET,GET) - * Max number of rx BA session from wal_pdev - * (WMI_PDEV_STATS_MAX_RX_BA_SESSIONS_SET,GET) - */ - A_UINT32 opaque_debug_num_max_rx_ba_sessions; - /** It holds WHAL_CHANNEL_SWITCH_FLAGS values */ - A_UINT32 opaque_debug_chan_switch_flags; - /** reset_cause holds PDEV_RESET_CONSEC_FAILURE or PDEV_RESET_TXQ_TIMEOUT */ - A_UINT32 opaque_debug_consecutive_failure_reset_cause; - /** PPDU duration limit, in us */ - A_UINT32 opaque_debug_mu_ppdu_dur_limit_us; - /** pdev reset in progress */ - A_UINT32 opaque_debug_reset_in_progress; - /** wal_dev - vdev_migrate_state refer to WAL_VDEV_MIGRATE_STATE */ - A_UINT32 opaque_debug_vdev_migrate_state; - /** opaque_debug_rts_rc_flag: - * wal_pdev rts ratecode - this value reflects whatever - * WMI_PDEV_PARAM_RTS_FIXED_RATE value the host has specified for the pdev. - */ - A_UINT32 opaque_debug_rts_rc_flag; - /* Num of peer delete in progress */ - A_UINT32 opaque_debug_num_of_peer_delete_in_progress; - /** wal_pdev total number of active vdev count */ - A_UINT32 opaque_debug_total_active_vdev_cnt; - /** wal_pdev - max number of vdevs per pdev */ - A_UINT32 opaque_debug_max_vdevs; - /* NonOccupancyList(NOL) context */ - A_UINT32 opaque_debug_dfs_nol_count; - /** NOL timeout in seconds */ - A_UINT32 opaque_debug_dfs_nol_timeout; - A_UINT32 opaque_debug_dfs_use_nol; - /** channel availability check mode, refer enum WMI_ADFS_OCAC_MODE */ - A_UINT32 opaque_debug_cac_mode; - A_UINT32 opaque_debug_dyn_ppdu_dur; /* in ms */ - /** This word contains the following bitfields: - * wal_pdev home channel info - * home_chan_mhz_flags: - * primary channel frequency in mhz - * (WMI_PDEV_STATS_HOME_CHAN_MHZ_SET,GET) - * flags to specify other channel attributes - * (WMI_PDEV_STATS_HOME_CHAN_FLAGS_SET, GET) - */ - A_UINT32 opaque_debug_home_chan_mhz_flags; - /** home channel center frequency in MHz */ - A_UINT32 opaque_debug_home_band_center_freq; - /** home channel phy_mode, refer enum WLAN_PHY_MODE */ - A_UINT32 opaque_debug_home_phy_mode; - /** This word contains the following bitfields: - * wal_pdev current channel info - * cur_chan_mhz_flags: - * primary channel frequency in mhz - * (WMI_PDEV_STATS_CUR_CHAN_MHZ_SET,GET) - * flags to specify other channel attributes - * (WMI_PDEV_STATS_CUR_CHAN_FLAGS_SET,GET) - */ - A_UINT32 opaque_debug_cur_chan_mhz_flags; - /** current channel center frequency in MHz */ - A_UINT32 opaque_debug_cur_band_center_freq; - /** current channel phy_mode, refer enum WLAN_PHY_MODE */ - A_UINT32 opaque_debug_cur_phy_mode; - /* Beacon context info */ - A_UINT32 opaque_debug_bcn_q_num_bcns_queued_to_hw; - /** beacon queue AIFS */ - A_UINT32 opaque_debug_aifs; - /** beacon queue cwmin */ - A_UINT32 opaque_debug_cwmin; - /** beacon queue cwmax */ - A_UINT32 opaque_debug_cwmax; - /** FILS discovery period in TU */ - A_UINT32 opaque_debug_fils_period; - /** Beacon interval in TU */ - A_UINT32 opaque_debug_beacon_period; - A_UINT32 opaque_debug_staggered_beacon_intvl; - /** wal_pdev tx context, refer enum WAL_TX_CTXT_FLAGS */ - A_UINT32 opaque_debug_tx_ctxt_flags; - /** opaque_debug_burst_mode_pending_isr - * wal_pdev tx_ctxt fields - burst_mode refer enum WAL_TX_BURST_MODE - * and pending_isr_status count - */ - A_UINT32 opaque_debug_burst_mode_pending_isr; - /** max burst duration from ppdu duration in us */ - A_UINT32 opaque_debug_burst_dur; - /** counter for tx hw stuck */ - A_UINT32 opaque_debug_tx_hw_stuck_cnt; - /** counter for tx consecutive lifetime expiry */ - A_UINT32 opaque_debug_consecutive_lifetime_expiries; - /** wal_pdev rx context, refer enum WAL_RX_CTXT_FLAGS */ - A_UINT32 opaque_debug_rx_ctxt_flags; - /** wal_pdev fields in rx context for rx_suspend or resume count */ - A_UINT32 opaque_debug_rx_suspend_cnt; - A_UINT32 opaque_debug_rx_resume_cnt; - A_UINT32 opaque_debug_rx_pcie_suspend_cnt; - A_UINT32 opaque_debug_rx_pcie_resume_cnt; - /** This word contains the following bitfields: - * wal_pdev fields - * pdev paused - WMI_PDEV_STATS_PAUSED_SET,GET - * pdev suspend - WMI_PDEV_STATS_SUSPENDED_SET,GET - * cac_enabed - MI_PDEV_STATS_CAC_ENABLED_SET,GET - * monitor VAP present - WMI_PDEV_STATS_IS_MONITOR_TYPE_PRESENT_SET,GET - * beacon tx mode - WMI_PDEV_STATS_BCN_TX_MODE_SET,GET - * isTXsuspended - WMI_PDEV_STATS_IS_TXSUSPENDED_SET,GET - * isSCHEDsuspended - WMI_PDEV_STATS_IS_SCHEDSUSPENDED_SET,GET - * sched_algo_resume_needed - - * WMI_PDEV_STATS_SCHED_ALGO_RESUME_NEEDED_SET,GET - * abort_reason - WMI_PDEV_STATS_ABORT_REASON_SET,GET - * atf_cfg - WMI_PDEV_STATS_ATF_CONFIG_SET,GET - * Green AP TX chainmask valid - WMI_PDEV_STATS_GAP_TX_CH_MASK_VALID_SET,GET - * Green AP RX chainmask valid - WMI_PDEV_STATS_GAP_RX_CH_MASK_VALID_SET,GET - * Green AP Phy mode valid - WMI_PDEV_STATS_GAP_PHY_MODE_VALID_SET,GET - * burst_enable - WMI_PDEV_STATS_BURST_ENABLE_SET,GET - */ - A_UINT32 opaque_debug_wal_pdev_bitfield; - /** This word contains the following bitfields: - * gap_phy_mode_freq: - * When GreenAP is enabled, phy_mode (WMI_PDEV_STATS_GAP_PHY_MODE_SET,GET) - * and center freq(MHz) (WMI_PDEV_STATS_GAP_BAND_CENTER_FREQ1_SET,GET) - * in GAP context is displayed - */ - A_UINT32 opaque_debug_gap_phy_mode_freq; - /** - * The following 5 opaque_debug_reserved_field variables are provided - * purely for debugging by technicians who have outside knowledge of - * what kind of values the target has placed into these fields. - */ - A_UINT32 opaque_debug_reserved_field_1; - A_UINT32 opaque_debug_reserved_field_2; - A_UINT32 opaque_debug_reserved_field_3; - A_UINT32 opaque_debug_reserved_field_4; - A_UINT32 opaque_debug_reserved_field_5; + A_UINT32 opaque_debug_num_macs_phy_vdev_up_active; + /** refer wlan_pdev ic flags */ + A_UINT32 opaque_debug_ic_flags; + /** vdev_id that are paused per pdev */ + A_UINT32 opaque_debug_paused_ap_vdev_bitmap; + /** opaque_debug_flags: + * refer to WLAN_PS_DESC_BIN_HWM_HIT or WLAN_PS_DESC_BIN_LWM_HIT + */ + A_UINT32 opaque_debug_flags; + /** wlan_pdev fields remote_peer_cnt, max_rf_chains_2G and max_rf_chains_5G + * remote_peer_cnt_max_rf_chains_2G_5G: + * This word contains the following bitfields: + * max chains supported in the 2.4 GHz band + * (WMI_PDEV_STATS_MAX_RF_CHAIN_2G_SET,GET) + * max chains supported in the 5 GHz band, + * (WMI_PDEV_STATS_MAX_RF_CHAIN_5G_SET,GET) + * number of remote peers + * (WMI_PDEV_STATS_REMOTE_PEER_CNT_SET,GET) + */ + A_UINT32 opaque_debug_remote_peer_cnt_max_rf_chains_2G_5G; + /** wlan_pdev max HT Capability info, WMI_HT_CAP defines */ + A_UINT32 opaque_debug_max_ht_cap_info; + /** wlan_pdev max VHT capability info, WMI_VHT_CAP defines */ + A_UINT32 opaque_debug_max_vht_cap_info; + /** opaque_debug_max_vht_supp_mcs: + * wlan_pdev max VHT Supported MCS which is + * vht_supp_mcs_2G or vht_supp_mcs_5G + */ + A_UINT32 opaque_debug_max_vht_supp_mcs; + /** wlan_pdev max HE capability info, WMI_HE_CAP defines */ + A_UINT32 opaque_debug_max_he_cap_info; + A_UINT32 opaque_debug_max_he_cap_info_ext; + /** the nominal chain mask for transmit */ + A_UINT32 opaque_debug_tx_chain_mask; + /** the nominal chain mask for receive */ + A_UINT32 opaque_debug_rx_chain_mask; + /** opaque_debug_ema_flags: + * This word contains the following bitfields: + * ema_flags: ema_max_vap_cnt and ema_max_profile_period from wlan_pdev + * ema_max_vap_cnt- number of maximum EMA Tx vaps (VAPs having both + * VDEV_FLAGS_EMA_MODE and VDEV_FLAGS_TRANSMIT_AP set) + * (WMI_PDEV_STATS_EMA_MAX_VAP_CNT_SET,GET) + * ema_max_profile_period - maximum profile periodicity + * (maximum number of beacons after which VAP profiles repeat) + * for any EMA VAP on any pdev. + * (WMI_PDEV_STATS_EMA_MAX_PROFILE_PERIOD_SET,GET) + */ + A_UINT32 opaque_debug_ema_flags; + /** wlan_pdev - maximum ML peers supported */ + A_UINT32 opaque_debug_num_ml_peer_entries; + /** This word contains the following bitfields: + * wlan_pdev fields - num_max_hw_links, current_chip_id and max_num_chips + * (related to MLO) + * Max number of HW links + * (WMI_PDEV_STATS_NUM_MAX_HW_LINKS_SET,GET) + * Current Chip Id + * (WMI_PDEV_STATS_CURRENT_CHIP_ID_SET,GET) + * Max number of chips + * (WMI_PDEV_STATS_MAX_NUM_CHIPS_SET,GET) + */ + A_UINT32 opaque_debug_mlo_flags; + /** Indicate beacon size in bytes */ + A_UINT32 opaque_debug_large_bcn_size; + /** proposed by the host value of MSDUQs per each LinkView peer's TID */ + A_UINT32 opaque_debug_num_of_linkview_msduqs_per_tid; + /** bcn_filter_context variables */ + A_UINT32 opaque_debug_bcns_dropped; + A_UINT32 opaque_debug_bcns_recvd; + A_UINT32 opaque_debug_bcns_delivered; + /** + * Lower 32 bits bitmap of pause ids for TIDs that are paused/unpaused + * based on module_id. + */ + A_UINT32 opaque_debug_vdev_all_tid_pause_bitmap; + /** + * Lower 32 bits bitmap of pause ids for TIDs that are blocked/unblocked + * based on module_id. + */ + A_UINT32 opaque_debug_vdev_all_tid_block_bitmap; + /** wal_pdev rx filter, WAL_RX_FILTER_FLAGS defines */ + A_UINT32 opaque_debug_rx_filter; + /** This word contains the following bitfields: + * aggr_nonaggr_retry_th: + * wal_pdev fields - agg_retry_th and non_agg_retry_th + * This value holds max retry threshold up to which a Data packet + * will be retried when ack is not received. + * agg_retry_th - Threshold value used when aggregation is enabled + * (WMI_PDEV_STATS_AGG_RETRY_TH_SET,GET) + * non_agg_retry_th - Threshold value used for non-aggregation. + * (WMI_PDEV_STATS_NON_AGG_RETRY_TH_SET) + */ + A_UINT32 opaque_debug_aggr_nonaggr_retry_th; + /** This word contains the following bitfields: + * num_max_rx_ba_sessions: + * Number of rx BA session establised + * (WMI_PDEV_STATS_NUM_RX_BA_SESSIONS_SET,GET) + * Max number of rx BA session from wal_pdev + * (WMI_PDEV_STATS_MAX_RX_BA_SESSIONS_SET,GET) + */ + A_UINT32 opaque_debug_num_max_rx_ba_sessions; + /** It holds WHAL_CHANNEL_SWITCH_FLAGS values */ + A_UINT32 opaque_debug_chan_switch_flags; + /** reset_cause holds PDEV_RESET_CONSEC_FAILURE or PDEV_RESET_TXQ_TIMEOUT */ + A_UINT32 opaque_debug_consecutive_failure_reset_cause; + /** PPDU duration limit, in us */ + A_UINT32 opaque_debug_mu_ppdu_dur_limit_us; + /** pdev reset in progress */ + A_UINT32 opaque_debug_reset_in_progress; + /** wal_dev - vdev_migrate_state refer to WAL_VDEV_MIGRATE_STATE */ + A_UINT32 opaque_debug_vdev_migrate_state; + /** opaque_debug_rts_rc_flag: + * wal_pdev rts ratecode - this value reflects whatever + * WMI_PDEV_PARAM_RTS_FIXED_RATE value the host has specified for the pdev. + */ + A_UINT32 opaque_debug_rts_rc_flag; + /* Num of peer delete in progress */ + A_UINT32 opaque_debug_num_of_peer_delete_in_progress; + /** wal_pdev total number of active vdev count */ + A_UINT32 opaque_debug_total_active_vdev_cnt; + /** wal_pdev - max number of vdevs per pdev */ + A_UINT32 opaque_debug_max_vdevs; + /* NonOccupancyList(NOL) context */ + A_UINT32 opaque_debug_dfs_nol_count; + /** NOL timeout in seconds */ + A_UINT32 opaque_debug_dfs_nol_timeout; + A_UINT32 opaque_debug_dfs_use_nol; + /** channel availability check mode, refer enum WMI_ADFS_OCAC_MODE */ + A_UINT32 opaque_debug_cac_mode; + A_UINT32 opaque_debug_dyn_ppdu_dur; /* in ms */ + /** This word contains the following bitfields: + * wal_pdev home channel info + * home_chan_mhz_flags: + * primary channel frequency in mhz + * (WMI_PDEV_STATS_HOME_CHAN_MHZ_SET,GET) + * flags to specify other channel attributes + * (WMI_PDEV_STATS_HOME_CHAN_FLAGS_SET, GET) + */ + A_UINT32 opaque_debug_home_chan_mhz_flags; + /** home channel center frequency in MHz */ + A_UINT32 opaque_debug_home_band_center_freq; + /** home channel phy_mode, refer enum WLAN_PHY_MODE */ + A_UINT32 opaque_debug_home_phy_mode; + /** This word contains the following bitfields: + * wal_pdev current channel info + * cur_chan_mhz_flags: + * primary channel frequency in mhz + * (WMI_PDEV_STATS_CUR_CHAN_MHZ_SET,GET) + * flags to specify other channel attributes + * (WMI_PDEV_STATS_CUR_CHAN_FLAGS_SET,GET) + */ + A_UINT32 opaque_debug_cur_chan_mhz_flags; + /** current channel center frequency in MHz */ + A_UINT32 opaque_debug_cur_band_center_freq; + /** current channel phy_mode, refer enum WLAN_PHY_MODE */ + A_UINT32 opaque_debug_cur_phy_mode; + /* Beacon context info */ + A_UINT32 opaque_debug_bcn_q_num_bcns_queued_to_hw; + /** beacon queue AIFS */ + A_UINT32 opaque_debug_aifs; + /** beacon queue cwmin */ + A_UINT32 opaque_debug_cwmin; + /** beacon queue cwmax */ + A_UINT32 opaque_debug_cwmax; + /** FILS discovery period in TU */ + A_UINT32 opaque_debug_fils_period; + /** Beacon interval in TU */ + A_UINT32 opaque_debug_beacon_period; + A_UINT32 opaque_debug_staggered_beacon_intvl; + /** wal_pdev tx context, refer enum WAL_TX_CTXT_FLAGS */ + A_UINT32 opaque_debug_tx_ctxt_flags; + /** opaque_debug_burst_mode_pending_isr + * wal_pdev tx_ctxt fields - burst_mode refer enum WAL_TX_BURST_MODE + * and pending_isr_status count + */ + A_UINT32 opaque_debug_burst_mode_pending_isr; + /** max burst duration from ppdu duration in us */ + A_UINT32 opaque_debug_burst_dur; + /** counter for tx hw stuck */ + A_UINT32 opaque_debug_tx_hw_stuck_cnt; + /** counter for tx consecutive lifetime expiry */ + A_UINT32 opaque_debug_consecutive_lifetime_expiries; + /** wal_pdev rx context, refer enum WAL_RX_CTXT_FLAGS */ + A_UINT32 opaque_debug_rx_ctxt_flags; + /** wal_pdev fields in rx context for rx_suspend or resume count */ + A_UINT32 opaque_debug_rx_suspend_cnt; + A_UINT32 opaque_debug_rx_resume_cnt; + A_UINT32 opaque_debug_rx_pcie_suspend_cnt; + A_UINT32 opaque_debug_rx_pcie_resume_cnt; + /** This word contains the following bitfields: + * wal_pdev fields + * pdev paused - WMI_PDEV_STATS_PAUSED_SET,GET + * pdev suspend - WMI_PDEV_STATS_SUSPENDED_SET,GET + * cac_enabed - MI_PDEV_STATS_CAC_ENABLED_SET,GET + * monitor VAP present - WMI_PDEV_STATS_IS_MONITOR_TYPE_PRESENT_SET,GET + * beacon tx mode - WMI_PDEV_STATS_BCN_TX_MODE_SET,GET + * isTXsuspended - WMI_PDEV_STATS_IS_TXSUSPENDED_SET,GET + * isSCHEDsuspended - WMI_PDEV_STATS_IS_SCHEDSUSPENDED_SET,GET + * sched_algo_resume_needed - + * WMI_PDEV_STATS_SCHED_ALGO_RESUME_NEEDED_SET,GET + * abort_reason - WMI_PDEV_STATS_ABORT_REASON_SET,GET + * atf_cfg - WMI_PDEV_STATS_ATF_CONFIG_SET,GET + * Green AP TX chainmask valid- WMI_PDEV_STATS_GAP_TX_CH_MASK_VALID_SET,GET + * Green AP RX chainmask valid- WMI_PDEV_STATS_GAP_RX_CH_MASK_VALID_SET,GET + * Green AP Phy mode valid - WMI_PDEV_STATS_GAP_PHY_MODE_VALID_SET,GET + * burst_enable - WMI_PDEV_STATS_BURST_ENABLE_SET,GET + */ + A_UINT32 opaque_debug_wal_pdev_bitfield; + /** This word contains the following bitfields: + * gap_phy_mode_freq: + * When GreenAP is enabled, phy_mode (WMI_PDEV_STATS_GAP_PHY_MODE_SET,GET) + * and center freq(MHz) (WMI_PDEV_STATS_GAP_BAND_CENTER_FREQ1_SET,GET) + * in GAP context is displayed + */ + A_UINT32 opaque_debug_gap_phy_mode_freq; + /** + * The following 5 opaque_debug_reserved_field variables are provided + * purely for debugging by technicians who have outside knowledge of + * what kind of values the target has placed into these fields. + */ + A_UINT32 opaque_debug_reserved_field_1; + A_UINT32 opaque_debug_reserved_field_2; + A_UINT32 opaque_debug_reserved_field_3; + A_UINT32 opaque_debug_reserved_field_4; + A_UINT32 opaque_debug_reserved_field_5; + /** + * Upper 32 bits bitmap of pause ids for TIDs that are paused/unpaused + * based on module_id. + */ + A_UINT32 opaque_debug_vdev_all_tid_pause_bitmap_ext; + /** + * Upper 32 bits bitmap of pause ids for TIDs that are blocked/unblocked + * based on module_id. + */ + A_UINT32 opaque_debug_vdev_all_tid_block_bitmap_ext; } wmi_ctrl_path_pdev_stats_struct; #define WMI_PDEV_STATS_NUM_MACS_GET(flag) \ @@ -13444,6 +13668,7 @@ typedef enum { WMI_CTRL_PATH_STATS_CAL_TYPE_PADROOP = 0x17, WMI_CTRL_PATH_STATS_CAL_TYPE_SELFCALTPC = 0x18, WMI_CTRL_PATH_STATS_CAL_TYPE_RXSPUR = 0x19, + WMI_CTRL_PATH_STATS_CAL_TYPE_PDADC = 0x1a, /* add new cal types above this line */ WMI_CTRL_PATH_STATS_CAL_TYPE_INVALID = 0xFF @@ -13543,6 +13768,7 @@ static INLINE A_UINT8 *wmi_ctrl_path_cal_type_id_to_name(A_UINT32 cal_type_id) WMI_RETURN_STRING(WMI_CTRL_PATH_STATS_CAL_TYPE_PADROOP); WMI_RETURN_STRING(WMI_CTRL_PATH_STATS_CAL_TYPE_SELFCALTPC); WMI_RETURN_STRING(WMI_CTRL_PATH_STATS_CAL_TYPE_RXSPUR); + WMI_RETURN_STRING(WMI_CTRL_PATH_STATS_CAL_TYPE_PDADC); } return (A_UINT8 *) "WMI_CTRL_PATH_STATS_CAL_TYPE_UNKNOWN"; @@ -14364,28 +14590,28 @@ typedef struct { */ A_UINT32 opaque_debug_keyid0_ast_index; /* opaque_debug_all_tids_block_module_bitmap: - * Bitmap of block IDs requesting block of all TIDs, + * Lower 32 bits bitmap of block IDs requesting block of all TIDs, * part of wal_peer. * Refer to enum WLAN_PAUSE_ID. * This block/pause ID can be mapped to a WLAN_MODULE_ID module ID. */ A_UINT32 opaque_debug_all_tids_block_module_bitmap; /* opaque_debug_all_tids_pause_module_bitmap: - * Bitmap of pause IDs requesting block of all TIDs, + * Lower 32 bits bitmap of pause IDs requesting block of all TIDs, * part of wal_peer. * Refer to enum WLAN_PAUSE_ID. * This pause ID can be mapped to a WLAN_MODULE_ID module ID. */ A_UINT32 opaque_debug_all_tids_pause_module_bitmap; /* opaque_debug_data_tids_block_module_bitmap: - * Bitmap of block ids requesting block of data tids, + * Lower 32 bits bitmap of block ids requesting block of data tids, * part of wal_peer. * Refer to enum WLAN_PAUSE_ID. * This block/pause ID can be mapped to a WLAN_MODULE_ID module ID. */ A_UINT32 opaque_debug_data_tids_block_module_bitmap; /* opaque_debug_data_tids_pause_module_bitmap: - * Bitmap of pause ids requesting block of data tids, + * Lower 32 bits bitmap of pause ids requesting block of data tids, * part of wal_peer. * Refer to enum WLAN_PAUSE_ID. * This pause ID can be mapped to a WLAN_MODULE_ID module ID. @@ -14778,6 +15004,49 @@ typedef struct { A_UINT32 opaque_debug_field_2; A_UINT32 opaque_debug_field_3; A_UINT32 opaque_debug_field_4; + + /* ba_stats + * This word contains the following bitfields: + * bits 15:0 - ba_tx_neg_fail: Blockack Transmit Negotiation failure + * count for the all TIDs in peer. + * Use WMI_PEER_STATS_BA_TX_NEG_FAIL_SET,GET macros. + * bits 31:16 - reserved + */ + union { + A_UINT32 ba_stats__word; + struct { + A_UINT32 ba_tx_neg_fail: 16, + reserved: 16; + }; + }; + /* opaque_debug_all_tids_block_module_bitmap_ext: + * Upper 32 bits bitmap of block IDs requesting block of all TIDs, + * part of wal_peer. + * Refer to enum WLAN_PAUSE_ID. + * This block/pause ID can be mapped to a WLAN_MODULE_ID module ID. + */ + A_UINT32 opaque_debug_all_tids_block_module_bitmap_ext; + /* opaque_debug_all_tids_pause_module_bitmap_ext: + * Upper 32 bits bitmap of pause IDs requesting pause of all TIDs, + * part of wal_peer. + * Refer to enum WLAN_PAUSE_ID. + * This pause ID can be mapped to a WLAN_MODULE_ID module ID. + */ + A_UINT32 opaque_debug_all_tids_pause_module_bitmap_ext; + /* opaque_debug_data_tids_block_module_bitmap_ext: + * Upper 32 bits bitmap of block ids requesting block of data tids, + * part of wal_peer. + * Refer to enum WLAN_PAUSE_ID. + * This block/pause ID can be mapped to a WLAN_MODULE_ID module ID. + */ + A_UINT32 opaque_debug_data_tids_block_module_bitmap_ext; + /* opaque_debug_data_tids_pause_module_bitmap_ext: + * Upper 32 bits bitmap of pause ids requesting pause of data tids, + * part of wal_peer. + * Refer to enum WLAN_PAUSE_ID. + * This pause ID can be mapped to a WLAN_MODULE_ID module ID. + */ + A_UINT32 opaque_debug_data_tids_pause_module_bitmap_ext; } wmi_ctrl_path_peer_stats_struct; #define WMI_PEER_STATS_SM_MASK_SET(flag, val) \ @@ -15102,6 +15371,12 @@ typedef struct { #define WMI_PEER_STATS_RC_CHAN_FREQ_GET(flag) \ WMI_GET_BITS(flag, 16, 16) +#define WMI_PEER_STATS_PEER_BA_TX_NEG_FAIL_SET(flag, val) \ + WMI_SET_BITS(flag, 0, 16, val) +#define WMI_PEER_STATS_PEER_BA_TX_NEG_FAIL_GET(flag) \ + WMI_GET_BITS(flag, 0, 16) +/* bits 31:16 unused/reserved */ + typedef struct { /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ctrl_path_cfr_stats_struct */ @@ -15326,6 +15601,30 @@ typedef struct{ A_UINT32 estimated_air_time_per_ac; } wmi_pdev_telemetry_stats; + +#define WMI_MAX_BCN_HISTORY 10 /* max beacon history entry */ + +typedef struct { + /* Beacon real RSSI, non-averaged rssi, dBm units; -128 means invalid */ + A_INT32 bcn_rssi; + /* Beacon tsf, 0 means invalid */ + A_UINT32 bcn_tsf; + /* NOTE: + * Due to backwards-compatibility requirements, no new fields + * can be added to this struct. + */ +} wmi_bcn_his_info; + +typedef struct { + /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_recv_bcn_stats */ + A_UINT32 tlv_header; + /* Vdev id */ + A_UINT32 vdev_id; + /* Received History of last ten Beacon of the connected Bss */ + wmi_bcn_his_info bcn_history[WMI_MAX_BCN_HISTORY]; +} wmi_recv_bcn_stats; + + /** * VDEV statistics * @todo @@ -15494,9 +15793,15 @@ typedef struct { A_UINT32 opaque_debug_rx_pkt_on_channel; /* Contains the value of Target beacon transmission time offset value */ A_UINT32 opaque_debug_tbtt_offset; - /* Contains the value of tid pause bitmap of the peer from wal_vdev */ + /* + * Contains the value of lower 32 bits of tid pause bitmap of the peer + * from wal_vdev + */ A_UINT32 opaque_debug_peer_all_tid_pause_bitmap; - /* Contains the value of tid block bitmap of the peer from wal_vdev */ + /* + * Contains the value of lower 32 bits of tid block bitmap of the peer + * from wal_vdev + */ A_UINT32 opaque_debug_peer_all_tid_block_bitmap; /* Contains the value of tdls peer kickout threshold */ A_UINT32 opaque_debug_tdls_peer_kickout_th; @@ -15850,6 +16155,16 @@ typedef struct { A_UINT32 opaque_debug_field_2; A_UINT32 opaque_debug_field_3; A_UINT32 opaque_debug_field_4; + /* + * Contains the value of upper 32 bits tid pause bitmap of the peer + * from wal_vdev + */ + A_UINT32 opaque_debug_peer_all_tid_pause_bitmap_ext; + /* + * Contains the value of upper 32 bits tid block bitmap of the peer + * from wal_vdev + */ + A_UINT32 opaque_debug_peer_all_tid_block_bitmap_ext; } wmi_ctrl_path_vdev_stats_struct; @@ -16595,6 +16910,40 @@ typedef struct { A_UINT32 dot11RTSFailureCount; } wmi_ctrl_path_sta_rrm_stats_struct; +typedef struct { + /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ctrl_path_sta_dar_stats_struct */ + A_UINT32 tlv_header; + A_UINT32 vdev_id; + A_UINT32 stats_granularity; /* Possible values are listed in wmi_ctrl_path_stats_granularity enum. */ + /* transmit_pwr: + * Units are dB w.r.t. a -20 dBm reference. + * For example, if the STA's tx power is 10 dBm, the transmit_pwr field's + * value will be 30. + */ + A_UINT32 transmit_pwr; + A_UINT32 cca_busy_cnt; + A_UINT32 cycle_cnt; + /* + * For the below 8-element arrays, in case of AC-level granularity, + * only the first 4 elements of the array are populated, and are indexed + * by wmi_traffic_ac enum values. + * Otherwise, for TID level granularity all 8 elements of the array will + * be filled by FW, and are indexed by the TID value. + */ + A_UINT32 success_mpdu_tx_cnt[8]; + A_UINT32 dropped_mpdu_tx_cnt[8]; + A_UINT32 rts_success_cnt[8]; + A_UINT32 rts_fail_cnt[8]; + A_UINT32 fcs_fail_cnt[8]; /* number of rx MPDUs whose FCS check failed */ + /* ack_fail_cnt: + * number of tx MPDUs nacked within a block ack, + * or for which no block ack was received. + */ + A_UINT32 ack_fail_cnt[8]; + A_UINT32 ba_nego_fail_cnt; + A_UINT32 beacon_loss_cnt; +} wmi_ctrl_path_sta_dar_stats_struct; + typedef struct { /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ctrl_path_vdev_bcn_stats_struct */ A_UINT32 tlv_header; @@ -17050,6 +17399,8 @@ typedef struct { #define WMI_MLO_FLAGS_SET_IEEE_LINK_ID_VALID(mlo_flags, value) WMI_SET_BITS(mlo_flags, 18, 1, value) #define WMI_MLO_FLAGS_GET_IEEE_LINK_ID_VALID_PARTNER(mlo_flags) WMI_GET_BITS(mlo_flags, 19, 1) #define WMI_MLO_FLAGS_SET_IEEE_LINK_ID_VALID_PARTNER(mlo_flags, value) WMI_SET_BITS(mlo_flags, 19, 1, value) +#define WMI_MLO_FLAGS_GET_SINGLE_LINK_EMLSR_EN(mlo_flags) WMI_GET_BITS(mlo_flags, 20, 1) +#define WMI_MLO_FLAGS_SET_SINGLE_LINK_EMLSR_EN(mlo_flags, value) WMI_SET_BITS(mlo_flags, 20, 1, value) /* this structure used for passing MLO flags */ typedef struct { @@ -17081,7 +17432,8 @@ typedef struct { start_as_active:1, /* indicate link should be started in active status */ mlo_ieee_link_id_valid:1, /* indicate if the ieee_link_id in wmi_vdev_start_mlo_params is valid */ mlo_ieee_link_id_valid_partner:1, /* indicate if the ieee_link_id in wmi_partner_link_params is valid */ - unused: 12; + single_link_emlsr_en:1, /* indicate if emlsr enablement on one link is supported */ + unused: 11; }; A_UINT32 mlo_flags; }; @@ -17911,6 +18263,10 @@ typedef enum { #define WMI_HECAP_MAC_HTVHTTRIGRX_GET_D2(he_cap2) (0) #define WMI_HECAP_MAC_HTVHTTRIGRX_SET_D2(he_cap2, value) {;} +#define WMI_GET_HW_RATECODE_VERSION(_rcode) (((_rcode) >> 28) & 0x1) +#define WMI_SET_HW_RATECODE_VERSION_V1(_rcode) (((1) << 28) | (_rcode)) +#define WMI_GET_HW_RATECODE_GI_V1(_rcode) (((_rcode) >> 14) & 0x3) +#define WMI_GET_HW_RATECODE_BW_V1(_rcode) (((_rcode) >> 11) & 0x7) #define WMI_GET_HW_RATECODE_PREAM_V1(_rcode) (((_rcode) >> 8) & 0x7) #define WMI_GET_HW_RATECODE_NSS_V1(_rcode) (((_rcode) >> 5) & 0x7) #define WMI_GET_HW_RATECODE_RATE_V1(_rcode) (((_rcode) >> 0) & 0x1F) @@ -17976,6 +18332,8 @@ typedef struct { /* Target TSF value by which VDEV restart procedure should be completed in FW */ A_UINT32 target_tsf_us_lo; /* bits 31:0 */ A_UINT32 target_tsf_us_hi; /* bits 63:32 */ + A_UINT32 vdev_op_ul_nss; /* vdev operating uplink nss. 1 ~ n: 1ss ~ nss */ + A_UINT32 vdev_op_dl_nss; /* vdev operating downlink nss. 1 ~ n: 1ss ~ nss */ /* The TLVs follows this structure: * wmi_channel chan; <-- WMI channel @@ -18035,6 +18393,12 @@ enum WMI_VDEV_UP_FLAGS { WMI_VDEV_UP_FLAG_VBSS_PASSIVE = 0x00000004, }; +typedef struct{ + A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_co_located_chan_info */ + /* co-located link frequency discovered on connected ap */ + A_UINT32 link_freq; /* MHz units */ +} wmi_co_located_chan_info; + typedef struct { A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_up_cmdid_fixed_param */ /** unique id identifying the VDEV, generated by the caller */ @@ -18051,6 +18415,10 @@ typedef struct { A_UINT32 profile_num; /** flags - this is a bitwise-or combination of WMI_VDEV_UP_FLAGS values */ A_UINT32 flags; + /* The below TLVs follow this struct: + * - wmi_co_located_chan_info co_located_chan_info[]; + * Connected AP's co-located channel info + */ } wmi_vdev_up_cmd_fixed_param; typedef struct { @@ -18175,6 +18543,7 @@ typedef enum { WMI_RATE_PREAMBLE_VHT, WMI_RATE_PREAMBLE_HE, WMI_RATE_PREAMBLE_EHT, + WMI_RATE_PREAMBLE_UHR, } WMI_RATE_PREAMBLE; /** Value to disable fixed rate setting */ @@ -19308,6 +19677,14 @@ typedef enum { */ WMI_VDEV_PARAM_CONNECT_EXT_FEATURES, /* 0xC7 */ + /* Allow to tear down TWT on scan start, if corresponding INI is set */ + WMI_VDEV_PARAM_DISABLE_SCAN_START_TWT, /* 0xC8 */ + + /* + * value 0 | default value no opp | controlled from pdev level + * value 1 | disable responder for this vdev + */ + WMI_VDEV_PARAM_TWT_RESP_DISABLE, /* 0xC9 */ /*=== ADD NEW VDEV PARAM TYPES ABOVE THIS LINE === * The below vdev param types are used for prototyping, and are @@ -19474,6 +19851,13 @@ typedef enum { */ WMI_VDEV_PARAM_SET_SAP_PS_WITH_TWT, /* 0x8013 */ + /* + * Support RTT Bandwidth downgrade + * 0 - Disable RTT Bandwidth downgrade + * 1 - Enable RTT Bandwidth downgrade + */ + WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_BW_DOWNGRADE, /* 0x8014 */ + /*=== END VDEV_PARAM_PROTOTYPE SECTION ===*/ } WMI_VDEV_PARAM; @@ -20320,91 +20704,96 @@ enum wmi_sta_ps_scheme_cfg { WMI_STA_PS_OPM_CONSERVATIVE = 0, WMI_STA_PS_OPM_AGGRESSIVE = 1, WMI_STA_PS_USER_DEF = 2, + WMI_STA_PS_LATENCY_DEF = 3, }; enum wmi_sta_powersave_param { -/** - * Controls how frames are retrievd from AP while STA is sleeping - * - * (see enum wmi_sta_ps_param_rx_wake_policy) - */ -WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, + /** + * Controls how frames are retrievd from AP while STA is sleeping + * + * (see enum wmi_sta_ps_param_rx_wake_policy) + */ + WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, -/** - * The STA will go active after this many TX - * - * (see enum wmi_sta_ps_param_tx_wake_threshold) - */ -WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, + /** + * The STA will go active after this many TX + * + * (see enum wmi_sta_ps_param_tx_wake_threshold) + */ + WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, -/** - * Number of PS-Poll to send before STA wakes up - * - * (see enum wmi_sta_ps_param_pspoll_count) - * - */ -WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, + /** + * Number of PS-Poll to send before STA wakes up + * + * (see enum wmi_sta_ps_param_pspoll_count) + * + */ + WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, -/** - * TX/RX inactivity time in msec before going to sleep. - * - * The power save SM will monitor tx/rx activity on the VDEV, if no - * activity for the specified msec of the parameter the Power save SM will - * go to sleep. - */ -WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, + /** + * TX/RX inactivity time in msec before going to sleep. + * + * The power save SM will monitor tx/rx activity on the VDEV, if no + * activity for the specified msec of the parameter the Power save SM will + * go to sleep. + */ + WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, -/** - * Set uapsd configuration. - * - * (see enum wmi_sta_ps_param_uapsd) - */ -WMI_STA_PS_PARAM_UAPSD = 4, + /** + * Set uapsd configuration. + * + * (see enum wmi_sta_ps_param_uapsd) + */ + WMI_STA_PS_PARAM_UAPSD = 4, -/** - * Number of PS-Poll to send before STA wakes up in QPower Mode - */ -WMI_STA_PS_PARAM_QPOWER_PSPOLL_COUNT = 5, + /** + * Number of PS-Poll to send before STA wakes up in QPower Mode + */ + WMI_STA_PS_PARAM_QPOWER_PSPOLL_COUNT = 5, -/** - * Enable OPM - */ -WMI_STA_PS_ENABLE_QPOWER = 6, - WMI_STA_PS_ENABLE_OPM = WMI_STA_PS_ENABLE_QPOWER, /* alias */ + /** + * Enable OPM + */ + WMI_STA_PS_ENABLE_QPOWER = 6, + WMI_STA_PS_ENABLE_OPM = WMI_STA_PS_ENABLE_QPOWER, /* alias */ -/** - * Number of TX frames before the entering the Active state - */ -WMI_STA_PS_PARAM_QPOWER_MAX_TX_BEFORE_WAKE = 7, + /** + * Number of TX frames before the entering the Active state + */ + WMI_STA_PS_PARAM_QPOWER_MAX_TX_BEFORE_WAKE = 7, -/** - * QPower SPEC PSPOLL interval - */ -WMI_STA_PS_PARAM_QPOWER_SPEC_PSPOLL_WAKE_INTERVAL = 8, + /** + * QPower SPEC PSPOLL interval + */ + WMI_STA_PS_PARAM_QPOWER_SPEC_PSPOLL_WAKE_INTERVAL = 8, -/** - * Max SPEC PSPOLL to be sent when the PSPOLL response has - * no-data bit set - */ -WMI_STA_PS_PARAM_QPOWER_SPEC_MAX_SPEC_NODATA_PSPOLL = 9, + /** + * Max SPEC PSPOLL to be sent when the PSPOLL response has + * no-data bit set + */ + WMI_STA_PS_PARAM_QPOWER_SPEC_MAX_SPEC_NODATA_PSPOLL = 9, -/** - * Max value of ITO reset when there is no tx-rx - * after AP has set the TIM bit - */ -WMI_STA_PS_PARAM_MAX_RESET_ITO_COUNT_ON_TIM_NO_TXRX = 10, + /** + * Max value of ITO reset when there is no tx-rx + * after AP has set the TIM bit + */ + WMI_STA_PS_PARAM_MAX_RESET_ITO_COUNT_ON_TIM_NO_TXRX = 10, -/** - * Flag to enable/disable Powersave Optimization - * in WOW - */ -WMI_STA_PS_PARAM_ENABLE_PS_OPT_IN_WOW = 11, + /** + * Flag to enable/disable Powersave Optimization + * in WOW + */ + WMI_STA_PS_PARAM_ENABLE_PS_OPT_IN_WOW = 11, -/** - * Speculative interval in ms - */ -WMI_STA_PS_PARAM_SPEC_WAKE_INTERVAL = 12, + /** + * Speculative interval in ms + */ + WMI_STA_PS_PARAM_SPEC_WAKE_INTERVAL = 12, + /** + * Value determines the ITO level to apply + */ + WMI_STA_PS_PARAM_ITO_LEVEL = 13, }; typedef struct { @@ -20920,6 +21309,9 @@ typedef struct { wmi_mlo_flags mlo_flags; /* only mlo enable flag need by STA mode peer create */ } wmi_peer_create_mlo_params; +#define WMI_PEER_CREATE_GET_HW_PEER_ID_VALID(flags) WMI_GET_BITS(flags,0,1) +#define WMI_PEER_CREATE_SET_HW_PEER_ID_VALID(flags) WMI_SET_BITS(flags,0,1,value) + typedef struct { A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_peer_create_cmd_fixed_param */ /** unique id identifying the VDEV, generated by the caller */ @@ -20928,7 +21320,19 @@ typedef struct { wmi_mac_addr peer_macaddr; /** peer type: see enum values above */ A_UINT32 peer_type; -/* The TLVs follows this structure: + /** Peer create flags */ + union { + struct { + A_UINT32 hw_peer_id_valid :1, + reserved :31; + }; + A_UINT32 flags; + }; + /** Global sw peer id, valid only if non-zero */ + A_UINT32 sw_peer_id; + /** Global hardware id, valid only if hw_peer_id_valid is set */ + A_UINT32 hw_peer_id; +/* The TLVs follow this structure: * wmi_peer_create_mlo_params mlo_params[]; <-- MLO flags on peer_create * Optional TLV, only present for MLO peers. * If the peer is non-MLO, the array length should be 0. @@ -21406,10 +21810,15 @@ typedef struct { #define WMI_PEER_PARAM_UL_OFDMA_RTD 0x2B /* - * Send unsolicited probe response to a connected STA. - * 0: Send immediately and stop. - * XX: Send every XX ms continuously. - * 0xFFFFFFFF: Stop sending immediately. + * Count and Interval to send unsolicited probe response to a connected STA. + * BIT 0-23 - Interval (in us) + * BIT 24-31 - Count (Number of probe response frame to send) + * + * Count : 0 - Stop sending immediately. + * Count : 1-254 - Send a probe response periodically at given interval + * until count expires. + * Count : 255 - Send a probe response periodically at given interval + * until stopped. */ #define WMI_PEER_PARAM_UNSOL_PROBE_RESP_INTVL 0x2C @@ -21621,13 +22030,14 @@ typedef struct { #define WMI_PEER_SAFEMODE_EN 0x80000000 /* Fips Mode Enabled */ /** define for peer_flags_ext */ -#define WMI_PEER_EXT_EHT 0x00000001 /* EHT enabled */ -#define WMI_PEER_EXT_320MHZ 0x00000002 /* 320Mhz enabled */ -#define WMI_PEER_EXT_DMS_CAPABLE 0x00000004 -#define WMI_PEER_EXT_HE_CAPS_6GHZ_VALID 0x00000008 /* param he_caps_6ghz is valid or not */ -#define WMI_PEER_EXT_IS_QUALCOMM_NODE 0x00000010 /* Indicates if the peer connecting is a qualcomm node */ -#define WMI_PEER_EXT_IS_MESH_NODE 0x00000020 /* Indicates if the peer connecting is a mesh node */ -#define WMI_PEER_EXT_PROTECTED_TWT 0x00000040 /* Protected TWT operation Support field in Extended RSN Capabilities element */ +#define WMI_PEER_EXT_EHT 0x00000001 /* EHT enabled */ +#define WMI_PEER_EXT_320MHZ 0x00000002 /* 320Mhz enabled */ +#define WMI_PEER_EXT_DMS_CAPABLE 0x00000004 +#define WMI_PEER_EXT_HE_CAPS_6GHZ_VALID 0x00000008 /* param he_caps_6ghz is valid or not */ +#define WMI_PEER_EXT_IS_QUALCOMM_NODE 0x00000010 /* Indicates if the peer connecting is a qualcomm node */ +#define WMI_PEER_EXT_IS_MESH_NODE 0x00000020 /* Indicates if the peer connecting is a mesh node */ +#define WMI_PEER_EXT_PROTECTED_TWT 0x00000040 /* Protected TWT operation Support field in Extended RSN Capabilities element */ +#define WMI_PEER_EXT_UHR 0x00000080 /* UHR enabled */ #define WMI_PEER_EXT_F_CRIT_PROTO_HINT_ENABLED 0x40000000 /** @@ -21802,6 +22212,120 @@ typedef struct { wmi_mac_addr link_macaddr; } wmi_pdev_mesh_rx_filter_enable_fixed_param; +typedef struct { + A_UINT32 tlv_header; /** TLV tag (WMITLV_TAG_STRUC_wmi_peer_assoc_operating_mode_params) and len */ + /* rx_nss: + * self rx nss indicated to AP through capability IEs or operating mode IE. + * 1 ~ n: 1ss ~ nss + */ + A_UINT32 rx_nss; + /* tx_nss: + * self tx nss indicated to AP through capability IEs or operating mode IE. + * 1 ~ n: 1ss ~ nss + */ + A_UINT32 tx_nss; + /* bw: + * self BW indicated to AP through capability IEs or operating mode IE, + * refer to wmi_channel_width for definition of the values this field + * can hold. + */ + A_UINT32 bw; +} wmi_peer_assoc_operating_mode_params; + + +typedef enum { + WMI_MGMT_TID_MSDUQ_LINK_SPECIFIC,/* legacy and link peer */ + WMI_MGMT_TID_MSDUQ_LINK_AGNOSTIC, + WMI_MGMT_TID_MSDUQ_TYPE_MAX, +} WMI_MGMT_TID_MSDUQ_TYPE; + +#define WMI_MGMT_MSDUQ_GET_LINK_ID(msduq_type) WMI_GET_BITS(msduq_type,0,3) +#define WMI_MGMT_MSDUQ_SET_LINK_ID(msduq_type) WMI_SET_BITS(msduq_type,0,3,value) +#define WMI_MGMT_MSDUQ_GET_FLOW_TYPE(msduq_type) WMI_GET_BITS(msduq_type,3,5) +#define WMI_MGMT_MSDUQ_SET_FLOW_TYPE(msduq_type) WMI_SET_BITS(msduq_type,3,5,value) + +typedef struct { + A_UINT32 tlv_header; /* TLV tag and Len. Tag: WMITLV_TAG_STRUC_wmi_peer_assoc_mgmt_msduq_params*/ + union { + struct { + A_UINT32 link_id : 3, /* HW Link ID */ + flow_type : 5, /* WMI_MGMT_TID_MSDUQ_TYPE */ + reserved : 24; + }; + A_UINT32 msduq_type; + }; + + /* 40 bit physical address, 256 bytes alligned, LSB 8 bits are zero */ + A_UINT32 mgmt_msduq_paddr_39_8; +} wmi_peer_assoc_mgmt_msduq_params; + +typedef struct { + A_UINT32 tlv_header; /* TAG_ID : WMITLV_TAG_STRUC_wmi_peer_assoc_mgmt_mpduq_params */ + /* 40 bit physical address, 256 bytes alligned, LSB 8 bits are zero */ + A_UINT32 mgmt_mpduq_paddr_39_8; + A_UINT32 pn_paddr_31_0; + A_UINT32 pn_paddr_39_32; +} wmi_peer_assoc_mgmt_mpduq_params; + +#define WMI_HOL_QUEUE_GET_PEER_ID(mpduq_msduq_number) \ + WMI_GET_BITS(mpduq_msduq_number,0,12) +#define WMI_HOL_QUEUE_SET_PEER_ID(mpduq_msduq_number) \ + WMI_SET_BITS(mpduq_msduq_number,0,12,value) +#define WMI_HOL_QUEUE_GET_TID_NUM(mpduq_msduq_number) \ + WMI_GET_BITS(mpduq_msduq_number,12,5) +#define WMI_HOL_QUEUE_SET_TID_NUM(mpduq_msduq_number) \ + WMI_SET_BITS(mpduq_msduq_number,12,5,value) +#define WMI_HOL_QUEUE_GET_MPDUQ_TYPE(mpduq_msduq_number) \ + WMI_GET_BITS(mpduq_msduq_number,17,5) +#define WMI_HOL_MSDUQ_SET_MPDUQ_TYPE(mpduq_msduq_number) \ + WMI_SET_BITS(mpduq_msduq_number,17,5,value) +#define WMI_HOL_QUEUE_GET_MSDUQ_TYPE(mpduq_msduq_number) \ + WMI_GET_BITS(mpduq_msduq_number,22,5) +#define WMI_HOL_MSDUQ_SET_MSDUQ_TYPE(mpduq_msduq_number) \ + WMI_SET_BITS(mpduq_msduq_number,22,5,value) + +typedef struct { + A_UINT32 tlv_header; /* TAG_ID : WMITLV_TAG_STRUC_wmi_peer_assoc_hol_mdsuq_params */ + + /** + * A_UINT32 + * WMI_HOL_MSDUQ_GET_PEER_ID / WMI_HOL_MSDU_SET_PEER_ID + * peer_id:12, + * + * WMI_HOL_MSDUQ_GET_TID_NUM / WMI_HOL_MSDUQ_SET_TID_NUM + * tid_num:5, + * + * WMI_HOL_MPDUQ_GET_QUEUE_TYPE / WMI_HOL_MPDUQ_SET_QUEUE_TYPE + * mpduq_type:5, + * + * WMI_HOL_MSDUQ_GET_QUEUE_TYPE / WMI_HOL_MSDUQ_SET_QUEUE_TYPE + * msduq_type:5, + * + * rsvd:5; + */ + union { + struct { + A_UINT32 peer_id : 12, + tid_num : 5, + mpduq_type : 5, + msduq_type : 5, + reserved : 5; + }; + A_UINT32 mpduq_msduq_number; + }; + + /* 40 bit address, 256 bytes alligned LSB 8 bits are zero */ + A_UINT32 mpduq_paddr_39_8; + + /* 40 bit address, 256 bytes alligned LSB 8 bits are zero */ + A_UINT32 msduq_paddr_39_8; + + /* First 32 bits for pn physical address */ + A_UINT32 pn_paddr_31_0; + + /* Upper 8 bits of 40 bit pn physical address */ + A_UINT32 pn_paddr_39_32; +} wmi_peer_assoc_hol_mdsuq_params; /* * PEER assoc_flags for assoc complete: @@ -21943,6 +22467,13 @@ typedef struct { A_UINT32 peer_eht_ops; wmi_ppe_threshold peer_eht_ppet; A_UINT32 assoc_flags; + /** maximum number of spatial streams supported by peer for tx */ + A_UINT32 peer_max_tx_nss; + /* max_downlink_nss: + * max downlink nss, intersected between self rx and peer tx. + * 1~N means 1ss~Nss + */ + A_UINT32 max_downlink_nss; /* Following this struct are the TLV's: * A_UINT8 peer_legacy_rates[]; @@ -21955,6 +22486,8 @@ typedef struct { * wmi_eht_rate_set peer_eht_rates; <-- EHT capabilities of the peer * wmi_peer_assoc_mlo_partner_link_params link_info[] <-- partner link info * wmi_peer_assoc_tid_to_link_map[] <-- tid to link_map info + * wmi_peer_assoc_operating_mode_params <-- operating mode param that + * host sends to AP in peer assoc req, optional TLV */ } wmi_peer_assoc_complete_cmd_fixed_param; @@ -22503,14 +23036,19 @@ typedef struct { /** * btm_config.flags * BIT 0 : Enable/Disable the BTM offload. - * BIT 1-2 : Action on non matching candidate with cache. Used WMI_ROAM_BTM_OFLD_NON_MATCHING_CND_XXX + * BIT 1-2 : Action on non matching candidate with cache. + * Used WMI_ROAM_BTM_OFLD_NON_MATCHING_CND_XXX * BIT 3-5 : Roaming handoff decisions. Use WMI_ROAM_BTM_OFLD_CNDS_MATCH_XXX * BIT 6 : Enable/Disable solicited BTM - * BIT 7 : Roam BTM candidates based on the roam score instead of BTM preferred value + * BIT 7 : Roam BTM candidates based on the roam score instead of BTM + * preferred value * BIT 8 : BTM query preference over 11k neighbor report request * BIT 9 : Send BTM query with preferred candidates list - * BIT 10 : Forward MBO BTM Request to Host if MBO ASSOC RETRY attribute is set - * BIT 11-31 : Reserved + * BIT 10 : Forward MBO BTM Request to Host if MBO ASSOC RETRY attribute + * is set + * BIT 11 : Detect the missing band from BTM request when compared to + * roam scan results and consider them as valid candidate + * BIT 12-31 : Reserved */ #define WMI_ROAM_BTM_SET_ENABLE(flags, val) WMI_SET_BITS(flags, 0, 1, val) #define WMI_ROAM_BTM_GET_ENABLE(flags) WMI_GET_BITS(flags, 0, 1) @@ -22526,8 +23064,10 @@ typedef struct { #define WMI_ROAM_BTM_GET_BTM_QUERY_PREFERENCE_OVER_11K(flags) WMI_GET_BITS(flags, 8, 1) #define WMI_ROAM_BTM_SET_BTM_QUERY_WITH_CANDIDATE_LIST(flags, val) WMI_SET_BITS(flags, 9, 1, val) #define WMI_ROAM_BTM_GET_BTM_QUERY_WITH_CANDIDATE_LIST(flags) WMI_GET_BITS(flags, 9, 1) -#define WMI_ROAM_BTM_SET_FORWARD_MBO_ASSOC_RETRY_BTM_REQUEST_TO_HOST(flags, val) WMI_SET_BITS(flags, 10, 1, val) -#define WMI_ROAM_BTM_GET_FORWARD_MBO_ASSOC_RETRY_BTM_REQUEST_TO_HOST(flags) WMI_GET_BITS(flags, 10, 1) +#define WMI_ROAM_BTM_SET_FORWARD_MBO_ASSOC_RETRY_BTM_REQUEST_TO_HOST(flags, val) WMI_SET_BITS(flags, 10, 1, val) +#define WMI_ROAM_BTM_GET_FORWARD_MBO_ASSOC_RETRY_BTM_REQUEST_TO_HOST(flags) WMI_GET_BITS(flags, 10, 1) +#define WMI_ROAM_BTM_SET_DETECT_CANDIDATE_FROM_MISSING_BAND_IN_BTM_REQUEST(flags, val) WMI_SET_BITS(flags, 11, 1, val) +#define WMI_ROAM_BTM_GET_DETECT_CANDIDATE_FROM_MISSING_BAND_IN_BTM_REQUEST(flags) WMI_GET_BITS(flags, 11, 1) /** WMI_ROAM_BTM_SET_NON_MATCHING_CNDS_ACTION definition: When BTM candidate is not matched with cache by WMI_ROAM_BTM_SET_CNDS_MATCH_CONDITION, determine what to do */ @@ -22625,6 +23165,15 @@ typedef struct { A_UINT32 roam_scan_period_after_inactivity; /* units = milliseconds */ /** roam full scan period value */ A_UINT32 roam_full_scan_period; /* units = milliseconds */ + /** roam_periodic_scan_interval: + * Timer value to periodically trigger the roaming process at + * set intervals during low RSSI roaming trigger. + * Low rssi trigger (Partial/full) --> + * 10s (partial) --> + * 20s (partial) --> + * 30s (partial) and so on. + */ + A_UINT32 roam_periodic_scan_interval; /* units = seconds */ } wmi_roam_scan_period_fixed_param; /** @@ -23177,7 +23726,10 @@ typedef struct { * Refer WLAN_ROAM_SCORE_MAX_BAND_INDEX for possible band_idx values. */ A_UINT32 band_idx; - /** Below RSSI/CU factor_value & factor_score param values are configured by vendor */ + /** + * The below band weight (2.4 GHz, 5 GHz, 6 GHz), RSSI, and CU factor_value + * and factor_score param values are configured by vendor. + */ A_UINT32 rssi_factor_value1; A_UINT32 rssi_factor_value2; A_UINT32 rssi_factor_value3; @@ -23192,6 +23744,9 @@ typedef struct { A_UINT32 cu_factor_value2; A_UINT32 cu_factor_score1; A_UINT32 cu_factor_score2; + A_UINT32 band_weight_2GHz; + A_UINT32 band_weight_5GHz; + A_UINT32 band_weight_6GHz; } wmi_roam_cnd_vendor_scoring_param; /** Support early stop roaming scanning when finding a strong candidate AP @@ -23445,6 +24000,7 @@ typedef struct { A_UINT32 no_ack_timeout; /* In msec. duration to wait before another SW retry made if no ack seen for previous frame */ A_UINT32 roam_candidate_validity_time; /* In msec. validity duration of each entry in roam cache. If the value is 0x0, this field should be disregarded. */ A_UINT32 roam_to_current_bss_disable; /* Disable roaming to current bss */ + A_UINT32 mlo_roam_partner_bringup_by_host; } wmi_roam_offload_tlv_param; @@ -23673,6 +24229,21 @@ typedef struct { wmi_mac_addr mac_addr; } wmi_roam_bss_info_param; +typedef struct { + A_UINT32 tlv_header; + /* These params are filled in the new design done for MLO roam + * optimization; only in roam abort cases Fw deletes partner links + * at the start of roam handoff itself. + * Host needs to take care of bringing up the partner link if + * roam fails based on deleted_ieee_link_id_bmap; + * deleted_ieee_link_id_bmap represents the ieee_link_id of the + * links which were deleted at the start of roam handoff. + * This is filled only for MLO and deleted_ieee_link_id_bmap = 0 + * means no link was deleted. + */ + A_UINT32 deleted_ieee_link_id_bmap; +} wmi_roam_partner_link_param; + /* roam_reason: bits 0-3 */ #define WMI_ROAM_REASON_INVALID 0x0 /** invalid reason. Do not interpret reason field */ #define WMI_ROAM_REASON_BETTER_AP 0x1 /** found a better AP */ @@ -24577,6 +25148,12 @@ typedef enum wake_reason_e { WOW_REASON_PF_BLOCKING_LAST_TIME, /* C2C scan report LPI AP detect or not event */ WOW_REASON_C2C_DETECT_EVENT, + /* wake up the host in case of TDLS packet reception */ + WOW_REASON_TDLS_PACKET_RX, + /* wake up the host when USD is enabled */ + WOW_REASON_USD, + /* wake up the host when MLO link switch happens */ + WOW_REASON_MLO_LINK_SWITCH_EVENT, /* add new WOW_REASON_ defs before this line */ @@ -26282,6 +26859,11 @@ typedef enum */ WMI_VENDOR_OUI_ACTION_AUTH_ASSOC_6MBPS_2GHZ = 17, + /* + * Disable dynamic SMPS if OUI matches + */ + WMI_VENDOR_OUI_ACTION_DISABLE_DYNAMIC_SMPS = 18, + /* Add any action before this line */ WMI_VENDOR_OUI_ACTION_MAX_ACTION_ID @@ -27170,13 +27752,32 @@ typedef struct { typedef struct { /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_tdls_peer_update_cmd_fixed_param */ - A_UINT32 tlv_header; + A_UINT32 tlv_header; /** unique id identifying the VDEV */ - A_UINT32 vdev_id; + A_UINT32 vdev_id; /** peer MAC address */ - wmi_mac_addr peer_macaddr; + wmi_mac_addr peer_macaddr; /** new TDLS state for peer (wmi_tdls_peer_state) */ - A_UINT32 peer_state; + A_UINT32 peer_state; + /** need_nss_conf: + * only set to 1 when this TDLS peer is required to operating + * in particular HW mode NSS + */ + A_UINT32 need_nss_conf; + /* preferred_tx_nss: + * for peering state, it means advertised nss, + * for connected state, it means final negotiated nss. + * 1 ~ n: 1ss ~ nss + */ + A_UINT32 preferred_tx_nss; + /* preferred_rx_nss: + * for peering state, it means advertised nss, + * for connected state, it means final negotiated nss. + * 1 ~ n: 1ss ~ nss + */ + A_UINT32 preferred_rx_nss; + + /* The TLV for wmi_tdls_peer_capabilities will follow. * wmi_tdls_peer_capabilities peer_caps; */ @@ -27238,6 +27839,8 @@ enum wmi_tdls_peer_notification { WMI_TDLS_PEER_DISCONNECTED, /** TDLS/BT role change notification for connection tracker */ WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION, + /** resp to WMI_TDLS_PEER_UPDATE_CMDID as host requested */ + WMI_TDLS_PEER_UPDATE_RESP, }; enum wmi_tdls_peer_reason { @@ -27267,6 +27870,8 @@ enum wmi_tdls_peer_reason { WMI_TDLS_SCAN_STARTED_EVENT, /** TDLS module received a scan complete event, TDLS connection tracker needs to handle this */ WMI_TDLS_SCAN_COMPLETED_EVENT, + /** TDLS max supported operating NSS in current HW mode */ + WMI_TDLS_OPERATING_NSS_CONF_EVENT, }; /* WMI_TDLS_PEER_EVENTID */ @@ -27281,6 +27886,10 @@ typedef struct { A_UINT32 peer_reason; /** unique id identifying the VDEV */ A_UINT32 vdev_id; + /** operating TX NSS 1 ~ n: 1ss ~ nss */ + A_UINT32 tx_nss; + /** operating RX NSS 1 ~ n: 1ss ~ nss */ + A_UINT32 rx_nss; } wmi_tdls_peer_event_fixed_param; /* NOTE: wmi_vdev_mcc_bcn_intvl_change_event_fixed_param would be deprecated. Please @@ -27759,8 +28368,8 @@ typedef struct #define LPI_IE_BITMAP_CHRE_RADIO_CHAIN 0x01000000 /* include radio chain and RSSI per chain information if this bit is set - for CHRE */ #define LPI_IE_BITMAP_CHRE_SEC_MODE_MRSNO_WIFI6 0x02000000 /* include MRSNO IE's sec_mode information for WiFi6 if this bit is set - for CHRE */ #define LPI_IE_BITMAP_CHRE_SEC_MODE_MRSNO_WIFI7 0x04000000 /* include MRSNO IE's sec_mode information for WiFi7 if this bit is set - for CHRE */ +#define LPI_IE_BITMAP_INTERWORKING_IE_VENUE_INFO 0x08000000 /* interworking IE venue info (2 bytes) will be filled when this bit is enabled */ -/* 0x08000000 is unused / available */ #define LPI_IE_BITMAP_CHRE_ESS 0x10000000 /* ESS capability info for CHRE */ #define LPI_IE_BITMAP_CHRE_SEC_MODE 0x20000000 /* Security capability info for CHRE */ @@ -28460,6 +29069,12 @@ typedef enum { WMI_PEER_IND_OMI, /* operating mode indication */ } WMI_PEER_OPER_MODE_IND; + +#define WMI_EHT_PEER_PARAMS_MCS_DISABLE_GET(eht_peer_params) \ + WMI_GET_BITS(eht_peer_params, 0, 1) +#define WMI_EHT_PEER_PARAMS_MCS_DISABLE_SET(eht_peer_params, value) \ + WMI_SET_BITS(eht_peer_params, 0, 1, value) + typedef struct { /** TLV tag and len; tag equals * WMITLV_TAG_STRUC_wmi_peer_oper_mode_change */ @@ -28481,6 +29096,12 @@ typedef struct { * valid for peer_operating mode ind. OMI */ A_UINT32 new_disablemu; + /** eht_peer_params + * bit 0 - eht_mcs15_disable, refer to + * WMI_EHT_PEER_PARAMS_MCS_DISABLE_GET,SET macros + * bits 1 to 31 - reserved + */ + A_UINT32 eht_peer_params; } wmi_peer_oper_mode_change_event_fixed_param; /** FW response when tx failure count has reached threshold @@ -29479,6 +30100,21 @@ typedef struct { #define wmi_ndp_cmd_param wmi_ndp_cmd_param_PROTOTYPE +typedef struct { + /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_ndp_set_latency_tput_fixed_param */ + A_UINT32 tlv_header; + /** NDP instance id */ + A_UINT32 ndp_instance_id; + /** NDI VDEV ID */ + A_UINT32 vdev_id; + /** latency reqirement */ + A_UINT32 latency_ms; + /** throughput requirement */ + A_UINT32 tput_mbps; +} wmi_ndp_set_latency_tput_fixed_param_PROTOTYPE; + +#define wmi_ndp_set_latency_tput_fixed_param wmi_ndp_set_latency_tput_fixed_param_PROTOTYPE + /** * NDP End request */ @@ -31306,6 +31942,11 @@ typedef struct { A_UINT32 pdev_id; } wmi_pdev_resume_event_fixed_param; +/** WMI_PDEV_SUSPEND_EVENTID: generated in response to WMI_PDEV_SUSPEND_CMDID */ +typedef struct { + A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_pdev_suspend_event_fixed_param */ + A_UINT32 pdev_id; +} wmi_pdev_suspend_event_fixed_param; /** value representing all modules */ @@ -33236,6 +33877,23 @@ typedef struct { A_UINT32 tid_mask; /* bits 0 to 15 = QoS TIDs, bit 16 = non-qos TID */ } wmi_peer_reorder_queue_remove_cmd_fixed_param; +/** + * This command is sent from WLAN host driver to firmware for + * customizing MCS range & retry count for specific TID of specific peer + */ +typedef struct { + A_UINT32 tlv_header; + A_UINT32 vdev_id; + wmi_mac_addr peer_macaddr; /* Peer MAC address */ + A_UINT32 tid; + /* on_off: + * Rate customization enable/disable. 1 for enable and 0 for disable. + */ + A_UINT32 on_off; + A_UINT32 bw; /* Unit MHz */ + A_UINT32 retry_count; +} wmi_peer_tid_rate_custom_cmd_fixed_param; + /* DEPRECATED - use wmi_pdev_set_mac_config_response_event_fixed_param instead */ typedef struct { @@ -33887,6 +34545,81 @@ typedef struct wmi_bpf_get_vdev_work_memory_resp_evt_s { */ } wmi_bpf_get_vdev_work_memory_resp_evt_fixed_param; + +/* APF offloads supported bitmap: + * + * BIT 0: ARP OFFLOAD + * BIT 1: NS OFFLOAD + * BIT 2: IGMP OFFLOAD + * BIT 3: ICMP OFFLOAD + * BIT 4-31: reserved +*/ +#define WMI_BPF_ARP_OFFLOAD_SUPPORT_GET(param) \ + WMI_GET_BITS(param, 0, 1) +#define WMI_BPF_ARP_OFFLOAD_SUPPORT_SET(param, value) \ + WMI_SET_BITS(param, 0, 1, value) + +#define WMI_BPF_NS_OFFLOAD_SUPPORT_GET(param) \ + WMI_GET_BITS(param, 1, 1) +#define WMI_BPF_NS_OFFLOAD_SUPPORT_SET(param, value) \ + WMI_SET_BITS(param, 1, 1, value) + +#define WMI_BPF_IGMP_OFFLOAD_SUPPORT_GET(param) \ + WMI_GET_BITS(param, 2, 1) +#define WMI_BPF_IGMP_OFFLOAD_SUPPORT_SET(param, value) \ + WMI_SET_BITS(param, 2, 1, value) + +#define WMI_BPF_ICMP_OFFLOAD_SUPPORT_GET(param) \ + WMI_GET_BITS(param, 3, 1) +#define WMI_BPF_ICMP_OFFLOAD_SUPPORT_SET(param, value) \ + WMI_SET_BITS(param, 3, 1, value) + +typedef struct wmi_bpf_set_supported_offload_bitmap_cmd_s { + A_UINT32 tlv_header; + A_UINT32 vdev_id; + /* ofld_bitmap: + * Host sends bitmap for APF supported offloads. + * Refer to the above WMI_BPF_ macros for the interpretation of the bits + * within the bitmap. + */ + A_UINT32 ofld_bitmap; +} wmi_bpf_set_supported_offload_bitmap_cmd_fixed_param; + +/* APF modes: */ +typedef enum { + /* Default value: 0 */ + wmi_apf_mode_default = 0, + + /* Mode 1: value 1: APF to operate only during system suspend. */ + wmi_apf_mode_system_suspend = 1, + + /* Mode 2: value 2: + * Downgrade the APF capability of the firmware to a lower version + * (from V6 to V4). + */ + wmi_apf_mode_capability_v4 = 2, + + /* Mode combination: value 3: + * Downgrade to APFv4 and enable only in system suspend. + */ + wmi_apf_mode_system_suspend_and_capability_v4 = 3, + + /* Mode 3: value 4: Turn off APF completely. */ + wmi_apf_mode_off = 4, +} wmi_apf_modes; + +typedef struct wmi_bpf_set_apf_mode_cmd_s { + A_UINT32 tlv_header; /* tag = WMITLV_TAG_STRUC_wmi_bpf_set_apf_mode_cmd_fixed_param */ + A_UINT32 vdev_id; + /* apf_mode: + * Host indicates the APF mode (or combination of modes). + * Refer to the wmi_apf_modes enum for the interpretation of the + * apf_mode value. + */ + A_UINT32 apf_mode; /* holds a wmi_apf_modes value */ +} wmi_bpf_set_apf_mode_cmd_fixed_param; + + #define AES_BLOCK_LEN 16 /* in bytes */ #define FIPS_KEY_LENGTH_128 16 /* in bytes */ #define FIPS_KEY_LENGTH_256 32 /* in bytes */ @@ -34406,6 +35139,41 @@ typedef enum { * A_INT8 ICNIRP 6 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-8) (Ch117~Ch149) * A_INT8 ICNIRP 6 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-8) (Ch117~Ch149) * A_INT8 ICNIRP 6 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-8) (Ch117~Ch149) + * if version == 2 or chip is col, will have NONTAS POWER LIMIT + * ====================NONTAS POWER LIMIT VALUE====================== + * A_INT8 NONTAS 2 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) + * A_INT8 NONTAS 2 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) + * A_INT8 NONTAS 2 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) + * A_INT8 NONTAS 5 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-1, Ch32 ~ Ch48) + * A_INT8 NONTAS 5 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-1, Ch32 ~ Ch48) + * A_INT8 NONTAS 5 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-1, Ch32 ~ Ch48) + * A_INT8 NONTAS 5 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-2, Ch50 ~ Ch144) + * A_INT8 NONTAS 5 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-2, Ch50 ~ Ch144) + * A_INT8 NONTAS 5 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-2, Ch50 ~ Ch144) + * A_INT8 NONTAS 5 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-3, Ch149 ~ Ch161) + * A_INT8 NONTAS 5 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-3, Ch149 ~ Ch161) + * A_INT8 NONTAS 5 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-3, Ch149 ~ Ch161) + * A_INT8 NONTAS 5 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-4, Ch163 ~ Ch177) + * A_INT8 NONTAS 5 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-4, Ch163 ~ Ch177) + * A_INT8 NONTAS 5 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-4, Ch163 ~ Ch177) + * A_INT8 NONTAS 6 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-5) (Ch1, Ch2 ~ Ch41) + * A_INT8 NONTAS 6 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-5) (Ch1, Ch2 ~ Ch41) + * A_INT8 NONTAS 6 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-5) (Ch1, Ch2 ~ Ch41) + * A_INT8 NONTAS 6 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-5) (Ch45 ~ Ch93) + * A_INT8 NONTAS 6 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-5) (Ch45 ~ Ch93) + * A_INT8 NONTAS 6 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-5) (Ch45 ~ Ch93) + * A_INT8 NONTAS 6 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-6) (Ch97~ Ch113) + * A_INT8 NONTAS 6 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-6) (Ch97~ Ch113) + * A_INT8 NONTAS 6 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-6) (Ch97~ Ch113) + * A_INT8 NONTAS 6 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-7) (Ch117~Ch149) + * A_INT8 NONTAS 6 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-7) (Ch117~Ch149) + * A_INT8 NONTAS 6 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-7) (Ch117~Ch149) + * A_INT8 NONTAS 6 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-7) (Ch117~Ch149) + * A_INT8 NONTAS 6 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-7) (Ch117~Ch149) + * A_INT8 NONTAS 6 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-7) (Ch117~Ch149) + * A_INT8 NONTAS 6 GHz SISO (Chain0) Power Limit Value(unit: 0.25dBm) (UNII-8) (Ch117~Ch149) + * A_INT8 NONTAS 6 GHz SISO (Chain1) Power Limit Value(unit: 0.25dBm) (UNII-8) (Ch117~Ch149) + * A_INT8 NONTAS 6 GHz MIMO (Chain0 + Chain1) Power Limit Value(unit: 0.25dBm) (UNII-8) (Ch117~Ch149) */ BIOS_PARAM_TYPE_BANDEDGE_CTL_POWER, @@ -34578,6 +35346,21 @@ typedef enum { * ============================================================== */ + BIOS_PARAM_TYPE_NON_SAR_COUNTRY_CONFIG, + /* + * BIOS_PARAM_TYPE_NON_SAR_COUNTRY_CONFIG structure contains 256 bytes as below + * + * A_UINT8 country_bitmap[NON_SAR_COUNTRY_BITMAP_COUNT];//NON_SAR_COUNTRY_BITMAP_COUNT = 256, 256BYTE. + * 0-255 stand for 256 country, each country has 8 bit for configuration. + * + * ==================each bit configuration=========================== + * BIT0: Skip TAS limit config + * BIT1: Skip SAR limit config + * BIT2: Use domain GEO table. 1: Use Country GEO table + * BIT3~5: index of domain/country used which group GEO offset table + * BIT6~7: reserved + * ==================================================================== + */ BIOS_PARAM_TYPE_MAX, } bios_param_type_e; @@ -36463,6 +37246,7 @@ typedef enum { WMI_REQUEST_CTRL_PATH_PDEV_BCN_TX_STAT = 20, WMI_REQUEST_CTRL_PATH_PDEV_CONN_STAT = 21, WMI_REQUEST_CTRL_PATH_ML_RECONFIG_STAT = 22, + WMI_REQUEST_CTRL_PATH_STA_DAR_STAT = 23, } wmi_ctrl_path_stats_id; typedef enum { @@ -36482,6 +37266,16 @@ typedef enum { WMI_REQUEST_CTRL_PATH_STAT_PERIODIC_PUBLISH = 5, } wmi_ctrl_path_stats_action; +typedef enum { + /* + * The following stats actions are mutually exclusive. + * A single stats request message can only specify one action. + */ + WMI_REQUEST_CTRL_PATH_STAT_DEFAULT = 0, /* unspecified granularity */ + WMI_REQUEST_CTRL_PATH_STAT_AC_LEVEL = 1, + WMI_REQUEST_CTRL_PATH_STAT_TID_LEVEL = 2, +} wmi_ctrl_path_stats_granularity; + typedef enum { WMI_HALPHY_CTRL_PATH_SU_STATS = 0, WMI_HALPHY_CTRL_PATH_SUTXBF_STATS, @@ -36518,6 +37312,13 @@ typedef struct { */ A_UINT32 stat_periodicity; + /** stats_granularity: + * Configures AC vs. TID granularity stats reporting, + * e.g. for STA_DAR_STATs. + * Possible values are listed in the wmi_ctrl_path_stats_granularity enum. + */ + A_UINT32 stats_granularity; /* refer to wmi_ctrl_path_stats_granularity */ + /** The below TLV arrays optionally follow this fixed_param TLV structure: * 1. A_UINT32 pdev_ids[]; * If this array is present and non-zero length, stats should only @@ -37011,8 +37812,9 @@ typedef struct { supports_11ac:1, supports_11ax:1, supports_11be:1, + supports_11bn:1, - unused: 21, + unused: 20, max_mubfee: 4; /* max MU beamformees supported per MAC */ }; @@ -37493,6 +38295,7 @@ typedef struct { */ typedef enum { WMI_TWT_STA_SYNC_EVENT_CAP = 1, /* STA TWT: FW internal errors reported using sync WMI_TWT_ACK_EVENTID */ + WMI_TWT_FLEXI_SUPPORT = 2, /* Add new TWT Caps above */ WMI_TWT_MAX_CAP = 32, @@ -38705,6 +39508,17 @@ static INLINE A_UINT8 *wmi_id_to_name(A_UINT32 wmi_command) WMI_RETURN_STRING(WMI_MLO_LINK_RECONFIG_COMPLETE_CMDID); WMI_RETURN_STRING(WMI_SAWF_EZMESH_HOP_COUNT_CMDID); WMI_RETURN_STRING(WMI_VDEV_VBSS_CONFIG_CMDID); + WMI_RETURN_STRING(WMI_NDP_SET_LATENCY_TPUT_CMDID); + WMI_RETURN_STRING(WMI_MLO_LINK_TTLM_COMPLETE_CMDID); + WMI_RETURN_STRING(WMI_BPF_SET_SUPPORTED_OFFLOAD_BITMAP_CMDID); + WMI_RETURN_STRING(WMI_BPF_SET_APF_MODE_CMDID); + WMI_RETURN_STRING(WMI_ENERGY_MGMT_PCIE_CONFIG_CMDID); + WMI_RETURN_STRING(WMI_ENERGY_MGMT_PCIE_LPM_CMDID); + WMI_RETURN_STRING(WMI_ENERGY_MGMT_DCVS_CONFIG_CMDID); + WMI_RETURN_STRING(WMI_ENERGY_MGMT_EDPS_CONFIG_CMDID); + WMI_RETURN_STRING(WMI_ENERGY_MGMT_PUO_CONFIG_CMDID); + WMI_RETURN_STRING(WMI_ENERGY_MGMT_ECO_MODE_CONFIG_CMDID); + WMI_RETURN_STRING(WMI_PEER_TID_RATE_CUSTOM_CMDID); } return (A_UINT8 *) "Invalid WMI cmd"; @@ -39126,9 +39940,10 @@ typedef struct { A_UINT32 num_6g_reg_rules_client_lpi[WMI_REG_CLIENT_MAX]; A_UINT32 num_6g_reg_rules_client_vlp[WMI_REG_CLIENT_MAX]; /* - * NOTE: no further fields can be added into this struct, due to - * message buffer size limitations in certain targets for the - * WMI_REG_CHAN_LIST_CC_EXT_EVENT message. + * NOTE: We cannot add new parameters to the fixed param TLV though + * we have enough buffer size (WMI_SVC_MSG_SIZE) for the given WMI event. + * This is due to a crash seen in the host parsing logic of this fixed param. + * New params can be added in the same message but in other TLVs. */ /* * This fixed_param TLV is followed by the following TLVs: @@ -39144,6 +39959,10 @@ typedef struct { * - wmi_regulatory_rule_meta_data reg_meta_data[] * struct used to fill meta information specific to new reg rules * getting added(i.e. from C2C onwards). + * - wmi_hw_blacklist_chan_fixed_param hw_blacklist_chan_fixed_param[0 or 1] + * optional TLV for reporting HW channel blacklist meta-data. + * - wmi_hw_blacklist_chan_data, hw_blacklist_chan_data[] + * optional TLV for reporting HW channel blacklist information. */ } wmi_reg_chan_list_cc_event_ext_fixed_param; @@ -39296,6 +40115,10 @@ typedef struct { * This TLV array contains zero or more TLVs of channel CFI and * EIRP power values for each of the total number of channels * per global operating class. + * 6. wmi_hw_blacklist_chan_fixed_param hw_blacklist_chan_fixed_param[] + * optional meta-data for HW channel blacklist + * 7. wmi_hw_blacklist_chan_data hw_blacklist_chan_data[] + * optional HW channel blacklist information */ } wmi_afc_event_fixed_param; @@ -39388,6 +40211,233 @@ typedef struct { A_UINT32 eirp_pwr; /* maximum permissible EIRP available for above CFI in dBm, value is stored in 0.01 dBm steps */ } wmi_afc_chan_eirp_power_info; + +typedef enum { + WMI_11BE_PUNCTURE_PATTERN_80MHZ_MINUS_20MHZ_0x1 = 0, + WMI_11BE_PUNCTURE_PATTERN_80MHZ_MINUS_20MHZ_0x2 = 1, + WMI_11BE_PUNCTURE_PATTERN_80MHZ_MINUS_20MHZ_0x4 = 2, + WMI_11BE_PUNCTURE_PATTERN_80MHZ_MINUS_20MHZ_0x8 = 3, + WMI_11BE_PUNCTURE_PATTERN_80MHZ_MAX, +} WMI_11BE_PUNCTURE_PATTERNS_80MHZ; + +typedef enum { + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_20MHZ_0x1 = 0, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_20MHZ_0x2 = 1, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_20MHZ_0x4 = 2, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_20MHZ_0x8 = 3, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_20MHZ_0x10 = 4, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_20MHZ_0x20 = 5, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_20MHZ_0x40 = 6, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_20MHZ_0x80 = 7, + + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_40MHZ_0x0C = 8, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_40MHZ_0x03 = 9, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_40MHZ_0xC0 = 10, + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MINUS_40MHZ_0x30 = 11, + + WMI_11BE_PUNCTURE_PATTERN_160MHZ_MAX, +} WMI_11BE_PUNCTURE_PATTERNS_160MHZ; + +typedef enum { + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_40MHZ_0xC = 0, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_40MHZ_0x3 = 1, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_40MHZ_0xC0 = 2, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_40MHZ_0x30 = 3, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_40MHZ_0xC00 = 4, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_40MHZ_0x300 = 5, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_40MHZ_0xC000 = 6, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_40MHZ_0x3000 = 7, + + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_80MHZ_0xF = 8, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_80MHZ_0xF0 = 9, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_80MHZ_0xF00 = 10, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_80MHZ_0xF000 = 11, + + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0xF003 = 12, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0xF00C = 13, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0xF030 = 14, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0xF0C0 = 15, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0xF300 = 16, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0xFC00 = 17, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0x003F = 18, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0x00CF = 19, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0x030F = 20, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0x0C0F = 21, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0x300F = 22, + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MINUS_120MHZ_0xC00F = 23, + + WMI_11BE_PUNCTURE_PATTERN_320MHZ_MAX, +} WMI_11BE_PUNCTURE_PATTERNS_320MHZ; + +typedef enum { + /* + * bits 16-19 of "blacklist_msg_info" in wmi_hw_blacklist_chan_fixed_param. + * This status code intimates host whether the TLV sent by + * Halphy is to update the master channel list or clear it. + */ + WMI_HW_BLACKLIST_CHAN_SP_UPDATE = 0, + WMI_HW_BLACKLIST_CHAN_VLP_UPDATE, + /* the below enums are added for future scope */ + WMI_HW_BLACKLIST_CHAN_SP_CLEAR, + WMI_HW_BLACKLIST_CHAN_VLP_CLEAR, + WMI_HW_BLACKLIST_CHAN_UPDATE_ALL, + WMI_HW_BLACKLIST_CHAN_CLEAR_ALL, + WMI_HW_BLACKLIST_CHAN_INVALID = 15, +} WMI_HW_BLACKLIST_CHAN_RESP_CMD_CODE; + +typedef enum { + /* + * bit 20, "blacklist_msg_info" flag in wmi_hw_blacklist_chan_fixed_param + * This bit field informs the host whether all the blacklist channel + * information has been sent, or if further messages will follow to + * deliver the remaining information. + */ + WMI_HW_BLACKLIST_CHAN_EVENT_DONE = 0, /* Indicates it is the last event */ + WMI_HW_BLACKLIST_CHAN_EVENT_MORE = 1, /* Indicates more evts will follow */ +} WMI_HW_BLACKLIST_CHAN_DATA_EVENT_FLAG; + +#define WMI_GET_BLACKLIST_MSG_INFO_WMI_EVT_SEQ_NUM(flag) \ + WMI_GET_BITS(flag, 0, 8) +#define WMI_SET_BLACKLIST_MSG_INFO_WMI_EVT_SEQ_NUM(flag, val) \ + WMI_SET_BITS(flag, 0, 8, val) + +#define WMI_GET_BLACKLIST_MSG_INFO_TOTAL_WMI_EVT_NUM(flag) \ + WMI_GET_BITS(flag, 8, 8) +#define WMI_SET_BLACKLIST_MSG_INFO_TOTAL_WMI_EVT_NUM(flag, val) \ + WMI_SET_BITS(flag, 8, 8, val) + +#define WMI_GET_BLACKLIST_MSG_INFO_RESP_CODE(flag) \ + WMI_GET_BITS(flag, 16, 4) +#define WMI_SET_BLACKLIST_MSG_INFO_RESP_CODE(flag, val) \ + WMI_SET_BITS(flag, 16, 4, val) + +#define WMI_GET_BLACKLIST_MSG_INFO_EVT_FLAG(flag) \ + WMI_GET_BITS(flag, 20, 1) +#define WMI_SET_BLACKLIST_MSG_INFO_EVT_FLAG(flag, val) \ + WMI_SET_BITS(flag, 20, 1, val) + +#define WMI_GET_BLACKLIST_CHANNELS_TOTAL_NUM_CHAN(flag) \ + WMI_GET_BITS(flag, 0, 16) +#define WMI_SET_BLACKLIST_CHANNELS_TOTAL_NUM_CHAN(flag, val) \ + WMI_SET_BITS(flag, 0, 16, val) + +#define WMI_GET_BLACKLIST_CHANNELS_CURRENT_NUM_CHAN(flag) \ + WMI_GET_BITS(flag, 16, 16) +#define WMI_SET_BLACKLIST_CHANNELS_CURRENT_NUM_CHAN(flag, val) \ + WMI_SET_BITS(flag, 16, 16, val) + +typedef struct { + /** TLV tag and len; + * tag equals WMITLV_TAG_STRUC_wmi_hw_blacklist_chan_fixed_param*/ + A_UINT32 tlv_header; + A_UINT32 phy_id; + union { + A_UINT32 blacklist_msg_info; + /* + * bit 7 - 0 -> Current WMI event sequence number + * bit 15 - 8 -> Total number of WMI events [For debugging only] + * bit 19 - 16 -> ENUM "WMI_HW_BLACKLIST_CHAN_RESP_CMD_CODE" + * bit 20 -> ENUM "WMI_HW_BLACKLIST_CHAN_DATA_EVENT_FLAG" + * bit 31 - 21 -> Reserved + */ + struct { + A_UINT32 + blacklist_wmi_seq_num: 8, + blacklist_wmi_total_num: 8, + blacklist_resp_code: 4, + blacklist_event_flag:1, + reserved: 11; + }; + }; + /* + * bit 15 - 0 -> Total number of HW blacklist channels + * bit 31 - 16 -> number of HW blacklist channels in current WMI + */ + union { + A_UINT32 num_hw_blacklist_channels; + struct { + A_UINT32 + total_num_chan: 16, + current_num_chan: 16; + }; + }; +} wmi_hw_blacklist_chan_fixed_param; + +#define WMI_GET_FREQ_INFO_PRI20_BITMAP(flag) \ + WMI_GET_BITS(flag, 0, 16) +#define WMI_SET_FREQ_INFO_PRI20_BITMAP(flag, val) \ + WMI_SET_BITS(flag, 0, 16, val) + +#define WMI_GET_FREQ_INFO_CHAN_CENTER_FREQ(flag) \ + WMI_GET_BITS(flag, 16, 16) +#define WMI_SET_FREQ_INFO_CHAN_CENTER_FREQ(flag, val) \ + WMI_SET_BITS(flag, 16, 16, val) + +#define WMI_GET_CHAN_LIST_META_DATA_POWER_MODE(flag) \ + WMI_GET_BITS(flag, 0, 4) +#define WMI_SET_CHAN_LIST_META_DATA_POWER_MODE(flag, val) \ + WMI_SET_BITS(flag, 0, 4, val) + +#define WMI_GET_CHAN_LIST_META_DATA_MAX_BW(flag) \ + WMI_GET_BITS(flag, 4, 8) +#define WMI_SET_CHAN_LIST_META_DATA_MAX_BW(flag, val) \ + WMI_SET_BITS(flag, 4, 8, val) + +#define WMI_GET_PUNCTURE_PATTERN_BITMAP(flag) \ + WMI_GET_BITS(flag, 0, 24) +#define WMI_SET_PUNCTURE_PATTERN_BITMAP(flag, val) \ + WMI_SET_BITS(flag, 0, 24, val) + +typedef struct { + /** TLV tag and len; + * tag equals WMITLV_TAG_STRUC_wmi_hw_blacklist_chan_data */ + A_UINT32 tlv_header; + /* + * bit 15 - 0 -> bitmap representing a set of 20MHz primary channels + * bit 31 - 16 -> channel center frequency in MHz for the given Max BW + * in "chan_list_meta_data" + */ + union { + A_UINT32 freq_info; + struct { + A_UINT32 + pri20_bitmap: 16, + chan_center_freq: 16; + }; + }; + /* + * bit 3 - 0 -> Power mode "WMI_6GHZ_REG_PWRMODE_TYPE" + * bit 11 - 4 -> Max BW with enum "wmi_channel_width" + * bit 31 - 12 -> reserved + */ + union { + A_UINT32 chan_list_meta_data; + struct { + A_UINT32 + power_mode: 4, + max_bw: 8, + reserved1: 20; + }; + }; + /* + * bit represents blacklisted puncture pattern based on enums + * WMI_11BE_PUNCTURE_PATTERNS_320MHZ, WMI_11BE_PUNCTURE_PATTERNS_160MHZ, + * WMI_11BE_PUNCTURE_PATTERNS_80MHZ + * bit 23 - 0 -> bitmap representing a set of puncture patterns of the + * given bandwidth. The bandwidth is represented by + * bits 8-15 of A_UINT32 chan_list_meta_data + * bit 31 - 24 -> reserved for future puncture patterns + */ + union { + A_UINT32 puncture_pattern_bitmap_info; + struct { + A_UINT32 + puncture_pattern_bitmap: 24, + reserved2: 8; + }; + }; +} wmi_hw_blacklist_chan_data; + typedef struct { A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_11d_scan_start_cmd_fixed_param */ A_UINT32 vdev_id; @@ -39965,7 +41015,10 @@ typedef struct { #define WLM_FLAGS_ROAM_SUPPRESS 1 #define WLM_FLAGS_ALLOW_FINAL_BMISS_ROAM 2 -/* bit 8: reserved for roaming */ +/* bit 8: Final bmiss roam will be triggered when all active links + * are final bmiss reported. + */ +#define WLM_FLAGS_ROAM_WHEN_ALL_LINKS_FBMISS 1 /* bit 9-11 of flags is used for powersave operation */ /* bit 9: WLM_FLAGS_PS_DISABLE_BMPS, disable BMPS if bit is set */ @@ -40009,6 +41062,8 @@ typedef struct { #define WLM_FLAGS_TSF_LATENCY_COMPENSATE_ENABLED_SET(flag) WMI_SET_BITS(flag, 4, 1, val) #define WLM_FLAGS_ROAM_GET_POLICY(flag) WMI_GET_BITS(flag, 6, 2) #define WLM_FLAGS_ROAM_SET_POLICY(flag, val) WMI_SET_BITS(flag, 6, 2, val) +#define WLM_FLAGS_ROAM_GET_WHEN_ALL_LINKS_FBMISS(flag) WMI_GET_BITS(flag, 8, 1) +#define WLM_FLAGS_ROAM_SET_WHEN_ALL_LINKS_FBMISS(flag, val) WMI_SET_BITS(flag, 8, 1, val) #define WLM_FLAGS_PS_IS_BMPS_DISABLED(flag) WMI_GET_BITS(flag, 9, 1) #define WLM_FLAGS_PS_IS_CSS_CLPS_DISABLED(flag) WMI_GET_BITS(flag, 10, 1) #define WLM_FLAGS_PS_SET_CSS_CLPS_DISABLE(flag, val) WMI_SET_BITS(flag, 10, 1, val) @@ -40518,6 +41573,9 @@ typedef enum _WMI_DEL_TWT_STATUS_T { WMI_DEL_TWT_STATUS_CHANGE_CONGESTION_TIMEOUT, /* Congestion timeout changed */ WMI_DEL_TWT_STATUS_P2P_GO_NOA, /* P2P GO NOA */ WMI_DEL_TWT_STATUS_UNSUPPORTED_MLMR_MODE, /* Teardown due to MLMR */ + WMI_DEL_TWT_STATUS_MLO_LINK_INACTIVE, /* Teardown due to link going to inactive */ + WMI_DEL_TWT_STATUS_2G_TWT_NOT_ENABLED, /* Teardown due to 2.4 GHz TWT not enabled */ + WMI_DEL_TWT_STATUS_SCAN_STARTED, /* Teardown due to scan started */ } WMI_DEL_TWT_STATUS_T; typedef struct { @@ -41225,6 +42283,11 @@ typedef struct { A_UINT32 vdev_id; /* 1-Enable, 0-Disable */ A_UINT32 enable; + /* self_roaming_re_enable_time: + * Allow next deauth self-roaming only when time gap is more than + * self_roaming_re_enable_time w.r.t previous deauth self-roaming. + */ + A_UINT32 self_roaming_re_enable_time; /* units = seconds */ } wmi_roam_deauth_config_cmd_fixed_param; /** IDLE roam trigger parameters */ @@ -41753,6 +42816,8 @@ typedef enum { WMI_ROAM_FAIL_REASON_CURR_AP_STILL_OK, /* Roam scan not happen due to current network condition is fine */ WMI_ROAM_FAIL_REASON_SCAN_CANCEL, /* Roam scan canceled */ WMI_ROAM_FAIL_REASON_MLD_EXTRA_SCAN_REQUIRED, /* Roaming is not triggered for current roam scan as extra scan is required to scan all MLD links */ + WMI_ROAM_FAIL_REASON_TTLM_REQUIRED, /* Roaming is not triggered as TTLM is required */ + WMI_ROAM_FAIL_REASON_LINKRECONFIG_REQUIRED, /* Roaming is not triggered as linkreconfig is required */ WMI_ROAM_FAIL_REASON_UNKNOWN = 255, } WMI_ROAM_FAIL_REASON_ID; @@ -41937,7 +43002,7 @@ typedef struct { * rssi_dbm_abs * Last known RSSI of the current BSSID at the moment when the frame * was sent and received. - * This RSSI value is valid for deauth / disassoc frame only. + * Host should ignore this field if its value is 0. * The rssi_dbm_abs value is the absolute value of the RSSI in dBm units. * For example, if the RSSI is -40 dBm, rssi_dbm_abs will be 40. */ @@ -42500,6 +43565,18 @@ typedef enum { */ WMI_ROAM_PARAM_ROAM_LATENCY_OPTIMIZATION_BITMAP = 11, + /* + * Roam param to add RSSI penalty for non-6GHz Candidate AP + * during Roam Scan in case current connected AP is 6GHz and + * cand AP is non-6GHz. + * This RSSI penalty value (in dB units) for non-6GHz candidate AP + * will be configured via ini roam_rssi_delta_from_6ghz_to_non_6ghz. + * This configured RSSI penalty value will only be applicable for non-6GHz + * Candidate AP when the STA is connected to 6GHz Band AP and will + * not impact if STA is connected to non-6GHz Band AP + */ + WMI_ROAM_PARAM_ROAM_RSSI_PENALTY_FOR_NON_6GHZ_CAND_AP = 12, + /*=== END ROAM_PARAM_PROTOTYPE SECTION ===*/ } WMI_ROAM_PARAM; @@ -44757,13 +45834,42 @@ typedef struct { /****** End of 11BE EHT MAC Capabilities Information field ******/ -/****** 11BE EHT OPS Information field ******/ - -/* Bit 0 is for MCS15. If bit0 is 1 then we enable mcs15 */ +/****** 11BE EHT OPS Information field - DEPRECATED ******/ +/* DEPRECATED, replaced by + * "Bit 6 is for MCS15. If bit6 is 1 then we disable mcs15" + * OLD: Bit 0 is for MCS15. If bit0 is 1 then we enable mcs15 + */ #define WMI_EHT_OPS_SUPMCS15_GET(eht_ops) WMI_GET_BITS(eht_ops, 0, 1) #define WMI_EHT_OPS_SUPMCS15_SET(eht_ops, value) WMI_SET_BITS(eht_ops, 0, 1, value) +/****** End of 11BE EHT OPS Information field - DEPRECATED ******/ +/****** 11BE EHT Operation Parameters field ******/ +/* Bit 0 EHT Operation Information Present */ +#define WMI_EHT_OPS_INFORMATION_PRESENT_GET(eht_ops) WMI_GET_BITS(eht_ops, 0, 1) +#define WMI_EHT_OPS_INFORMATION_PRESENT_SET(eht_ops, value) WMI_SET_BITS(eht_ops, 0, 1, value) + +/* Bit 1 Disabled Subchannel Bitmap Present */ +#define WMI_EHT_OPS_DISABLED_SUBCHANNEL_BITMAP_GET(eht_ops) WMI_GET_BITS(eht_ops, 1, 1) +#define WMI_EHT_OPS_DISABLED_SUBCHANNEL_BITMAP_SET(eht_ops, value) WMI_SET_BITS(eht_ops, 1, 1, value) + +/* Bit 2 EHT default PE duration */ +#define WMI_EHT_OPS_PE_DURATION_GET(eht_ops) WMI_GET_BITS(eht_ops, 2, 1) +#define WMI_EHT_OPS_PE_DURATION_SET(eht_ops, value) WMI_SET_BITS(eht_ops, 2, 1, value) + +/* Bit 3 Group Addressed BU indication limit*/ +#define WMI_EHT_OPS_GROUP_ADDRESSED_BU_INDICATION_LIMIT_GET(eht_ops) WMI_GET_BITS(eht_ops, 3, 1) +#define WMI_EHT_OPS_GROUP_ADDRESSED_BU_INDICATION_LIMIT_SET(eht_ops, value) WMI_SET_BITS(eht_ops, 3, 1, value) + +/* Bit 4~5 Group Addressed BU indication Exponent */ +#define WMI_EHT_OPS_GROUP_ADDRESSED_BU_INDICATION_EXPONENT_GET(eht_ops) WMI_GET_BITS(eht_ops, 4, 2) +#define WMI_EHT_OPS_GROUP_ADDRESSED_BU_INDICATION_EXPONENT_SET(eht_ops) WMI_SET_BITS(eht_ops, 4, 2, value) + +/* Bit 6 is for MCS15. If bit6 is 1 then we disable mcs15 */ +#define WMI_EHT_OPS_MCS15_DISABLE_GET(eht_ops) WMI_GET_BITS(eht_ops, 6, 1) +#define WMI_EHT_OPS_MCS15_DISABLE_SET(eht_ops, value) WMI_SET_BITS(eht_ops, 6, 1, value) + +/* Bit 7: reserved */ +/****** End of 11BE EHT Operation Parameters field ******/ -/****** End of 11BE EHT OPS Information field ******/ typedef struct { /** TLV tag and len; tag equals @@ -46703,6 +47809,7 @@ typedef enum { WMI_MLO_LINK_FORCE_REASON_TDLS = 4, /* Set force specific links because of 11BE MLO TDLS setup/teardown */ WMI_MLO_LINK_FORCE_REASON_REVERT_FAILURE = 5, /* Set force specific links for revert previous failed due to host reject */ WMI_MLO_LINK_FORCE_REASON_LINK_DELETE = 6, /* Set force specific links because link is deleted from associated link set */ + WMI_MLO_LINK_FORCE_REASON_SINGLE_LINK_EMLSR_OP = 7, /* Set force specific links because single link eMLSR operation */ } WMI_MLO_LINK_FORCE_REASON; #define WMI_MLO_CONTROL_FLAGS_GET_OVERWRITE_FORCE_ACTIVE(mlo_flags) \ @@ -47033,11 +48140,30 @@ typedef struct { /* MLD address of AP */ wmi_mac_addr mld_addr; /* any non-zero values of status indicate link reconfig failure. */ - A_UINT32 status; - /* valid only when status is non-zero. fw will do reassociation if link reconfig failure */ - A_UINT32 reassoc_if_failure; + A_UINT32 status; + /* reassoc_if_failure: + * Valid only when status is non-zero. + * FW will do reassociation if link reconfig failure. + */ + A_UINT32 reassoc_if_failure; } wmi_mlo_link_reconfig_complete_fixed_param; +typedef struct { + /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_mlo_link_ttlm_complete_fixed_param */ + A_UINT32 tlv_header; + /* unique id identifying the VDEV, generated by the caller */ + A_UINT32 vdev_id; + /* MLD address of AP */ + wmi_mac_addr mld_addr; + /* any non-zero values of status indicate link TTLM failure. */ + A_UINT32 status; + /* reassoc_if_failure: + * Valid only when status is non-zero. + * FW will do reassociation if link reconfig failure. + */ + A_UINT32 reassoc_if_failure; +} wmi_mlo_link_ttlm_complete_fixed_param; + #define WMI_TID_TO_LINK_MAP_TID_NUM_GET(_var) WMI_GET_BITS(_var, 0, 5) #define WMI_TID_TO_LINK_MAP_TID_NUM_SET(_var, _val) WMI_SET_BITS(_var, 0, 5, _val) @@ -47905,9 +49031,11 @@ typedef struct { } wmi_sawf_svc_class_disable_cmd_fixed_param; /* Used to store Hop count info for SDWF-Ezmesh scenario based on topology changes */ +#define WMI_SAWF_EZMESH_HOP_COUNT_SVC_ID_GET(svc_class_params) WMI_GET_BITS(svc_class_params, 0, 8) +#define WMI_SAWF_EZMESH_HOP_COUNT_SVC_ID_SET(svc_class_params, value) WMI_SET_BITS(svc_class_params, 0, 8, value) typedef struct { A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_sawf_ezmesh_hop_count_cmd_fixed_param */ - A_UINT32 peer_id; + A_UINT32 peer_id; /* deprecated field */ A_UINT32 hop_count; /* delay_bound: * Placeholder for future functionality where delay bound will be directly @@ -47915,6 +49043,15 @@ typedef struct { * (units = ms) */ A_UINT32 delay_bound; + wmi_mac_addr mac_address; /* Mac Address of next BSTA */ + A_UINT32 vdev_id; + union { + struct { + A_UINT32 svc_id:8, + reserved:24; + }; + A_UINT32 svc_class_params; + }; } wmi_sawf_ezmesh_hop_count_cmd_fixed_param; typedef struct { @@ -49815,7 +50952,10 @@ typedef struct { } wmi_mlo_link_del_param; typedef enum { - WMI_EVENT_POWER_BOOST_START_TRAINING = 0, + WMI_EVENT_POWER_BOOST_START_INFERENCING = 0, + /* alias */ + WMI_EVENT_POWER_BOOST_START_TRAINING = + WMI_EVENT_POWER_BOOST_START_INFERENCING, WMI_EVENT_POWER_BOOST_ABORT, WMI_EVENT_POWER_BOOST_COMPLETE, @@ -49828,6 +50968,8 @@ typedef enum { WMI_PDEV_POWER_BOOST_TS_MAX } wmi_pdev_power_boost_training_stage; +typedef wmi_pdev_power_boost_training_stage + wmi_pdev_power_boost_inferencing_stage; /* alias */ typedef struct { /* WMITLV_TAG_STRUC_wmi_pdev_power_boost_event_fixed_param */ @@ -49836,11 +50978,14 @@ typedef struct { A_UINT32 pdev_id; /* enum wmi_pdev_power_boost_event_type to update the power boost status */ A_UINT32 status; - /* training_stage: - * The training stage for which the I/Q samples are updated in DDR. - * This field holds a wmi_pdev_power_boost_training_stage value. + /* inferencing_stage: + * The inferencing stage for which the I/Q samples are updated in DDR. + * This field holds a wmi_pdev_power_boost_inferencing_stage value. */ - A_UINT32 training_stage; + union { + A_UINT32 training_stage; /* deprecated name */ + A_UINT32 inferencing_stage; /* preferred name */ + }; /* MCS value for which the current DPD training has been done */ A_UINT32 mcs; /* bandwidth: @@ -49865,6 +51010,16 @@ typedef struct { * in units of KB */ A_UINT32 size_kb; + /* tx_pwr: + * TX POWER of ANN PBT INFERENCING PKT (dBm units) + */ + A_INT32 tx_pwr; + /* tx_chain_idx: + * CHAIN INDEX where WMI is sent to HOST to start inferencing + */ + A_UINT32 tx_chain_idx; + /* req_id: to distinguish pdev_power_boost event instances */ + A_UINT32 req_id; } wmi_pdev_power_boost_event_fixed_param; typedef enum { @@ -49882,8 +51037,14 @@ typedef struct { A_UINT32 pdev_id; /* enum wmi_pdev_power_boost_cmd_type to update the power boost status */ A_UINT32 status; - /* wmi_pdev_power_boost_training_stage value to indicate training stage */ - A_UINT32 training_stage; + /* + * wmi_pdev_power_boost_inferencing_stage value to indicate + * inferencing stage + */ + union { + A_UINT32 training_stage; /* deprecated name */ + A_UINT32 inferencing_stage; /* preferred name */ + }; /* MCS value for which the Power Boost training has been done */ A_UINT32 mcs; /* Bandwidth in Mhz for which the Power Boost training has been done */ @@ -49911,6 +51072,8 @@ typedef struct { * training, in units of 1/4 (0.25dBm) steps. */ A_INT32 tx_mask_margin; + /* req_id: to distinguish pdev_power_boost cmd instances */ + A_UINT32 req_id; } wmi_pdev_power_boost_cmd_fixed_param; typedef struct { @@ -50059,8 +51222,9 @@ typedef struct { }; /* * The below TLVs follow this TLV in the WMI_VDEV_VBSS_CONFIG_CMDID msg: - * - wmi_vdev_vbss_peer_sn_info[]; * - wmi_vdev_vbss_peer_pn_info[]; + * - wmi_vdev_vbss_peer_sn_info[]; + * - wmi_vdev_vbss_peer_dyn_info; */ } wmi_vdev_vbss_config_cmd_fixed_param; @@ -50093,15 +51257,38 @@ typedef struct { ssn: 16; }; }; - /* The below TLVs follow this TLV in the WMI_VDEV_VBSS_CONFIG_EVENTID msg: - * - A_UINT32 scan_freq_list[]; - * - wmi_vdev_vbss_config_event_fixed_param[]; - */ } wmi_vdev_vbss_peer_sn_info; +typedef struct { + A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_vbss_peer_dyn_info */ + union { + A_UINT32 peer_dyn_info1_word32; + struct { + /** 15:0 omi + * 31:16 eht_omi + */ + A_UINT32 + omi: 16, + eht_omi: 16; + }; + }; + union { + A_UINT32 peer_dyn_info2_word32; + struct { + /** 1:0 pm + * 31:2 reserved + */ + A_UINT32 + pm : 1, + rsvd : 31; + }; + }; +} wmi_vdev_vbss_peer_dyn_info; + typedef enum { - WMI_VBSS_GET_PEER_CONTEXT = 0x1, - WMI_VBSS_SET_PEER_CONTEXT = 0x2, + WMI_VBSS_GET_PEER_CONTEXT = 1, + WMI_VBSS_SET_PEER_CONTEXT = 2, + WMI_VBSS_RX_SUSPEND_PEER_CONTEXT = 3, } wmi_vbss_action; #define WMI_VDEV_VBSS_GET_ACTION(action) WMI_GET_BITS(action, 0, 4) @@ -50116,6 +51303,15 @@ typedef enum { #define WMI_VDEV_VBSS_SN_INFO_GET_SSN(tid_num_ssn) WMI_GET_BITS(tid_num_ssn, 16, 16) #define WMI_VDEV_VBSS_SN_INFO_SET_SSN(action, value) WMI_SET_BITS(tid_num_ssn, 16, 16, value) +#define WMI_VDEV_VBSS_DYN_INFO_GET_OMI(peer_dyn_info1) WMI_GET_BITS(omi, 0, 16) +#define WMI_VDEV_VBSS_DYN_INFO_SET_OMI(peer_dyn_info1, value) WMI_SET_BITS(omi, 0, 16, value) + +#define WMI_VDEV_VBSS_DYN_INFO_GET_EHT_OMI(peer_dyn_info1) WMI_GET_BITS(eht_omi, 16, 16) +#define WMI_VDEV_VBSS_DYN_INFO_SET_EHT_OMI(peer_dyn_info1, value) WMI_SET_BITS(eht_omi, 16, 16, value) + +#define WMI_VDEV_VBSS_DYN_INFO_GET_PM(peer_dyn_info2) WMI_GET_BITS(pm, 0, 1) +#define WMI_VDEV_VBSS_DYN_INFO_SET_PM(peer_dyn_info2, value) WMI_SET_BITS(pm, 0, 1, value) + typedef struct { A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vdev_vbss_config_event_fixed_param */ @@ -50130,6 +51326,93 @@ typedef struct { } wmi_vdev_vbss_config_event_fixed_param; +typedef enum { + /* Channel bandwidth based semi static PCIe config */ + WMI_PCIE_CONFIG_TYPE_CHANNEL_BANDWIDTH, + /* Force a specific PCIe config */ + WMI_PCIE_CONFIG_TYPE_FORCED_STATIC, +} wmi_pcie_config_type_e; + +typedef struct { + /** TLV tag and len; tag equals + * WMITLV_TAG_STRUC_wmi_energy_mgmt_pcie_config_cmd_fixed_param */ + A_UINT32 tlv_header; + /** enable or disable PCIe config */ + A_UINT32 enable; + /* PCIe config type (holds a wmi_pcie_config_type_e value) */ + A_UINT32 config_type; + /** pcie_gen: pcie generation to be used + * pcie_lane:pcie lane config (lane number) to be used + */ + A_UINT32 pcie_gen; + A_UINT32 pcie_lane; +} wmi_energy_mgmt_pcie_config_cmd_fixed_param; + +typedef struct { + /** TLV tag and len; tag equals + * WMITLV_TAG_STRUC_wmi_energy_mgmt_pcie_lpm_cmd_fixed_param */ + A_UINT32 tlv_header; + /** enable or disable PCIe LPM */ + A_UINT32 enable; +} wmi_energy_mgmt_pcie_lpm_cmd_fixed_param; + +typedef struct { + /** TLV tag and len; tag equals + * WMITLV_TAG_STRUC_wmi_energy_mgmt_dcvs_config_cmd_fixed_param */ + A_UINT32 tlv_header; + /** enable or disable DCVS config */ + A_UINT32 enable; +} wmi_energy_mgmt_dcvs_config_cmd_fixed_param; + +typedef struct { + /** TLV tag and len; tag equals + * WMITLV_TAG_STRUC_wmi_energy_mgmt_dps_config_cmd_fixed_param */ + A_UINT32 tlv_header; + /** enable or disable DPS config */ + A_UINT32 enable; + /** PDEV identifier */ + A_UINT32 pdev_id; + /** Channel to be used in DPS Low cap mode, freq must match the primary home chan freq */ + wmi_channel low_cap_channel; + /** Tx chainmask to be used in DPS Low cap mode */ + A_UINT32 low_cap_tx_chainmask; + /** Rx chainmask to be used in DPS Low cap mode */ + A_UINT32 low_cap_rx_chainmask; + /** Mbps throughput after which DPS will be exited and notified to Host */ + A_UINT32 exit_thpt_thrsld_mbps; + /** number of wakeups per second after which DPS will be exited and notified to Host */ + A_UINT32 exit_wakeup_thrsld_per_second; +} wmi_energy_mgmt_edps_config_cmd_fixed_param; + +typedef struct { + /** TLV tag and len; tag equals + * WMITLV_TAG_STRUC_wmi_energy_mgmt_puo_config_cmd_fixed_param */ + A_UINT32 tlv_header; + /** enable or disable DPS config */ + A_UINT32 enable; + /** PDEV identifier */ + A_UINT32 pdev_id; + /** Channel to be used in PUO Low cap mode, freq must match the primary home chan freq */ + wmi_channel low_cap_channel; + /** Tx chainmask to be used in Low cap mode */ + A_UINT32 low_cap_tx_chainmask; + /** Rx chainmask to be used in Low cap mode */ + A_UINT32 low_cap_rx_chainmask; + /** minimum duration required between SP end and SP start to trigger entering to doze state */ + A_UINT32 min_doze_thrsld_in_us; +} wmi_energy_mgmt_puo_config_cmd_fixed_param; + +typedef struct { + /** TLV tag and len; tag equals + * WMITLV_TAG_STRUC_wmi_energy_mgmt_eco_mode_config_cmd_fixed_param */ + A_UINT32 tlv_header; + /** enable or disable DPS config */ + A_UINT32 enable; + /** PDEV identifier */ + A_UINT32 pdev_id; +} wmi_energy_mgmt_eco_mode_config_cmd_fixed_param; + + /* ADD NEW DEFS HERE */ diff --git a/drivers/staging/fw-api/fw/wmi_version.h b/drivers/staging/fw-api/fw/wmi_version.h index 145e8fcc2aa4..2c695cde4cda 100644 --- a/drivers/staging/fw-api/fw/wmi_version.h +++ b/drivers/staging/fw-api/fw/wmi_version.h @@ -37,7 +37,7 @@ #define __WMI_VER_MINOR_ 0 /** WMI revision number has to be incremented when there is a * change that may or may not break compatibility. */ -#define __WMI_REVISION_ 1575 +#define __WMI_REVISION_ 1637 /** The Version Namespace should not be normally changed. Only * host and firmware of the same WMI namespace will work