diff --git a/qcom/msm-arm-smmu-yupik.dtsi b/qcom/msm-arm-smmu-yupik.dtsi
index 22ee8245eb6e..06c00b29cadf 100644
--- a/qcom/msm-arm-smmu-yupik.dtsi
+++ b/qcom/msm-arm-smmu-yupik.dtsi
@@ -2,7 +2,6 @@
 
 &soc {
 	kgsl_smmu: kgsl-smmu@3da0000 {
-		status = "disabled";
 		compatible = "qcom,qsmmu-v500";
 		reg = <0x3da0000 0x20000>,
 			<0x3dd6000 0x20>;
@@ -10,11 +9,30 @@
 		#iommu-cells = <2>;
 		qcom,skip-init;
 		qcom,use-3-lvl-tables;
+		qcom,split-tables;
 		#global-interrupts = <2>;
 		#size-cells = <1>;
 		#address-cells = <1>;
 		ranges;
 		dma-coherent;
+		qcom,regulator-names = "vdd";
+		vdd-supply = <&gpu_cx_gdsc>;
+		clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
+			<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
+			<&gpucc GPU_CC_AHB_CLK>,
+			<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
+			<&gpucc GPU_CC_CX_GMU_CLK>,
+			<&gpucc GPU_CC_HUB_CX_INT_CLK>,
+			<&gpucc GPU_CC_HUB_AON_CLK>;
+
+		clock-names = "gcc_gpu_memnoc_gfx_clk",
+			"gcc_gpu_snoc_dvm_gfx_clk",
+			"gpu_cc_ahb_clk",
+			"gpu_cc_hlos1_vote_gpu_smmu_clk",
+			"gpu_cc_cx_gmu_clk",
+			"gpu_cc_hub_cx_int_clk",
+			"gpu_cc_hub_aon_clk";
+
 		interrupts =	<GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 675 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
@@ -43,7 +61,6 @@
 			reg-names = "base", "status-reg";
 			qcom,stream-id-range = <0x400 0x400>;
 		};
-
 	};
 
 	apps_smmu: apps-smmu@15000000 {
@@ -216,14 +233,13 @@
 	};
 
 	kgsl_iommu_test_device {
-		status = "disabled";
 		compatible = "iommu-debug-test";
 		iommus = <&kgsl_smmu 0x7 0>;
 		qcom,iommu-dma = "disabled";
 	};
 
 	kgsl_iommu_coherent_test_device {
-		status = "disabled";
+		status= "disabled";
 		compatible = "iommu-debug-test";
 		iommus = <&kgsl_smmu 0x407 0>;
 		qcom,iommu-dma = "disabled";