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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "cnss2: Increase mhi timeout to 60 seconds for firmware download"
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commit
03db2e3c1a
3 changed files with 23 additions and 12 deletions
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@ -70,6 +70,7 @@ static DEFINE_SPINLOCK(time_sync_lock);
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#define FORCE_WAKE_DELAY_MIN_US 4000
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#define FORCE_WAKE_DELAY_MAX_US 6000
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#define FORCE_WAKE_DELAY_TIMEOUT_US 60000
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#define CNSS_MHI_MISSION_MODE_TIMEOUT 60000
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#define POWER_ON_RETRY_MAX_TIMES 3
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#define POWER_ON_RETRY_DELAY_MS 200
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@ -1342,6 +1343,7 @@ int cnss_pci_start_mhi(struct cnss_pci_data *pci_priv)
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{
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int ret = 0;
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struct cnss_plat_data *plat_priv;
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unsigned int timeout = 0;
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if (!pci_priv) {
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cnss_pr_err("pci_priv is NULL\n");
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@ -1360,7 +1362,16 @@ int cnss_pci_start_mhi(struct cnss_pci_data *pci_priv)
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if (ret)
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return ret;
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if (cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01) {
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timeout = pci_priv->mhi_ctrl->timeout_ms;
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pci_priv->mhi_ctrl->timeout_ms = CNSS_MHI_MISSION_MODE_TIMEOUT;
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}
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ret = cnss_pci_set_mhi_state(pci_priv, CNSS_MHI_POWER_ON);
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if (cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
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pci_priv->mhi_ctrl->timeout_ms = timeout;
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/* -ETIMEDOUT means MHI power on has succeeded but timed out
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* for firmware mission mode event, so handle it properly.
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*/
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@ -165,18 +165,6 @@ qmi_registered:
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return ret;
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}
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#ifdef CONFIG_CNSS2_DEBUG
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static inline u32 cnss_get_host_build_type(void)
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{
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return QMI_HOST_BUILD_TYPE_PRIMARY_V01;
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}
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#else
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static inline u32 cnss_get_host_build_type(void)
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{
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return QMI_HOST_BUILD_TYPE_SECONDARY_V01;
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}
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#endif
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static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
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{
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struct wlfw_host_cap_req_msg_v01 *req;
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@ -278,4 +278,16 @@ static inline int cnss_dms_init(struct cnss_plat_data *plat_priv)
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static inline void cnss_dms_deinit(struct cnss_plat_data *plat_priv) {}
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#endif /* CONFIG_CNSS2_QMI */
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#ifdef CONFIG_CNSS2_DEBUG
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static inline u32 cnss_get_host_build_type(void)
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{
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return QMI_HOST_BUILD_TYPE_PRIMARY_V01;
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}
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#else
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static inline u32 cnss_get_host_build_type(void)
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{
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return QMI_HOST_BUILD_TYPE_SECONDARY_V01;
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}
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#endif
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#endif /* _CNSS_QMI_H */
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