diff --git a/qcom/shima-gdsc.dtsi b/qcom/shima-gdsc.dtsi
index d6d058295306..0686c9dfeb67 100644
--- a/qcom/shima-gdsc.dtsi
+++ b/qcom/shima-gdsc.dtsi
@@ -6,6 +6,7 @@
 		regulator-name = "gcc_pcie_0_gdsc";
 		qcom,gds-timeout = <500>;
 		qcom,no-status-check-on-disable;
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -15,6 +16,7 @@
 		regulator-name = "gcc_pcie_1_gdsc";
 		qcom,gds-timeout = <500>;
 		qcom,no-status-check-on-disable;
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -22,6 +24,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0x177004 0x4>;
 		regulator-name = "gcc_ufs_phy_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -29,6 +32,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0x10f004 0x4>;
 		regulator-name = "gcc_usb30_prim_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -36,6 +40,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0x19e004 0x4>;
 		regulator-name = "gcc_usb30_sec_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -116,6 +121,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xad0c120 0x4>;
 		regulator-name = "cam_cc_titan_top_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -123,6 +129,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xad07004 0x4>;
 		regulator-name = "cam_cc_bps_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -130,6 +137,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xad0a004 0x4>;
 		regulator-name = "cam_cc_ife_0_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -137,6 +145,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xad0b004 0x4>;
 		regulator-name = "cam_cc_ife_1_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -144,6 +153,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xad0b070 0x4>;
 		regulator-name = "cam_cc_ife_2_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -151,6 +161,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xad08004 0x4>;
 		regulator-name = "cam_cc_ipe_0_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -161,6 +172,7 @@
 		regulator-name = "disp_cc_mdss_core_gdsc";
 		proxy-supply = <&disp_cc_mdss_core_gdsc>;
 		qcom,proxy-consumer-enable;
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -186,6 +198,7 @@
 		regulator-name = "gpu_cx_gdsc";
 		hw-ctrl-addr = <&gpu_cx_hw_ctrl>;
 		qcom,no-status-check-on-disable;
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -196,6 +209,7 @@
 		sw-reset = <&gpu_gx_sw_reset>;
 		domain-addr = <&gpu_gx_domain_addr>;
 		qcom,reset-aon-logic;
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -204,6 +218,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xabf0d18 0x4>;
 		regulator-name = "video_cc_mvs0_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -211,6 +226,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xabf0bf8 0x4>;
 		regulator-name = "video_cc_mvs0c_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -218,6 +234,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xabf0d98 0x4>;
 		regulator-name = "video_cc_mvs1_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -225,6 +242,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xabf0c98 0x4>;
 		regulator-name = "video_cc_mvs1c_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 
@@ -232,6 +250,7 @@
 		compatible = "qcom,gdsc";
 		reg = <0xaaf2004 0x4>;
 		regulator-name = "video_cc_mvsc_gdsc";
+		qcom,retain-regs;
 		status = "disabled";
 	};
 };
diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi
index 44ab78339e3f..0fef6712174d 100644
--- a/qcom/shima.dtsi
+++ b/qcom/shima.dtsi
@@ -3890,22 +3890,18 @@
 };
 
 &gcc_pcie_0_gdsc {
-	qcom,retain-regs;
 	status = "ok";
 };
 
 &gcc_pcie_1_gdsc {
-	qcom,retain-regs;
 	status = "ok";
 };
 
 &gcc_ufs_phy_gdsc {
-	qcom,retain-regs;
 	status = "ok";
 };
 
 &gcc_usb30_prim_gdsc {
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -3945,7 +3941,6 @@
 	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	clock-names = "ahb_clk";
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -3954,7 +3949,6 @@
 	clock-names = "ahb_clk";
 	qcom,support-hw-trigger;
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -3962,7 +3956,6 @@
 	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	clock-names = "ahb_clk";
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -3970,7 +3963,6 @@
 	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	clock-names = "ahb_clk";
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -3978,7 +3970,6 @@
 	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	clock-names = "ahb_clk";
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -3987,7 +3978,6 @@
 	clock-names = "ahb_clk";
 	qcom,support-hw-trigger;
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -3996,7 +3986,6 @@
 	clock-names = "ahb_clk";
 	qcom,support-hw-trigger;
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -4004,7 +3993,6 @@
 	clocks = <&gcc GCC_GPU_CFG_AHB_CLK>;
 	clock-names = "ahb_clk";
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -4012,7 +4000,6 @@
 	clocks = <&gcc GCC_GPU_CFG_AHB_CLK>;
 	clock-names = "ahb_clk";
 	parent-supply = <&VDD_GFX_LEVEL>;
-	qcom,retain-regs;
 	qcom,skip-disable-before-sw-enable;
 	status = "ok";
 };
@@ -4022,7 +4009,6 @@
 	clock-names = "ahb_clk";
 	qcom,support-hw-trigger;
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -4030,7 +4016,6 @@
 	clocks = <&gcc GCC_VIDEO_AHB_CLK>;
 	clock-names = "ahb_clk";
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -4039,7 +4024,6 @@
 	clock-names = "ahb_clk";
 	qcom,support-hw-trigger;
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
@@ -4047,7 +4031,6 @@
 	clocks = <&gcc GCC_VIDEO_AHB_CLK>;
 	clock-names = "ahb_clk";
 	parent-supply = <&VDD_CX_LEVEL>;
-	qcom,retain-regs;
 	status = "ok";
 };
 
diff --git a/qcom/yupik-rumi.dtsi b/qcom/yupik-rumi.dtsi
index 1efb6b32bfaa..3cf06415ef73 100644
--- a/qcom/yupik-rumi.dtsi
+++ b/qcom/yupik-rumi.dtsi
@@ -75,3 +75,7 @@
 &qupv3_se5_2uart {
 	qcom,rumi_platform;
 };
+
+&gcc {
+	clocks = <&bi_tcxo>, <&sleep_clk>;
+};
diff --git a/qcom/yupik.dtsi b/qcom/yupik.dtsi
index 59808e07e047..317092da3274 100644
--- a/qcom/yupik.dtsi
+++ b/qcom/yupik.dtsi
@@ -600,8 +600,12 @@
 	};
 
 	gcc: clock-controller@100000 {
-		compatible = "qcom,dummycc";
-		clock-output-names = "gcc_clocks";
+		compatible = "qcom,yupik-gcc", "syscon";
+		reg = <0x100000 0x1f0000>;
+		reg-names = "cc_base";
+		vdd_cx-supply = <&VDD_CX_LEVEL>;
+		clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>;
+		clock-names = "bi_tcxo", "sleep_clk";
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};
@@ -1304,56 +1308,46 @@
 #include "ipcc-test-yupik.dtsi"
 
 &gcc_pcie_0_gdsc {
-	compatible = "regulator-fixed";
 	qcom,support-hw-trigger;
 	status = "ok";
 };
 
 &gcc_pcie_1_gdsc {
-	compatible = "regulator-fixed";
 	qcom,support-hw-trigger;
 	status = "ok";
 };
 
 &gcc_ufs_phy_gdsc {
-	compatible = "regulator-fixed";
 	qcom,support-hw-trigger;
 	status = "ok";
 };
 
 &gcc_usb30_prim_gdsc {
-	compatible = "regulator-fixed";
 	status = "ok";
 };
 
 &gcc_usb30_sec_gdsc {
-	compatible = "regulator-fixed";
 	qcom,support-hw-trigger;
 	status = "ok";
 };
 
 &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc {
-	compatible = "regulator-fixed";
 	status = "ok";
 };
 
 &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc {
-	compatible = "regulator-fixed";
 	status = "ok";
 };
 
 &hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc {
-	compatible = "regulator-fixed";
 	status = "ok";
 };
 
 &hlos1_vote_turing_mmu_tbu0_gdsc {
-	compatible = "regulator-fixed";
 	status = "ok";
 };
 
 &hlos1_vote_turing_mmu_tbu1_gdsc {
-	compatible = "regulator-fixed";
 	status = "ok";
 };