clk: qcom: gcc: Lower the frequency for sdxlemur from 200 to 171MHz

Update the sdcc clock frequency from 200MHz to 171MHz.

Change-Id: Ibada53598071e84ab600aeba9d3418d41d811357
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This commit is contained in:
Taniya Das 2021-08-01 18:23:36 +05:30 • committed by Gerrit - the friendly Code Review server
commit 047b20cc26

View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
*/
#include <linux/clk-provider.h>
@ -764,7 +764,7 @@ static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk_src[] = {
F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0),
F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0),
F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),
F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0),
F(171428571, P_GPLL0_OUT_MAIN, 3.5, 0, 0),
{ }
};
@ -789,7 +789,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
.rate_max = (unsigned long[VDD_NUM]) {
[VDD_LOWER] = 50000000,
[VDD_LOW] = 100000000,
[VDD_NOMINAL] = 200000000},
[VDD_NOMINAL] = 171428571},
},
};