mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-15 09:14:18 -04:00
Merge 3c0f029ebb on remote branch
Change-Id: Ib5aeaba28067de1091e6e26752b35d0614a8588b
This commit is contained in:
commit
04a9cd74bc
7 changed files with 171 additions and 0 deletions
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@ -1,5 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
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*/
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@ -172,6 +173,16 @@ int dsi_clk_update_parent(struct dsi_clk_link_set *parent,
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{
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int rc = 0;
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if (!parent->byte_clk || !parent->pixel_clk) {
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DSI_ERR("Invalid parent\n");
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return -EINVAL;
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}
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if (!child->byte_clk || !child->pixel_clk) {
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DSI_ERR("Invalid child\n");
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return -EINVAL;
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}
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rc = clk_set_parent(child->byte_clk, parent->byte_clk);
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if (rc) {
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DSI_ERR("failed to set byte clk parent\n");
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@ -1,5 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
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*/
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@ -2657,6 +2658,38 @@ error:
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return rc;
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}
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#ifdef CONFIG_DEEPSLEEP
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static int dsi_display_unset_clk_src(struct dsi_display *display)
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{
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int rc = 0;
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int i;
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struct dsi_display_ctrl *ctrl;
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DSI_DEBUG("[%s] unset source clocks\n", display->name);
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display_for_each_ctrl(i, display) {
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ctrl = &display->ctrl[i];
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if (!ctrl->ctrl)
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continue;
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/* set ctrl clocks to xo source */
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rc = dsi_ctrl_set_clock_source(ctrl->ctrl,
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&display->clock_info.xo_clks);
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if (rc) {
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DSI_ERR("[%s] failed to set source clocks, rc=%d\n",
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display->name, rc);
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return rc;
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}
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}
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return 0;
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}
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#else
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static inline int dsi_display_unset_clk_src(struct dsi_display *display)
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{
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return 0;
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}
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#endif
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static int dsi_display_set_clk_src(struct dsi_display *display)
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{
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int rc = 0;
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@ -3442,6 +3475,7 @@ static int dsi_display_clocks_init(struct dsi_display *display)
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{
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int i, rc = 0, num_clk = 0;
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const char *clk_name;
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const char *xo_byte = "xo_byte", *xo_pixel = "xo_pixel";
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const char *src_byte = "src_byte", *src_pixel = "src_pixel";
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const char *mux_byte = "mux_byte", *mux_pixel = "mux_pixel";
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const char *cphy_byte = "cphy_byte", *cphy_pixel = "cphy_pixel";
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@ -3449,6 +3483,7 @@ static int dsi_display_clocks_init(struct dsi_display *display)
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const char *shadow_cphybyte = "shadow_cphybyte",
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*shadow_cphypixel = "shadow_cphypixel";
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struct clk *dsi_clk;
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struct dsi_clk_link_set *xo = &display->clock_info.xo_clks;
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struct dsi_clk_link_set *src = &display->clock_info.src_clks;
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struct dsi_clk_link_set *mux = &display->clock_info.mux_clks;
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struct dsi_clk_link_set *cphy = &display->clock_info.cphy_clks;
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@ -3479,6 +3514,15 @@ static int dsi_display_clocks_init(struct dsi_display *display)
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DSI_ERR("failed to get %s, rc=%d\n", clk_name, rc);
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if (dsi_display_check_prefix(xo_byte, clk_name)) {
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xo->byte_clk = NULL;
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goto error;
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}
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if (dsi_display_check_prefix(xo_pixel, clk_name)) {
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xo->pixel_clk = NULL;
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goto error;
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}
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if (dsi_display_check_prefix(mux_byte, clk_name)) {
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mux->byte_clk = NULL;
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goto error;
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@ -3524,6 +3568,16 @@ static int dsi_display_clocks_init(struct dsi_display *display)
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}
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}
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if (dsi_display_check_prefix(xo_byte, clk_name)) {
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xo->byte_clk = dsi_clk;
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continue;
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}
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if (dsi_display_check_prefix(xo_pixel, clk_name)) {
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xo->pixel_clk = dsi_clk;
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continue;
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}
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if (dsi_display_check_prefix(src_byte, clk_name)) {
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src->byte_clk = dsi_clk;
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continue;
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@ -6918,6 +6972,20 @@ int dsi_display_get_modes(struct dsi_display *display,
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goto error;
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}
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/*
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* Update the host_config.dst_format for compressed RGB101010
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* pixel format.
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*/
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if (display->panel->host_config.dst_format ==
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DSI_PIXEL_FORMAT_RGB101010 &&
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display_mode.timing.dsc_enabled) {
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display->panel->host_config.dst_format =
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DSI_PIXEL_FORMAT_RGB888;
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DSI_DEBUG("updated dst_format from %d to %d\n",
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DSI_PIXEL_FORMAT_RGB101010,
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display->panel->host_config.dst_format);
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}
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is_cmd_mode = (display_mode.panel_mode == DSI_OP_CMD_MODE);
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/* Setup widebus support */
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@ -8586,6 +8654,12 @@ int dsi_display_unprepare(struct dsi_display *display)
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DSI_ERR("[%s] failed to disable Link clocks, rc=%d\n",
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display->name, rc);
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/* set to dsi clocks to xo clocks */
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rc = dsi_display_unset_clk_src(display);
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if (rc)
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DSI_ERR("[%s] failed to unset clocks, rc=%d\n",
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display->name, rc);
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rc = dsi_display_ctrl_deinit(display);
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if (rc)
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DSI_ERR("[%s] failed to deinit controller, rc=%d\n",
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@ -1,5 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
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*/
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@ -110,6 +111,7 @@ struct dsi_display_boot_param {
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* @shadow_cphy_clks: Used for C-phy clock switch.
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*/
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struct dsi_display_clk_info {
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struct dsi_clk_link_set xo_clks;
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struct dsi_clk_link_set src_clks;
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struct dsi_clk_link_set mux_clks;
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struct dsi_clk_link_set cphy_clks;
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@ -1,5 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
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*/
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@ -934,6 +935,15 @@ static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
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fmt = DSI_PIXEL_FORMAT_RGB666;
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break;
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case 30:
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/*
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* The destination pixel format (host->dst_format) depends
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* upon the compression, and should be RGB888 if the DSC is
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* enable.
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* The DSC status information is inside the timing modes, that
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* is parsed during first dsi_display_get_modes() call.
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* The dst_format will be updated there depending upon the
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* DSC status.
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*/
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fmt = DSI_PIXEL_FORMAT_RGB101010;
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break;
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case 24:
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@ -1,4 +1,5 @@
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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@ -1128,6 +1129,8 @@ struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
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struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
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struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev,
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int w, int h, int p, uint32_t format);
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int msm_fb_obj_get_attrs(struct drm_gem_object *obj, int *fb_ns,
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int *fb_sec, int *fb_sec_dir, unsigned long *flags);
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struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
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void msm_fbdev_free(struct drm_device *dev);
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32
msm/msm_fb.c
32
msm/msm_fb.c
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@ -1,4 +1,5 @@
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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@ -16,6 +17,8 @@
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/dma-buf.h>
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#include <linux/msm_ion.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_damage_helper.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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@ -378,3 +381,32 @@ msm_alloc_stolen_fb(struct drm_device *dev, int w, int h, int p, uint32_t format
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return fb;
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}
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int msm_fb_obj_get_attrs(struct drm_gem_object *obj, int *fb_ns,
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int *fb_sec, int *fb_sec_dir, unsigned long *flags)
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{
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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int ret = 0;
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if (!obj->import_attach) {
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DRM_DEBUG("NULL attachment in drm gem object flags:0x%x\n", msm_obj->flags);
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return -EINVAL;
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}
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ret = dma_buf_get_flags(obj->import_attach->dmabuf, flags);
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if (ret) {
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DRM_ERROR("dma_buf_get_flags failure, err=%d\n", ret);
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return ret;
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}
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if (!(*flags & ION_FLAG_SECURE))
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*fb_ns = 1;
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else if (*flags & ION_FLAG_CP_PIXEL)
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*fb_sec = 1;
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else if (*flags & (ION_FLAG_CP_SEC_DISPLAY |
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ION_FLAG_CP_CAMERA_PREVIEW))
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*fb_sec_dir = 1;
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return ret;
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}
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@ -1,4 +1,5 @@
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (C) 2014-2021 The Linux Foundation. All rights reserved.
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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@ -1962,6 +1963,39 @@ static void sde_plane_cleanup_fb(struct drm_plane *plane,
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}
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static int _sde_plane_validate_fb(struct sde_plane *psde,
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struct drm_plane_state *state)
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{
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struct sde_plane_state *pstate;
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struct drm_framebuffer *fb;
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uint32_t fb_ns = 0, fb_sec = 0, fb_sec_dir = 0;
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unsigned long flags = 0;
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int mode, ret = 0, n, i;
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pstate = to_sde_plane_state(state);
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mode = sde_plane_get_property(pstate,
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PLANE_PROP_FB_TRANSLATION_MODE);
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fb = state->fb;
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n = fb->format->num_planes;
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for (i = 0; i < n; i++) {
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ret = msm_fb_obj_get_attrs(fb->obj[i], &fb_ns, &fb_sec,
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&fb_sec_dir, &flags);
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if (!ret && ((fb_ns && (mode != SDE_DRM_FB_NON_SEC)) ||
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(fb_sec && (mode != SDE_DRM_FB_SEC)) ||
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(fb_sec_dir && (mode != SDE_DRM_FB_SEC_DIR_TRANS)))) {
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SDE_ERROR_PLANE(psde, "mode:%d fb:%d dma_buf flags:0x%x rc:%d\n",
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mode, fb->base.id, flags, ret);
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SDE_EVT32(psde->base.base.id, fb->base.id, flags,
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fb_ns, fb_sec, fb_sec_dir, ret, SDE_EVTLOG_ERROR);
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return -EINVAL;
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}
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}
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return 0;
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}
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static void _sde_plane_sspp_atomic_check_mode_changed(struct sde_plane *psde,
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struct drm_plane_state *state,
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struct drm_plane_state *old_state)
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@ -2631,6 +2665,11 @@ static int sde_plane_sspp_atomic_check(struct drm_plane *plane,
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return ret;
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ret = _sde_plane_validate_shared_crtc(psde, state);
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if (ret)
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return ret;
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ret = _sde_plane_validate_fb(psde, state);
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if (ret)
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return ret;
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