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i.MX non-critical fixes for 4.10:

Browse source 
- A series from Vladimir to fix broken i.MX31 DT clock initialization.
    As i.MX31 DT support is still not quite complete, the changes are
    tested on qemu kzm target and mx31lite board with simple written DTS
    files.
  - A fix for CompuLab's sbc-fx6 baseboard to remove wrong fec pinctrl
    setting.
  - A DTS correction for i.MX6QP to reflect the change that the gate of
    LDB clock has been moved before the divider.
  - An imx7d-pinfunc fix for UART pinmux defines
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Merge tag 'imx-fix-nc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/fixes-non-critical

i.MX non-critical fixes for 4.10:
 - A series from Vladimir to fix broken i.MX31 DT clock initialization.
   As i.MX31 DT support is still not quite complete, the changes are
   tested on qemu kzm target and mx31lite board with simple written DTS
   files.
 - A fix for CompuLab's sbc-fx6 baseboard to remove wrong fec pinctrl
   setting.
 - A DTS correction for i.MX6QP to reflect the change that the gate of
   LDB clock has been moved before the divider.
 - An imx7d-pinfunc fix for UART pinmux defines

* tag 'imx-fix-nc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6q-cm-fx6: fix fec pinctrl
  ARM: dts: imx7d-pinfunc: fix UART pinmux defines
  ARM: dts: imx6qp: correct LDB clock inputs
  ARM: clk: imx31: properly init clocks for machines with DT
  clk: imx31: fix rewritten input argument of mx31_clocks_init()
  ARM: dts: imx31: move CCM device node to AIPS2 bus devices
  ARM: dts: imx31: fix clock control module interrupts description

Signed-off-by: Olof Johansson <[email protected]>
This commit is contained in:
Olof Johansson 2016-11-18 09:56:49 -08:00
commit 04c0d567d3
8 changed files with 52 additions and 46 deletions
Download patch file Download diff file Expand all files Collapse all files

52
drivers/clk/imx/clk-imx31.c
View file

@ -21,6 +21,7 @@
#include <linux/io.h>
#include <linux/err.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <soc/imx/revision.h>
#include <soc/imx/timer.h>
#include <asm/irq.h>
@ -72,14 +73,8 @@ static struct clk ** const uart_clks[] __initconst = {
NULL
};
static void __init _mx31_clocks_init(unsigned long fref)
static void __init _mx31_clocks_init(void __iomem *base, unsigned long fref)
{
void __iomem *base;
struct device_node *np;
base = ioremap(MX31_CCM_BASE_ADDR, SZ_4K);
BUG_ON(!base);
clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckih] = imx_clk_fixed("ckih", fref);
clk[ckil] = imx_clk_fixed("ckil", 32768);
@ -147,21 +142,17 @@ static void __init _mx31_clocks_init(unsigned long fref)
clk_prepare_enable(clk[iim_gate]);
mx31_revision();
clk_disable_unprepare(clk[iim_gate]);
np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm");
if (np) {
clk_data.clks = clk;
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}
}
int __init mx31_clocks_init(void)
int __init mx31_clocks_init(unsigned long fref)
{
u32 fref = 26000000; /* default */
void __iomem *base;
_mx31_clocks_init(fref);
base = ioremap(MX31_CCM_BASE_ADDR, SZ_4K);
if (!base)
panic("%s: failed to map registers\n", __func__);
_mx31_clocks_init(base, fref);
clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
@ -224,22 +215,31 @@ int __init mx31_clocks_init(void)
return 0;
}
int __init mx31_clocks_init_dt(void)
static void __init mx31_clocks_init_dt(struct device_node *np)
{
struct device_node *np;
struct device_node *osc_np;
u32 fref = 26000000; /* default */
void __iomem *ccm;
for_each_compatible_node(np, NULL, "fixed-clock") {
if (!of_device_is_compatible(np, "fsl,imx-osc26m"))
for_each_compatible_node(osc_np, NULL, "fixed-clock") {
if (!of_device_is_compatible(osc_np, "fsl,imx-osc26m"))
continue;
if (!of_property_read_u32(np, "clock-frequency", &fref)) {
of_node_put(np);
if (!of_property_read_u32(osc_np, "clock-frequency", &fref)) {
of_node_put(osc_np);
break;
}
}
_mx31_clocks_init(fref);
ccm = of_iomap(np, 0);
if (!ccm)
panic("%s: failed to map registers\n", __func__);
return 0;
_mx31_clocks_init(ccm, fref);
clk_data.clks = clk;
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}
CLK_OF_DECLARE(imx31_ccm, "fsl,imx31-ccm", mx31_clocks_init_dt);