diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
index a456ef7699a6..9b3a749be0bc 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
@@ -23,7 +23,7 @@ static void config_sub_second_increment(void __iomem *ioaddr,
 		u32 ptp_clock, int gmac4, u32 *ssinc)
 {
 	u32 value = readl(ioaddr + PTP_TCR);
-	unsigned long ss_inc = 0, sns_inc = 0, ptpclock = 0;
+	u64 ss_inc = 0, sns_inc = 0, ptpclock = 0;
 	u32 reg_value;
 
 	/* For GMAC3.x, 4.x versions, in "fine adjustement mode" set sub-second
@@ -35,19 +35,19 @@ static void config_sub_second_increment(void __iomem *ioaddr,
 	 * 2000000000ULL / ptp_clock.
 	 */
 	if (value & PTP_TCR_TSCFUPDT)
-		ptpclock = (unsigned long)ptp_clock;
+		ptpclock = (u64)ptp_clock;
 	else
-		ptpclock = (unsigned long)ptp_clock;
+		ptpclock = (u64)ptp_clock;
 
-	ss_inc = ((1 * 1000000000ULL) / ptpclock);
+	ss_inc = div_u64((1 * 1000000000ULL), ptpclock);
 	sns_inc = 1000000000ULL - (ss_inc * ptpclock); //take remainder
 
 	//sns_inc needs to be multiplied by 2^8, per spec.
-	sns_inc = (sns_inc * 256) / ptpclock;
+	sns_inc = div_u64((sns_inc * 256), ptpclock);
 
 	/* 0.465ns accuracy */
 	if (!(value & PTP_TCR_TSCTRLSSR))
-		ss_inc = (ss_inc * 1000) / 465;
+		ss_inc = div_u64((ss_inc * 1000), 465);
 
 	ss_inc &= PTP_SSIR_SSINC_MASK;
 	sns_inc &= PTP_SSIR_SNSINC_MASK;