From 054bc305fdee46943d04f4e9082dc162d9e50ef7 Mon Sep 17 00:00:00 2001
From: Ram Chandrasekar <rkumbako@quicinc.com>
Date: Tue, 3 Nov 2020 15:07:09 -0800
Subject: [PATCH] ARM: dts: msm: Add DDR cooling device for Lahaina

Add DDR cooling device for Lahaina to vote for DDR bandwidth when the
DDR temp reaches 90C.

Change-Id: I83106de17b587e5b59f0a8b7cd1fe1dad5af15b2
---
 qcom/lahaina-thermal.dtsi | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/qcom/lahaina-thermal.dtsi b/qcom/lahaina-thermal.dtsi
index 27210b21b047..fb753c87f2dd 100644
--- a/qcom/lahaina-thermal.dtsi
+++ b/qcom/lahaina-thermal.dtsi
@@ -53,6 +53,25 @@
 		reg = <0x00635000 0x1000>;
 		interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
 	};
+
+	ddr_cdev: qcom,ddr-cdev {
+		compatible = "qcom,ddr-cooling-device";
+		#cooling-cells = <2>;
+		qcom,ddr-freq = <762000>,
+				<1720000>,
+				<2086000>,
+				<2597000>,
+				<2929000>,
+				<3879000>,
+				<5161000>,
+				<5931000>,
+				<6515000>,
+				<7980000>,
+				<8136000>,
+				<10437000>,
+				<12191000>;
+		interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;
+	};
 };
 
 &cpufreq_hw {
@@ -751,7 +770,7 @@
 		thermal-governor = "step_wise";
 		trips {
 			pop_trip: pop-trip {
-				temperature = <95000>;
+				temperature = <90000>;
 				hysteresis = <0>;
 				type = "passive";
 			};
@@ -764,6 +783,11 @@
 					<&apc1_cluster THERMAL_NO_LIMIT
 						THERMAL_NO_LIMIT>;
 			};
+
+			pop_cdev1 {
+				trip = <&pop_trip>;
+				cooling-device = <&ddr_cdev 5 5>;
+			};
 		};
 	};